Merge remote branch 'alsa/fixes' into fix/hda
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c
1 /*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "i915_drm.h"
34 #include "i915_drv.h"
35
36 #define DRM_I915_RING_DEBUG 1
37
38
39 #if defined(CONFIG_DEBUG_FS)
40
41 #define ACTIVE_LIST 1
42 #define FLUSHING_LIST 2
43 #define INACTIVE_LIST 3
44
45 static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv)
46 {
47 if (obj_priv->user_pin_count > 0)
48 return "P";
49 else if (obj_priv->pin_count > 0)
50 return "p";
51 else
52 return " ";
53 }
54
55 static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv)
56 {
57 switch (obj_priv->tiling_mode) {
58 default:
59 case I915_TILING_NONE: return " ";
60 case I915_TILING_X: return "X";
61 case I915_TILING_Y: return "Y";
62 }
63 }
64
65 static int i915_gem_object_list_info(struct seq_file *m, void *data)
66 {
67 struct drm_info_node *node = (struct drm_info_node *) m->private;
68 uintptr_t list = (uintptr_t) node->info_ent->data;
69 struct list_head *head;
70 struct drm_device *dev = node->minor->dev;
71 drm_i915_private_t *dev_priv = dev->dev_private;
72 struct drm_i915_gem_object *obj_priv;
73 spinlock_t *lock = NULL;
74
75 switch (list) {
76 case ACTIVE_LIST:
77 seq_printf(m, "Active:\n");
78 lock = &dev_priv->mm.active_list_lock;
79 head = &dev_priv->mm.active_list;
80 break;
81 case INACTIVE_LIST:
82 seq_printf(m, "Inactive:\n");
83 head = &dev_priv->mm.inactive_list;
84 break;
85 case FLUSHING_LIST:
86 seq_printf(m, "Flushing:\n");
87 head = &dev_priv->mm.flushing_list;
88 break;
89 default:
90 DRM_INFO("Ooops, unexpected list\n");
91 return 0;
92 }
93
94 if (lock)
95 spin_lock(lock);
96 list_for_each_entry(obj_priv, head, list)
97 {
98 struct drm_gem_object *obj = obj_priv->obj;
99
100 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
101 obj,
102 get_pin_flag(obj_priv),
103 obj->size,
104 obj->read_domains, obj->write_domain,
105 obj_priv->last_rendering_seqno,
106 obj_priv->dirty ? " dirty" : "",
107 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
108
109 if (obj->name)
110 seq_printf(m, " (name: %d)", obj->name);
111 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
112 seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
113 if (obj_priv->gtt_space != NULL)
114 seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset);
115
116 seq_printf(m, "\n");
117 }
118
119 if (lock)
120 spin_unlock(lock);
121 return 0;
122 }
123
124 static int i915_gem_request_info(struct seq_file *m, void *data)
125 {
126 struct drm_info_node *node = (struct drm_info_node *) m->private;
127 struct drm_device *dev = node->minor->dev;
128 drm_i915_private_t *dev_priv = dev->dev_private;
129 struct drm_i915_gem_request *gem_request;
130
131 seq_printf(m, "Request:\n");
132 list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) {
133 seq_printf(m, " %d @ %d\n",
134 gem_request->seqno,
135 (int) (jiffies - gem_request->emitted_jiffies));
136 }
137 return 0;
138 }
139
140 static int i915_gem_seqno_info(struct seq_file *m, void *data)
141 {
142 struct drm_info_node *node = (struct drm_info_node *) m->private;
143 struct drm_device *dev = node->minor->dev;
144 drm_i915_private_t *dev_priv = dev->dev_private;
145
146 if (dev_priv->hw_status_page != NULL) {
147 seq_printf(m, "Current sequence: %d\n",
148 i915_get_gem_seqno(dev));
149 } else {
150 seq_printf(m, "Current sequence: hws uninitialized\n");
151 }
152 seq_printf(m, "Waiter sequence: %d\n",
153 dev_priv->mm.waiting_gem_seqno);
154 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno);
155 return 0;
156 }
157
158
159 static int i915_interrupt_info(struct seq_file *m, void *data)
160 {
161 struct drm_info_node *node = (struct drm_info_node *) m->private;
162 struct drm_device *dev = node->minor->dev;
163 drm_i915_private_t *dev_priv = dev->dev_private;
164
165 if (!IS_IRONLAKE(dev)) {
166 seq_printf(m, "Interrupt enable: %08x\n",
167 I915_READ(IER));
168 seq_printf(m, "Interrupt identity: %08x\n",
169 I915_READ(IIR));
170 seq_printf(m, "Interrupt mask: %08x\n",
171 I915_READ(IMR));
172 seq_printf(m, "Pipe A stat: %08x\n",
173 I915_READ(PIPEASTAT));
174 seq_printf(m, "Pipe B stat: %08x\n",
175 I915_READ(PIPEBSTAT));
176 } else {
177 seq_printf(m, "North Display Interrupt enable: %08x\n",
178 I915_READ(DEIER));
179 seq_printf(m, "North Display Interrupt identity: %08x\n",
180 I915_READ(DEIIR));
181 seq_printf(m, "North Display Interrupt mask: %08x\n",
182 I915_READ(DEIMR));
183 seq_printf(m, "South Display Interrupt enable: %08x\n",
184 I915_READ(SDEIER));
185 seq_printf(m, "South Display Interrupt identity: %08x\n",
186 I915_READ(SDEIIR));
187 seq_printf(m, "South Display Interrupt mask: %08x\n",
188 I915_READ(SDEIMR));
189 seq_printf(m, "Graphics Interrupt enable: %08x\n",
190 I915_READ(GTIER));
191 seq_printf(m, "Graphics Interrupt identity: %08x\n",
192 I915_READ(GTIIR));
193 seq_printf(m, "Graphics Interrupt mask: %08x\n",
194 I915_READ(GTIMR));
195 }
196 seq_printf(m, "Interrupts received: %d\n",
197 atomic_read(&dev_priv->irq_received));
198 if (dev_priv->hw_status_page != NULL) {
199 seq_printf(m, "Current sequence: %d\n",
200 i915_get_gem_seqno(dev));
201 } else {
202 seq_printf(m, "Current sequence: hws uninitialized\n");
203 }
204 seq_printf(m, "Waiter sequence: %d\n",
205 dev_priv->mm.waiting_gem_seqno);
206 seq_printf(m, "IRQ sequence: %d\n",
207 dev_priv->mm.irq_gem_seqno);
208 return 0;
209 }
210
211 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
212 {
213 struct drm_info_node *node = (struct drm_info_node *) m->private;
214 struct drm_device *dev = node->minor->dev;
215 drm_i915_private_t *dev_priv = dev->dev_private;
216 int i;
217
218 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
219 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
220 for (i = 0; i < dev_priv->num_fence_regs; i++) {
221 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj;
222
223 if (obj == NULL) {
224 seq_printf(m, "Fenced object[%2d] = unused\n", i);
225 } else {
226 struct drm_i915_gem_object *obj_priv;
227
228 obj_priv = obj->driver_private;
229 seq_printf(m, "Fenced object[%2d] = %p: %s "
230 "%08x %08zx %08x %s %08x %08x %d",
231 i, obj, get_pin_flag(obj_priv),
232 obj_priv->gtt_offset,
233 obj->size, obj_priv->stride,
234 get_tiling_flag(obj_priv),
235 obj->read_domains, obj->write_domain,
236 obj_priv->last_rendering_seqno);
237 if (obj->name)
238 seq_printf(m, " (name: %d)", obj->name);
239 seq_printf(m, "\n");
240 }
241 }
242
243 return 0;
244 }
245
246 static int i915_hws_info(struct seq_file *m, void *data)
247 {
248 struct drm_info_node *node = (struct drm_info_node *) m->private;
249 struct drm_device *dev = node->minor->dev;
250 drm_i915_private_t *dev_priv = dev->dev_private;
251 int i;
252 volatile u32 *hws;
253
254 hws = (volatile u32 *)dev_priv->hw_status_page;
255 if (hws == NULL)
256 return 0;
257
258 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
259 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
260 i * 4,
261 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
262 }
263 return 0;
264 }
265
266 static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
267 {
268 int page, i;
269 uint32_t *mem;
270
271 for (page = 0; page < page_count; page++) {
272 mem = kmap_atomic(pages[page], KM_USER0);
273 for (i = 0; i < PAGE_SIZE; i += 4)
274 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
275 kunmap_atomic(pages[page], KM_USER0);
276 }
277 }
278
279 static int i915_batchbuffer_info(struct seq_file *m, void *data)
280 {
281 struct drm_info_node *node = (struct drm_info_node *) m->private;
282 struct drm_device *dev = node->minor->dev;
283 drm_i915_private_t *dev_priv = dev->dev_private;
284 struct drm_gem_object *obj;
285 struct drm_i915_gem_object *obj_priv;
286 int ret;
287
288 spin_lock(&dev_priv->mm.active_list_lock);
289
290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
291 obj = obj_priv->obj;
292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
293 ret = i915_gem_object_get_pages(obj);
294 if (ret) {
295 DRM_ERROR("Failed to get pages: %d\n", ret);
296 spin_unlock(&dev_priv->mm.active_list_lock);
297 return ret;
298 }
299
300 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
301 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
302
303 i915_gem_object_put_pages(obj);
304 }
305 }
306
307 spin_unlock(&dev_priv->mm.active_list_lock);
308
309 return 0;
310 }
311
312 static int i915_ringbuffer_data(struct seq_file *m, void *data)
313 {
314 struct drm_info_node *node = (struct drm_info_node *) m->private;
315 struct drm_device *dev = node->minor->dev;
316 drm_i915_private_t *dev_priv = dev->dev_private;
317 u8 *virt;
318 uint32_t *ptr, off;
319
320 if (!dev_priv->ring.ring_obj) {
321 seq_printf(m, "No ringbuffer setup\n");
322 return 0;
323 }
324
325 virt = dev_priv->ring.virtual_start;
326
327 for (off = 0; off < dev_priv->ring.Size; off += 4) {
328 ptr = (uint32_t *)(virt + off);
329 seq_printf(m, "%08x : %08x\n", off, *ptr);
330 }
331
332 return 0;
333 }
334
335 static int i915_ringbuffer_info(struct seq_file *m, void *data)
336 {
337 struct drm_info_node *node = (struct drm_info_node *) m->private;
338 struct drm_device *dev = node->minor->dev;
339 drm_i915_private_t *dev_priv = dev->dev_private;
340 unsigned int head, tail;
341
342 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
343 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
344
345 seq_printf(m, "RingHead : %08x\n", head);
346 seq_printf(m, "RingTail : %08x\n", tail);
347 seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size);
348 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
349
350 return 0;
351 }
352
353 static int i915_error_state(struct seq_file *m, void *unused)
354 {
355 struct drm_info_node *node = (struct drm_info_node *) m->private;
356 struct drm_device *dev = node->minor->dev;
357 drm_i915_private_t *dev_priv = dev->dev_private;
358 struct drm_i915_error_state *error;
359 unsigned long flags;
360
361 spin_lock_irqsave(&dev_priv->error_lock, flags);
362 if (!dev_priv->first_error) {
363 seq_printf(m, "no error state collected\n");
364 goto out;
365 }
366
367 error = dev_priv->first_error;
368
369 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
370 error->time.tv_usec);
371 seq_printf(m, "EIR: 0x%08x\n", error->eir);
372 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
373 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
374 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
375 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
376 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
377 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
378 if (IS_I965G(dev)) {
379 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
380 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
381 }
382
383 out:
384 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
385
386 return 0;
387 }
388
389 static int i915_registers_info(struct seq_file *m, void *data) {
390 struct drm_info_node *node = (struct drm_info_node *) m->private;
391 struct drm_device *dev = node->minor->dev;
392 drm_i915_private_t *dev_priv = dev->dev_private;
393 uint32_t reg;
394
395 #define DUMP_RANGE(start, end) \
396 for (reg=start; reg < end; reg += 4) \
397 seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
398
399 DUMP_RANGE(0x00000, 0x00fff); /* VGA registers */
400 DUMP_RANGE(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
401 DUMP_RANGE(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
402 DUMP_RANGE(0x03200, 0x03fff); /* frame buffer compression registers */
403 DUMP_RANGE(0x05000, 0x05fff); /* I/O control registers */
404 DUMP_RANGE(0x06000, 0x06fff); /* clock control registers */
405 DUMP_RANGE(0x07000, 0x07fff); /* 3D internal debug registers */
406 DUMP_RANGE(0x07400, 0x088ff); /* GPE debug registers */
407 DUMP_RANGE(0x0a000, 0x0afff); /* display palette registers */
408 DUMP_RANGE(0x10000, 0x13fff); /* MMIO MCHBAR */
409 DUMP_RANGE(0x30000, 0x3ffff); /* overlay registers */
410 DUMP_RANGE(0x60000, 0x6ffff); /* display engine pipeline registers */
411 DUMP_RANGE(0x70000, 0x72fff); /* display and cursor registers */
412 DUMP_RANGE(0x73000, 0x73fff); /* performance counters */
413
414 return 0;
415 }
416
417 static int
418 i915_wedged_open(struct inode *inode,
419 struct file *filp)
420 {
421 filp->private_data = inode->i_private;
422 return 0;
423 }
424
425 static ssize_t
426 i915_wedged_read(struct file *filp,
427 char __user *ubuf,
428 size_t max,
429 loff_t *ppos)
430 {
431 struct drm_device *dev = filp->private_data;
432 drm_i915_private_t *dev_priv = dev->dev_private;
433 char buf[80];
434 int len;
435
436 len = snprintf(buf, sizeof (buf),
437 "wedged : %d\n",
438 atomic_read(&dev_priv->mm.wedged));
439
440 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
441 }
442
443 static ssize_t
444 i915_wedged_write(struct file *filp,
445 const char __user *ubuf,
446 size_t cnt,
447 loff_t *ppos)
448 {
449 struct drm_device *dev = filp->private_data;
450 drm_i915_private_t *dev_priv = dev->dev_private;
451 char buf[20];
452 int val = 1;
453
454 if (cnt > 0) {
455 if (cnt > sizeof (buf) - 1)
456 return -EINVAL;
457
458 if (copy_from_user(buf, ubuf, cnt))
459 return -EFAULT;
460 buf[cnt] = 0;
461
462 val = simple_strtoul(buf, NULL, 0);
463 }
464
465 DRM_INFO("Manually setting wedged to %d\n", val);
466
467 atomic_set(&dev_priv->mm.wedged, val);
468 if (val) {
469 DRM_WAKEUP(&dev_priv->irq_queue);
470 queue_work(dev_priv->wq, &dev_priv->error_work);
471 }
472
473 return cnt;
474 }
475
476 static const struct file_operations i915_wedged_fops = {
477 .owner = THIS_MODULE,
478 .open = i915_wedged_open,
479 .read = i915_wedged_read,
480 .write = i915_wedged_write,
481 };
482
483 /* As the drm_debugfs_init() routines are called before dev->dev_private is
484 * allocated we need to hook into the minor for release. */
485 static int
486 drm_add_fake_info_node(struct drm_minor *minor,
487 struct dentry *ent,
488 const void *key)
489 {
490 struct drm_info_node *node;
491
492 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
493 if (node == NULL) {
494 debugfs_remove(ent);
495 return -ENOMEM;
496 }
497
498 node->minor = minor;
499 node->dent = ent;
500 node->info_ent = (void *) key;
501 list_add(&node->list, &minor->debugfs_nodes.list);
502
503 return 0;
504 }
505
506 static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
507 {
508 struct drm_device *dev = minor->dev;
509 struct dentry *ent;
510
511 ent = debugfs_create_file("i915_wedged",
512 S_IRUGO | S_IWUSR,
513 root, dev,
514 &i915_wedged_fops);
515 if (IS_ERR(ent))
516 return PTR_ERR(ent);
517
518 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
519 }
520
521 static struct drm_info_list i915_debugfs_list[] = {
522 {"i915_regs", i915_registers_info, 0},
523 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
524 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
525 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
526 {"i915_gem_request", i915_gem_request_info, 0},
527 {"i915_gem_seqno", i915_gem_seqno_info, 0},
528 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
529 {"i915_gem_interrupt", i915_interrupt_info, 0},
530 {"i915_gem_hws", i915_hws_info, 0},
531 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
532 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
533 {"i915_batchbuffers", i915_batchbuffer_info, 0},
534 {"i915_error_state", i915_error_state, 0},
535 };
536 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
537
538 int i915_debugfs_init(struct drm_minor *minor)
539 {
540 int ret;
541
542 ret = i915_wedged_create(minor->debugfs_root, minor);
543 if (ret)
544 return ret;
545
546 return drm_debugfs_create_files(i915_debugfs_list,
547 I915_DEBUGFS_ENTRIES,
548 minor->debugfs_root, minor);
549 }
550
551 void i915_debugfs_cleanup(struct drm_minor *minor)
552 {
553 drm_debugfs_remove_files(i915_debugfs_list,
554 I915_DEBUGFS_ENTRIES, minor);
555 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
556 1, minor);
557 }
558
559 #endif /* CONFIG_DEBUG_FS */
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