1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include <linux/device.h>
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
39 static int i915_modeset
= -1;
40 module_param_named(modeset
, i915_modeset
, int, 0400);
42 unsigned int i915_fbpercrtc
= 0;
43 module_param_named(fbpercrtc
, i915_fbpercrtc
, int, 0400);
45 unsigned int i915_powersave
= 1;
46 module_param_named(powersave
, i915_powersave
, int, 0400);
48 unsigned int i915_lvds_downclock
= 0;
49 module_param_named(lvds_downclock
, i915_lvds_downclock
, int, 0400);
51 static struct drm_driver driver
;
52 extern int intel_agp_enabled
;
54 #define INTEL_VGA_DEVICE(id, info) { \
55 .class = PCI_CLASS_DISPLAY_VGA << 8, \
56 .class_mask = 0xffff00, \
59 .subvendor = PCI_ANY_ID, \
60 .subdevice = PCI_ANY_ID, \
61 .driver_data = (unsigned long) info }
63 static const struct intel_device_info intel_i830_info
= {
64 .is_i8xx
= 1, .is_mobile
= 1, .cursor_needs_physical
= 1,
67 static const struct intel_device_info intel_845g_info
= {
71 static const struct intel_device_info intel_i85x_info
= {
72 .is_i8xx
= 1, .is_i85x
= 1, .is_mobile
= 1,
73 .cursor_needs_physical
= 1,
76 static const struct intel_device_info intel_i865g_info
= {
80 static const struct intel_device_info intel_i915g_info
= {
81 .is_i915g
= 1, .is_i9xx
= 1, .cursor_needs_physical
= 1,
83 static const struct intel_device_info intel_i915gm_info
= {
84 .is_i9xx
= 1, .is_mobile
= 1,
85 .cursor_needs_physical
= 1,
87 static const struct intel_device_info intel_i945g_info
= {
88 .is_i9xx
= 1, .has_hotplug
= 1, .cursor_needs_physical
= 1,
90 static const struct intel_device_info intel_i945gm_info
= {
91 .is_i945gm
= 1, .is_i9xx
= 1, .is_mobile
= 1,
92 .has_hotplug
= 1, .cursor_needs_physical
= 1,
95 static const struct intel_device_info intel_i965g_info
= {
96 .is_i965g
= 1, .is_i9xx
= 1, .has_hotplug
= 1,
99 static const struct intel_device_info intel_i965gm_info
= {
100 .is_i965g
= 1, .is_mobile
= 1, .is_i965gm
= 1, .is_i9xx
= 1,
101 .is_mobile
= 1, .has_fbc
= 1, .has_rc6
= 1,
105 static const struct intel_device_info intel_g33_info
= {
106 .is_g33
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
110 static const struct intel_device_info intel_g45_info
= {
111 .is_i965g
= 1, .is_g4x
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
116 static const struct intel_device_info intel_gm45_info
= {
117 .is_i965g
= 1, .is_mobile
= 1, .is_g4x
= 1, .is_i9xx
= 1,
118 .is_mobile
= 1, .need_gfx_hws
= 1, .has_fbc
= 1, .has_rc6
= 1,
123 static const struct intel_device_info intel_pineview_info
= {
124 .is_g33
= 1, .is_pineview
= 1, .is_mobile
= 1, .is_i9xx
= 1,
129 static const struct intel_device_info intel_ironlake_d_info
= {
130 .is_ironlake
= 1, .is_i965g
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
135 static const struct intel_device_info intel_ironlake_m_info
= {
136 .is_ironlake
= 1, .is_mobile
= 1, .is_i965g
= 1, .is_i9xx
= 1,
137 .need_gfx_hws
= 1, .has_rc6
= 1,
141 static const struct intel_device_info intel_sandybridge_d_info
= {
142 .is_i965g
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
143 .has_hotplug
= 1, .is_gen6
= 1,
146 static const struct intel_device_info intel_sandybridge_m_info
= {
147 .is_i965g
= 1, .is_mobile
= 1, .is_i9xx
= 1, .need_gfx_hws
= 1,
148 .has_hotplug
= 1, .is_gen6
= 1,
151 static const struct pci_device_id pciidlist
[] = {
152 INTEL_VGA_DEVICE(0x3577, &intel_i830_info
),
153 INTEL_VGA_DEVICE(0x2562, &intel_845g_info
),
154 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info
),
155 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info
),
156 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info
),
157 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info
),
158 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info
),
159 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info
),
160 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info
),
161 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info
),
162 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info
),
163 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info
),
164 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info
),
165 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info
),
166 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info
),
167 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info
),
168 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info
),
169 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info
),
170 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info
),
171 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info
),
172 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info
),
173 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info
),
174 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info
),
175 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info
),
176 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info
),
177 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info
),
178 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info
),
179 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info
),
180 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info
),
181 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info
),
182 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info
),
183 INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info
),
187 #if defined(CONFIG_DRM_I915_KMS)
188 MODULE_DEVICE_TABLE(pci
, pciidlist
);
191 #define INTEL_PCH_DEVICE_ID_MASK 0xff00
192 #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
194 void intel_detect_pch (struct drm_device
*dev
)
196 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
200 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
201 * make graphics device passthrough work easy for VMM, that only
202 * need to expose ISA bridge to let driver know the real hardware
203 * underneath. This is a requirement from virtualization team.
205 pch
= pci_get_class(PCI_CLASS_BRIDGE_ISA
<< 8, NULL
);
207 if (pch
->vendor
== PCI_VENDOR_ID_INTEL
) {
209 id
= pch
->device
& INTEL_PCH_DEVICE_ID_MASK
;
211 if (id
== INTEL_PCH_CPT_DEVICE_ID_TYPE
) {
212 dev_priv
->pch_type
= PCH_CPT
;
213 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
220 static int i915_drm_freeze(struct drm_device
*dev
)
222 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
224 pci_save_state(dev
->pdev
);
226 /* If KMS is active, we do the leavevt stuff here */
227 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
228 int error
= i915_gem_idle(dev
);
230 dev_err(&dev
->pdev
->dev
,
231 "GEM idle failed, resume might fail\n");
234 drm_irq_uninstall(dev
);
237 i915_save_state(dev
);
239 intel_opregion_free(dev
, 1);
241 /* Modeset on resume, not lid events */
242 dev_priv
->modeset_on_lid
= 0;
247 int i915_suspend(struct drm_device
*dev
, pm_message_t state
)
251 if (!dev
|| !dev
->dev_private
) {
252 DRM_ERROR("dev: %p\n", dev
);
253 DRM_ERROR("DRM not initialized, aborting suspend.\n");
257 if (state
.event
== PM_EVENT_PRETHAW
)
260 error
= i915_drm_freeze(dev
);
264 if (state
.event
== PM_EVENT_SUSPEND
) {
265 /* Shut down the device */
266 pci_disable_device(dev
->pdev
);
267 pci_set_power_state(dev
->pdev
, PCI_D3hot
);
273 static int i915_drm_thaw(struct drm_device
*dev
)
275 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
278 i915_restore_state(dev
);
280 intel_opregion_init(dev
, 1);
282 /* KMS EnterVT equivalent */
283 if (drm_core_check_feature(dev
, DRIVER_MODESET
)) {
284 mutex_lock(&dev
->struct_mutex
);
285 dev_priv
->mm
.suspended
= 0;
287 error
= i915_gem_init_ringbuffer(dev
);
288 mutex_unlock(&dev
->struct_mutex
);
290 drm_irq_install(dev
);
292 /* Resume the modeset for every activated CRTC */
293 drm_helper_resume_force_mode(dev
);
296 dev_priv
->modeset_on_lid
= 0;
301 int i915_resume(struct drm_device
*dev
)
303 if (pci_enable_device(dev
->pdev
))
306 pci_set_master(dev
->pdev
);
308 return i915_drm_thaw(dev
);
312 * i965_reset - reset chip after a hang
313 * @dev: drm device to reset
314 * @flags: reset domains
316 * Reset the chip. Useful if a hang is detected. Returns zero on successful
317 * reset or otherwise an error code.
319 * Procedure is fairly simple:
320 * - reset the chip using the reset reg
321 * - re-init context state
322 * - re-init hardware status page
323 * - re-init ring buffer
324 * - re-init interrupt state
327 int i965_reset(struct drm_device
*dev
, u8 flags
)
329 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
330 unsigned long timeout
;
333 * We really should only reset the display subsystem if we actually
336 bool need_display
= true;
338 mutex_lock(&dev
->struct_mutex
);
343 i915_gem_retire_requests(dev
, &dev_priv
->render_ring
);
346 i915_save_display(dev
);
348 if (IS_I965G(dev
) || IS_G4X(dev
)) {
350 * Set the domains we want to reset, then the reset bit (bit 0).
351 * Clear the reset bit after a while and wait for hardware status
352 * bit (bit 1) to be set
354 pci_read_config_byte(dev
->pdev
, GDRST
, &gdrst
);
355 pci_write_config_byte(dev
->pdev
, GDRST
, gdrst
| flags
| ((flags
== GDRST_FULL
) ? 0x1 : 0x0));
357 pci_write_config_byte(dev
->pdev
, GDRST
, gdrst
& 0xfe);
359 /* ...we don't want to loop forever though, 500ms should be plenty */
360 timeout
= jiffies
+ msecs_to_jiffies(500);
363 pci_read_config_byte(dev
->pdev
, GDRST
, &gdrst
);
364 } while ((gdrst
& 0x1) && time_after(timeout
, jiffies
));
367 WARN(true, "i915: Failed to reset chip\n");
368 mutex_unlock(&dev
->struct_mutex
);
372 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
373 mutex_unlock(&dev
->struct_mutex
);
377 /* Ok, now get things going again... */
380 * Everything depends on having the GTT running, so we need to start
381 * there. Fortunately we don't need to do this unless we reset the
382 * chip at a PCI level.
384 * Next we need to restore the context, but we don't use those
387 * Ring buffer needs to be re-initialized in the KMS case, or if X
388 * was running at the time of the reset (i.e. we weren't VT
391 if (drm_core_check_feature(dev
, DRIVER_MODESET
) ||
392 !dev_priv
->mm
.suspended
) {
393 struct intel_ring_buffer
*ring
= &dev_priv
->render_ring
;
394 dev_priv
->mm
.suspended
= 0;
395 ring
->init(dev
, ring
);
396 mutex_unlock(&dev
->struct_mutex
);
397 drm_irq_uninstall(dev
);
398 drm_irq_install(dev
);
399 mutex_lock(&dev
->struct_mutex
);
403 * Display needs restore too...
406 i915_restore_display(dev
);
408 mutex_unlock(&dev
->struct_mutex
);
414 i915_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
416 return drm_get_pci_dev(pdev
, ent
, &driver
);
420 i915_pci_remove(struct pci_dev
*pdev
)
422 struct drm_device
*dev
= pci_get_drvdata(pdev
);
427 static int i915_pm_suspend(struct device
*dev
)
429 struct pci_dev
*pdev
= to_pci_dev(dev
);
430 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
433 if (!drm_dev
|| !drm_dev
->dev_private
) {
434 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
438 error
= i915_drm_freeze(drm_dev
);
442 pci_disable_device(pdev
);
443 pci_set_power_state(pdev
, PCI_D3hot
);
448 static int i915_pm_resume(struct device
*dev
)
450 struct pci_dev
*pdev
= to_pci_dev(dev
);
451 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
453 return i915_resume(drm_dev
);
456 static int i915_pm_freeze(struct device
*dev
)
458 struct pci_dev
*pdev
= to_pci_dev(dev
);
459 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
461 if (!drm_dev
|| !drm_dev
->dev_private
) {
462 dev_err(dev
, "DRM not initialized, aborting suspend.\n");
466 return i915_drm_freeze(drm_dev
);
469 static int i915_pm_thaw(struct device
*dev
)
471 struct pci_dev
*pdev
= to_pci_dev(dev
);
472 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
474 return i915_drm_thaw(drm_dev
);
477 static int i915_pm_poweroff(struct device
*dev
)
479 struct pci_dev
*pdev
= to_pci_dev(dev
);
480 struct drm_device
*drm_dev
= pci_get_drvdata(pdev
);
482 return i915_drm_freeze(drm_dev
);
485 const struct dev_pm_ops i915_pm_ops
= {
486 .suspend
= i915_pm_suspend
,
487 .resume
= i915_pm_resume
,
488 .freeze
= i915_pm_freeze
,
489 .thaw
= i915_pm_thaw
,
490 .poweroff
= i915_pm_poweroff
,
491 .restore
= i915_pm_resume
,
494 static struct vm_operations_struct i915_gem_vm_ops
= {
495 .fault
= i915_gem_fault
,
496 .open
= drm_gem_vm_open
,
497 .close
= drm_gem_vm_close
,
500 static struct drm_driver driver
= {
501 /* don't use mtrr's here, the Xserver or user space app should
502 * deal with them for intel hardware.
505 DRIVER_USE_AGP
| DRIVER_REQUIRE_AGP
| /* DRIVER_USE_MTRR |*/
506 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
,
507 .load
= i915_driver_load
,
508 .unload
= i915_driver_unload
,
509 .open
= i915_driver_open
,
510 .lastclose
= i915_driver_lastclose
,
511 .preclose
= i915_driver_preclose
,
512 .postclose
= i915_driver_postclose
,
514 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
515 .suspend
= i915_suspend
,
516 .resume
= i915_resume
,
518 .device_is_agp
= i915_driver_device_is_agp
,
519 .enable_vblank
= i915_enable_vblank
,
520 .disable_vblank
= i915_disable_vblank
,
521 .irq_preinstall
= i915_driver_irq_preinstall
,
522 .irq_postinstall
= i915_driver_irq_postinstall
,
523 .irq_uninstall
= i915_driver_irq_uninstall
,
524 .irq_handler
= i915_driver_irq_handler
,
525 .reclaim_buffers
= drm_core_reclaim_buffers
,
526 .get_map_ofs
= drm_core_get_map_ofs
,
527 .get_reg_ofs
= drm_core_get_reg_ofs
,
528 .master_create
= i915_master_create
,
529 .master_destroy
= i915_master_destroy
,
530 #if defined(CONFIG_DEBUG_FS)
531 .debugfs_init
= i915_debugfs_init
,
532 .debugfs_cleanup
= i915_debugfs_cleanup
,
534 .gem_init_object
= i915_gem_init_object
,
535 .gem_free_object
= i915_gem_free_object
,
536 .gem_vm_ops
= &i915_gem_vm_ops
,
537 .ioctls
= i915_ioctls
,
539 .owner
= THIS_MODULE
,
541 .release
= drm_release
,
542 .unlocked_ioctl
= drm_ioctl
,
543 .mmap
= drm_gem_mmap
,
545 .fasync
= drm_fasync
,
548 .compat_ioctl
= i915_compat_ioctl
,
554 .id_table
= pciidlist
,
555 .probe
= i915_pci_probe
,
556 .remove
= i915_pci_remove
,
557 .driver
.pm
= &i915_pm_ops
,
563 .major
= DRIVER_MAJOR
,
564 .minor
= DRIVER_MINOR
,
565 .patchlevel
= DRIVER_PATCHLEVEL
,
568 static int __init
i915_init(void)
570 if (!intel_agp_enabled
) {
571 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
575 driver
.num_ioctls
= i915_max_ioctl
;
577 i915_gem_shrinker_init();
580 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
581 * explicitly disabled with the module pararmeter.
583 * Otherwise, just follow the parameter (defaulting to off).
585 * Allow optional vga_text_mode_force boot option to override
586 * the default behavior.
588 #if defined(CONFIG_DRM_I915_KMS)
589 if (i915_modeset
!= 0)
590 driver
.driver_features
|= DRIVER_MODESET
;
592 if (i915_modeset
== 1)
593 driver
.driver_features
|= DRIVER_MODESET
;
595 #ifdef CONFIG_VGA_CONSOLE
596 if (vgacon_text_force() && i915_modeset
== -1)
597 driver
.driver_features
&= ~DRIVER_MODESET
;
600 if (!(driver
.driver_features
& DRIVER_MODESET
)) {
601 driver
.suspend
= i915_suspend
;
602 driver
.resume
= i915_resume
;
605 return drm_init(&driver
);
608 static void __exit
i915_exit(void)
610 i915_gem_shrinker_exit();
614 module_init(i915_init
);
615 module_exit(i915_exit
);
617 MODULE_AUTHOR(DRIVER_AUTHOR
);
618 MODULE_DESCRIPTION(DRIVER_DESC
);
619 MODULE_LICENSE("GPL and additional rights");