drivers/gpu/drm/i915/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include <linux/device.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 #include <linux/console.h>
  37 #include "drm_crtc_helper.h"
  38
  39 static int i915_modeset = -1;
  40 module_param_named(modeset, i915_modeset, int, 0400);
  41
  42 unsigned int i915_fbpercrtc = 0;
  43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  44
  45 unsigned int i915_powersave = 1;
  46 module_param_named(powersave, i915_powersave, int, 0400);
  47
  48 unsigned int i915_lvds_downclock = 0;
  49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  50
  51 static struct drm_driver driver;
  52 extern int intel_agp_enabled;
  53
  54 #define INTEL_VGA_DEVICE(id, info) {            \
  55         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
  56         .class_mask = 0xffff00,                 \
  57         .vendor = 0x8086,                       \
  58         .device = id,                           \
  59         .subvendor = PCI_ANY_ID,                \
  60         .subdevice = PCI_ANY_ID,                \
  61         .driver_data = (unsigned long) info }
  62
  63 static const struct intel_device_info intel_i830_info = {
  64         .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
  65         .has_overlay = 1, .overlay_needs_physical = 1,
  66 };
  67
  68 static const struct intel_device_info intel_845g_info = {
  69         .gen = 2,
  70         .has_overlay = 1, .overlay_needs_physical = 1,
  71 };
  72
  73 static const struct intel_device_info intel_i85x_info = {
  74         .gen = 2, .is_i85x = 1, .is_mobile = 1,
  75         .cursor_needs_physical = 1,
  76         .has_overlay = 1, .overlay_needs_physical = 1,
  77 };
  78
  79 static const struct intel_device_info intel_i865g_info = {
  80         .gen = 2,
  81         .has_overlay = 1, .overlay_needs_physical = 1,
  82 };
  83
  84 static const struct intel_device_info intel_i915g_info = {
  85         .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
  86         .has_overlay = 1, .overlay_needs_physical = 1,
  87 };
  88 static const struct intel_device_info intel_i915gm_info = {
  89         .gen = 3, .is_mobile = 1,
  90         .cursor_needs_physical = 1,
  91         .has_overlay = 1, .overlay_needs_physical = 1,
  92         .supports_tv = 1,
  93 };
  94 static const struct intel_device_info intel_i945g_info = {
  95         .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
  96         .has_overlay = 1, .overlay_needs_physical = 1,
  97 };
  98 static const struct intel_device_info intel_i945gm_info = {
  99         .gen = 3, .is_i945gm = 1, .is_mobile = 1,
 100         .has_hotplug = 1, .cursor_needs_physical = 1,
 101         .has_overlay = 1, .overlay_needs_physical = 1,
 102         .supports_tv = 1,
 103 };
 104
 105 static const struct intel_device_info intel_i965g_info = {
 106         .gen = 4, .is_broadwater = 1,
 107         .has_hotplug = 1,
 108         .has_overlay = 1,
 109 };
 110
 111 static const struct intel_device_info intel_i965gm_info = {
 112         .gen = 4, .is_crestline = 1,
 113         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 114         .has_overlay = 1,
 115         .supports_tv = 1,
 116 };
 117
 118 static const struct intel_device_info intel_g33_info = {
 119         .gen = 3, .is_g33 = 1,
 120         .need_gfx_hws = 1, .has_hotplug = 1,
 121         .has_overlay = 1,
 122 };
 123
 124 static const struct intel_device_info intel_g45_info = {
 125         .gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
 126         .has_pipe_cxsr = 1, .has_hotplug = 1,
 127 };
 128
 129 static const struct intel_device_info intel_gm45_info = {
 130         .gen = 4, .is_g4x = 1,
 131         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
 132         .has_pipe_cxsr = 1, .has_hotplug = 1,
 133         .supports_tv = 1,
 134 };
 135
 136 static const struct intel_device_info intel_pineview_info = {
 137         .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
 138         .need_gfx_hws = 1, .has_hotplug = 1,
 139         .has_overlay = 1,
 140 };
 141
 142 static const struct intel_device_info intel_ironlake_d_info = {
 143         .gen = 5, .is_ironlake = 1,
 144         .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
 145 };
 146
 147 static const struct intel_device_info intel_ironlake_m_info = {
 148         .gen = 5, .is_ironlake = 1, .is_mobile = 1,
 149         .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
 150 };
 151
 152 static const struct intel_device_info intel_sandybridge_d_info = {
 153         .gen = 6,
 154         .need_gfx_hws = 1, .has_hotplug = 1,
 155 };
 156
 157 static const struct intel_device_info intel_sandybridge_m_info = {
 158         .gen = 6, .is_mobile = 1,
 159         .need_gfx_hws = 1, .has_hotplug = 1,
 160 };
 161
 162 static const struct pci_device_id pciidlist[] = {               /* aka */
 163         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),             /* I830_M */
 164         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),             /* 845_G */
 165         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),             /* I855_GM */
 166         INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
 167         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),            /* I865_G */
 168         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),            /* I915_G */
 169         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),            /* E7221_G */
 170         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),           /* I915_GM */
 171         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),            /* I945_G */
 172         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),           /* I945_GM */
 173         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),           /* I945_GME */
 174         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),            /* I946_GZ */
 175         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),            /* G35_G */
 176         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),            /* I965_Q */
 177         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),            /* I965_G */
 178         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),              /* Q35_G */
 179         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),              /* G33_G */
 180         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),              /* Q33_G */
 181         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),           /* I965_GM */
 182         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),           /* I965_GME */
 183         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),             /* GM45_G */
 184         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),              /* IGD_E_G */
 185         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),              /* Q45_G */
 186         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),              /* G45_G */
 187         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),              /* G41_G */
 188         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),              /* B43_G */
 189         INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),              /* B43_G.1 */
 190         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
 191         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
 192         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
 193         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
 194         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
 195         INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
 196         INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
 197         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
 198         INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
 199         INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
 200         INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
 201         {0, 0, 0}
 202 };
 203
 204 #if defined(CONFIG_DRM_I915_KMS)
 205 MODULE_DEVICE_TABLE(pci, pciidlist);
 206 #endif
 207
 208 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
 209 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 210
 211 void intel_detect_pch (struct drm_device *dev)
 212 {
 213         struct drm_i915_private *dev_priv = dev->dev_private;
 214         struct pci_dev *pch;
 215
 216         /*
 217          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 218          * make graphics device passthrough work easy for VMM, that only
 219          * need to expose ISA bridge to let driver know the real hardware
 220          * underneath. This is a requirement from virtualization team.
 221          */
 222         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
 223         if (pch) {
 224                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
 225                         int id;
 226                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 227
 228                         if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 229                                 dev_priv->pch_type = PCH_CPT;
 230                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 231                         }
 232                 }
 233                 pci_dev_put(pch);
 234         }
 235 }
 236
 237 static int i915_drm_freeze(struct drm_device *dev)
 238 {
 239         struct drm_i915_private *dev_priv = dev->dev_private;
 240
 241         pci_save_state(dev->pdev);
 242
 243         /* If KMS is active, we do the leavevt stuff here */
 244         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 245                 int error = i915_gem_idle(dev);
 246                 if (error) {
 247                         dev_err(&dev->pdev->dev,
 248                                 "GEM idle failed, resume might fail\n");
 249                         return error;
 250                 }
 251                 drm_irq_uninstall(dev);
 252         }
 253
 254         i915_save_state(dev);
 255
 256         intel_opregion_fini(dev);
 257
 258         /* Modeset on resume, not lid events */
 259         dev_priv->modeset_on_lid = 0;
 260
 261         return 0;
 262 }
 263
 264 int i915_suspend(struct drm_device *dev, pm_message_t state)
 265 {
 266         int error;
 267
 268         if (!dev || !dev->dev_private) {
 269                 DRM_ERROR("dev: %p\n", dev);
 270                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
 271                 return -ENODEV;
 272         }
 273
 274         if (state.event == PM_EVENT_PRETHAW)
 275                 return 0;
 276
 277         error = i915_drm_freeze(dev);
 278         if (error)
 279                 return error;
 280
 281         if (state.event == PM_EVENT_SUSPEND) {
 282                 /* Shut down the device */
 283                 pci_disable_device(dev->pdev);
 284                 pci_set_power_state(dev->pdev, PCI_D3hot);
 285         }
 286
 287         return 0;
 288 }
 289
 290 static int i915_drm_thaw(struct drm_device *dev)
 291 {
 292         struct drm_i915_private *dev_priv = dev->dev_private;
 293         int error = 0;
 294
 295         i915_restore_state(dev);
 296         intel_opregion_setup(dev);
 297
 298         /* KMS EnterVT equivalent */
 299         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 300                 mutex_lock(&dev->struct_mutex);
 301                 dev_priv->mm.suspended = 0;
 302
 303                 error = i915_gem_init_ringbuffer(dev);
 304                 mutex_unlock(&dev->struct_mutex);
 305
 306                 drm_irq_install(dev);
 307
 308                 /* Resume the modeset for every activated CRTC */
 309                 drm_helper_resume_force_mode(dev);
 310         }
 311
 312         intel_opregion_init(dev);
 313
 314         dev_priv->modeset_on_lid = 0;
 315
 316         return error;
 317 }
 318
 319 int i915_resume(struct drm_device *dev)
 320 {
 321         if (pci_enable_device(dev->pdev))
 322                 return -EIO;
 323
 324         pci_set_master(dev->pdev);
 325
 326         return i915_drm_thaw(dev);
 327 }
 328
 329 /**
 330  * i965_reset - reset chip after a hang
 331  * @dev: drm device to reset
 332  * @flags: reset domains
 333  *
 334  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 335  * reset or otherwise an error code.
 336  *
 337  * Procedure is fairly simple:
 338  *   - reset the chip using the reset reg
 339  *   - re-init context state
 340  *   - re-init hardware status page
 341  *   - re-init ring buffer
 342  *   - re-init interrupt state
 343  *   - re-init display
 344  */
 345 int i965_reset(struct drm_device *dev, u8 flags)
 346 {
 347         drm_i915_private_t *dev_priv = dev->dev_private;
 348         unsigned long timeout;
 349         u8 gdrst;
 350         /*
 351          * We really should only reset the display subsystem if we actually
 352          * need to
 353          */
 354         bool need_display = true;
 355
 356         mutex_lock(&dev->struct_mutex);
 357
 358         /*
 359          * Clear request list
 360          */
 361         i915_gem_retire_requests(dev);
 362
 363         if (need_display)
 364                 i915_save_display(dev);
 365
 366         /*
 367          * Set the domains we want to reset, then the reset bit (bit 0).
 368          * Clear the reset bit after a while and wait for hardware status
 369          * bit (bit 1) to be set
 370          */
 371         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 372         pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
 373         udelay(50);
 374         pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
 375
 376         /* ...we don't want to loop forever though, 500ms should be plenty */
 377        timeout = jiffies + msecs_to_jiffies(500);
 378         do {
 379                 udelay(100);
 380                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 381         } while ((gdrst & 0x1) && time_after(timeout, jiffies));
 382
 383         if (gdrst & 0x1) {
 384                 WARN(true, "i915: Failed to reset chip\n");
 385                 mutex_unlock(&dev->struct_mutex);
 386                 return -EIO;
 387         }
 388
 389         /* Ok, now get things going again... */
 390
 391         /*
 392          * Everything depends on having the GTT running, so we need to start
 393          * there.  Fortunately we don't need to do this unless we reset the
 394          * chip at a PCI level.
 395          *
 396          * Next we need to restore the context, but we don't use those
 397          * yet either...
 398          *
 399          * Ring buffer needs to be re-initialized in the KMS case, or if X
 400          * was running at the time of the reset (i.e. we weren't VT
 401          * switched away).
 402          */
 403         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
 404                         !dev_priv->mm.suspended) {
 405                 struct intel_ring_buffer *ring = &dev_priv->render_ring;
 406                 dev_priv->mm.suspended = 0;
 407                 ring->init(dev, ring);
 408                 mutex_unlock(&dev->struct_mutex);
 409                 drm_irq_uninstall(dev);
 410                 drm_irq_install(dev);
 411                 mutex_lock(&dev->struct_mutex);
 412         }
 413
 414         /*
 415          * Display needs restore too...
 416          */
 417         if (need_display)
 418                 i915_restore_display(dev);
 419
 420         mutex_unlock(&dev->struct_mutex);
 421         return 0;
 422 }
 423
 424
 425 static int __devinit
 426 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 427 {
 428         return drm_get_pci_dev(pdev, ent, &driver);
 429 }
 430
 431 static void
 432 i915_pci_remove(struct pci_dev *pdev)
 433 {
 434         struct drm_device *dev = pci_get_drvdata(pdev);
 435
 436         drm_put_dev(dev);
 437 }
 438
 439 static int i915_pm_suspend(struct device *dev)
 440 {
 441         struct pci_dev *pdev = to_pci_dev(dev);
 442         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 443         int error;
 444
 445         if (!drm_dev || !drm_dev->dev_private) {
 446                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 447                 return -ENODEV;
 448         }
 449
 450         error = i915_drm_freeze(drm_dev);
 451         if (error)
 452                 return error;
 453
 454         pci_disable_device(pdev);
 455         pci_set_power_state(pdev, PCI_D3hot);
 456
 457         return 0;
 458 }
 459
 460 static int i915_pm_resume(struct device *dev)
 461 {
 462         struct pci_dev *pdev = to_pci_dev(dev);
 463         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 464
 465         return i915_resume(drm_dev);
 466 }
 467
 468 static int i915_pm_freeze(struct device *dev)
 469 {
 470         struct pci_dev *pdev = to_pci_dev(dev);
 471         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 472
 473         if (!drm_dev || !drm_dev->dev_private) {
 474                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 475                 return -ENODEV;
 476         }
 477
 478         return i915_drm_freeze(drm_dev);
 479 }
 480
 481 static int i915_pm_thaw(struct device *dev)
 482 {
 483         struct pci_dev *pdev = to_pci_dev(dev);
 484         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 485
 486         return i915_drm_thaw(drm_dev);
 487 }
 488
 489 static int i915_pm_poweroff(struct device *dev)
 490 {
 491         struct pci_dev *pdev = to_pci_dev(dev);
 492         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 493
 494         return i915_drm_freeze(drm_dev);
 495 }
 496
 497 static const struct dev_pm_ops i915_pm_ops = {
 498      .suspend = i915_pm_suspend,
 499      .resume = i915_pm_resume,
 500      .freeze = i915_pm_freeze,
 501      .thaw = i915_pm_thaw,
 502      .poweroff = i915_pm_poweroff,
 503      .restore = i915_pm_resume,
 504 };
 505
 506 static struct vm_operations_struct i915_gem_vm_ops = {
 507         .fault = i915_gem_fault,
 508         .open = drm_gem_vm_open,
 509         .close = drm_gem_vm_close,
 510 };
 511
 512 static struct drm_driver driver = {
 513         /* don't use mtrr's here, the Xserver or user space app should
 514          * deal with them for intel hardware.
 515          */
 516         .driver_features =
 517             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
 518             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 519         .load = i915_driver_load,
 520         .unload = i915_driver_unload,
 521         .open = i915_driver_open,
 522         .lastclose = i915_driver_lastclose,
 523         .preclose = i915_driver_preclose,
 524         .postclose = i915_driver_postclose,
 525
 526         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 527         .suspend = i915_suspend,
 528         .resume = i915_resume,
 529
 530         .device_is_agp = i915_driver_device_is_agp,
 531         .enable_vblank = i915_enable_vblank,
 532         .disable_vblank = i915_disable_vblank,
 533         .irq_preinstall = i915_driver_irq_preinstall,
 534         .irq_postinstall = i915_driver_irq_postinstall,
 535         .irq_uninstall = i915_driver_irq_uninstall,
 536         .irq_handler = i915_driver_irq_handler,
 537         .reclaim_buffers = drm_core_reclaim_buffers,
 538         .master_create = i915_master_create,
 539         .master_destroy = i915_master_destroy,
 540 #if defined(CONFIG_DEBUG_FS)
 541         .debugfs_init = i915_debugfs_init,
 542         .debugfs_cleanup = i915_debugfs_cleanup,
 543 #endif
 544         .gem_init_object = i915_gem_init_object,
 545         .gem_free_object = i915_gem_free_object,
 546         .gem_vm_ops = &i915_gem_vm_ops,
 547         .ioctls = i915_ioctls,
 548         .fops = {
 549                  .owner = THIS_MODULE,
 550                  .open = drm_open,
 551                  .release = drm_release,
 552                  .unlocked_ioctl = drm_ioctl,
 553                  .mmap = drm_gem_mmap,
 554                  .poll = drm_poll,
 555                  .fasync = drm_fasync,
 556                  .read = drm_read,
 557 #ifdef CONFIG_COMPAT
 558                  .compat_ioctl = i915_compat_ioctl,
 559 #endif
 560         },
 561
 562         .pci_driver = {
 563                  .name = DRIVER_NAME,
 564                  .id_table = pciidlist,
 565                  .probe = i915_pci_probe,
 566                  .remove = i915_pci_remove,
 567                  .driver.pm = &i915_pm_ops,
 568         },
 569
 570         .name = DRIVER_NAME,
 571         .desc = DRIVER_DESC,
 572         .date = DRIVER_DATE,
 573         .major = DRIVER_MAJOR,
 574         .minor = DRIVER_MINOR,
 575         .patchlevel = DRIVER_PATCHLEVEL,
 576 };
 577
 578 static int __init i915_init(void)
 579 {
 580         if (!intel_agp_enabled) {
 581                 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 582                 return -ENODEV;
 583         }
 584
 585         driver.num_ioctls = i915_max_ioctl;
 586
 587         i915_gem_shrinker_init();
 588
 589         /*
 590          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
 591          * explicitly disabled with the module pararmeter.
 592          *
 593          * Otherwise, just follow the parameter (defaulting to off).
 594          *
 595          * Allow optional vga_text_mode_force boot option to override
 596          * the default behavior.
 597          */
 598 #if defined(CONFIG_DRM_I915_KMS)
 599         if (i915_modeset != 0)
 600                 driver.driver_features |= DRIVER_MODESET;
 601 #endif
 602         if (i915_modeset == 1)
 603                 driver.driver_features |= DRIVER_MODESET;
 604
 605 #ifdef CONFIG_VGA_CONSOLE
 606         if (vgacon_text_force() && i915_modeset == -1)
 607                 driver.driver_features &= ~DRIVER_MODESET;
 608 #endif
 609
 610         if (!(driver.driver_features & DRIVER_MODESET)) {
 611                 driver.suspend = i915_suspend;
 612                 driver.resume = i915_resume;
 613         }
 614
 615         return drm_init(&driver);
 616 }
 617
 618 static void __exit i915_exit(void)
 619 {
 620         i915_gem_shrinker_exit();
 621         drm_exit(&driver);
 622 }
 623
 624 module_init(i915_init);
 625 module_exit(i915_exit);
 626
 627 MODULE_AUTHOR(DRIVER_AUTHOR);
 628 MODULE_DESCRIPTION(DRIVER_DESC);
 629 MODULE_LICENSE("GPL and additional rights");