drm/i915: Piggy back hangstats off of contexts
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_gem_context.c
1 /*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28 /*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded its state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
88 #include <drm/drmP.h>
89 #include <drm/i915_drm.h>
90 #include "i915_drv.h"
91
92 /* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96 #define GEN6_CONTEXT_ALIGN (64<<10)
97 #define GEN7_CONTEXT_ALIGN 4096
98
99 static struct i915_hw_context *
100 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
101 static int do_switch(struct intel_ring_buffer *ring,
102 struct i915_hw_context *to);
103
104 static size_t get_context_alignment(struct drm_device *dev)
105 {
106 if (IS_GEN6(dev))
107 return GEN6_CONTEXT_ALIGN;
108
109 return GEN7_CONTEXT_ALIGN;
110 }
111
112 static int get_context_size(struct drm_device *dev)
113 {
114 struct drm_i915_private *dev_priv = dev->dev_private;
115 int ret;
116 u32 reg;
117
118 switch (INTEL_INFO(dev)->gen) {
119 case 6:
120 reg = I915_READ(CXT_SIZE);
121 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
122 break;
123 case 7:
124 reg = I915_READ(GEN7_CXT_SIZE);
125 if (IS_HASWELL(dev))
126 ret = HSW_CXT_TOTAL_SIZE;
127 else
128 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
129 break;
130 case 8:
131 ret = GEN8_CXT_TOTAL_SIZE;
132 break;
133 default:
134 BUG();
135 }
136
137 return ret;
138 }
139
140 void i915_gem_context_free(struct kref *ctx_ref)
141 {
142 struct i915_hw_context *ctx = container_of(ctx_ref,
143 typeof(*ctx), ref);
144 struct i915_hw_ppgtt *ppgtt = NULL;
145
146 /* We refcount even the aliasing PPGTT to keep the code symmetric */
147 if (USES_ALIASING_PPGTT(ctx->obj->base.dev))
148 ppgtt = ctx_to_ppgtt(ctx);
149
150 /* XXX: Free up the object before tearing down the address space, in
151 * case we're bound in the PPGTT */
152 drm_gem_object_unreference(&ctx->obj->base);
153
154 if (ppgtt)
155 kref_put(&ppgtt->ref, ppgtt_release);
156 list_del(&ctx->link);
157 kfree(ctx);
158 }
159
160 static struct i915_hw_ppgtt *
161 create_vm_for_ctx(struct drm_device *dev, struct i915_hw_context *ctx)
162 {
163 struct i915_hw_ppgtt *ppgtt;
164 int ret;
165
166 ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
167 if (!ppgtt)
168 return ERR_PTR(-ENOMEM);
169
170 ret = i915_gem_init_ppgtt(dev, ppgtt);
171 if (ret) {
172 kfree(ppgtt);
173 return ERR_PTR(ret);
174 }
175
176 return ppgtt;
177 }
178
179 static struct i915_hw_context *
180 __create_hw_context(struct drm_device *dev,
181 struct drm_i915_file_private *file_priv)
182 {
183 struct drm_i915_private *dev_priv = dev->dev_private;
184 struct i915_hw_context *ctx;
185 int ret;
186
187 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
188 if (ctx == NULL)
189 return ERR_PTR(-ENOMEM);
190
191 kref_init(&ctx->ref);
192 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
193 INIT_LIST_HEAD(&ctx->link);
194 if (ctx->obj == NULL) {
195 kfree(ctx);
196 DRM_DEBUG_DRIVER("Context object allocated failed\n");
197 return ERR_PTR(-ENOMEM);
198 }
199
200 if (INTEL_INFO(dev)->gen >= 7) {
201 ret = i915_gem_object_set_cache_level(ctx->obj,
202 I915_CACHE_L3_LLC);
203 /* Failure shouldn't ever happen this early */
204 if (WARN_ON(ret))
205 goto err_out;
206 }
207
208 list_add_tail(&ctx->link, &dev_priv->context_list);
209
210 /* Default context will never have a file_priv */
211 if (file_priv == NULL)
212 return ctx;
213
214 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID, 0,
215 GFP_KERNEL);
216 if (ret < 0)
217 goto err_out;
218
219 ctx->file_priv = file_priv;
220 ctx->id = ret;
221 /* NB: Mark all slices as needing a remap so that when the context first
222 * loads it will restore whatever remap state already exists. If there
223 * is no remap info, it will be a NOP. */
224 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
225
226 return ctx;
227
228 err_out:
229 i915_gem_context_unreference(ctx);
230 return ERR_PTR(ret);
231 }
232
233 static inline bool is_default_context(struct i915_hw_context *ctx)
234 {
235 return (ctx->id == DEFAULT_CONTEXT_ID);
236 }
237
238 /**
239 * The default context needs to exist per ring that uses contexts. It stores the
240 * context state of the GPU for applications that don't utilize HW contexts, as
241 * well as an idle case.
242 */
243 static struct i915_hw_context *
244 i915_gem_create_context(struct drm_device *dev,
245 struct drm_i915_file_private *file_priv,
246 bool create_vm)
247 {
248 struct drm_i915_private *dev_priv = dev->dev_private;
249 struct i915_hw_context *ctx;
250 int ret = 0;
251
252 BUG_ON(!mutex_is_locked(&dev->struct_mutex));
253
254 ctx = __create_hw_context(dev, file_priv);
255 if (IS_ERR(ctx))
256 return ctx;
257
258 if (create_vm) {
259 struct i915_hw_ppgtt *ppgtt = create_vm_for_ctx(dev, ctx);
260
261 if (IS_ERR_OR_NULL(ppgtt)) {
262 DRM_DEBUG_DRIVER("PPGTT setup failed (%ld)\n",
263 PTR_ERR(ppgtt));
264 ret = PTR_ERR(ppgtt);
265 goto err_destroy;
266 } else
267 ctx->vm = &ppgtt->base;
268
269 /* This case is reserved for the global default context and
270 * should only happen once. */
271 if (!file_priv) {
272 if (WARN_ON(dev_priv->mm.aliasing_ppgtt)) {
273 ret = -EEXIST;
274 goto err_destroy;
275 }
276
277 dev_priv->mm.aliasing_ppgtt = ppgtt;
278
279 /* We may need to do things with the shrinker which
280 * require us to immediately switch back to the default
281 * context. This can cause a problem as pinning the
282 * default context also requires GTT space which may not
283 * be available. To avoid this we always pin the default
284 * context.
285 */
286 ret = i915_gem_obj_ggtt_pin(ctx->obj,
287 get_context_alignment(dev),
288 false, false);
289 if (ret) {
290 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
291 goto err_destroy;
292 }
293 }
294 } else if (USES_ALIASING_PPGTT(dev)) {
295 /* For platforms which only have aliasing PPGTT, we fake the
296 * address space and refcounting. */
297 kref_get(&dev_priv->mm.aliasing_ppgtt->ref);
298 }
299
300 /* TODO: Until full ppgtt... */
301 if (USES_ALIASING_PPGTT(dev))
302 ctx->vm = &dev_priv->mm.aliasing_ppgtt->base;
303 else
304 ctx->vm = &dev_priv->gtt.base;
305
306 return ctx;
307
308 err_destroy:
309 i915_gem_context_unreference(ctx);
310 return ERR_PTR(ret);
311 }
312
313 void i915_gem_context_reset(struct drm_device *dev)
314 {
315 struct drm_i915_private *dev_priv = dev->dev_private;
316 struct intel_ring_buffer *ring;
317 int i;
318
319 if (!HAS_HW_CONTEXTS(dev))
320 return;
321
322 /* Prevent the hardware from restoring the last context (which hung) on
323 * the next switch */
324 for (i = 0; i < I915_NUM_RINGS; i++) {
325 struct i915_hw_context *dctx;
326 if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
327 continue;
328
329 /* Do a fake switch to the default context */
330 ring = &dev_priv->ring[i];
331 dctx = ring->default_context;
332 if (WARN_ON(!dctx))
333 continue;
334
335 if (!ring->last_context)
336 continue;
337
338 if (ring->last_context == dctx)
339 continue;
340
341 if (i == RCS) {
342 WARN_ON(i915_gem_obj_ggtt_pin(dctx->obj,
343 get_context_alignment(dev),
344 false, false));
345 /* Fake a finish/inactive */
346 dctx->obj->base.write_domain = 0;
347 dctx->obj->active = 0;
348 }
349
350 i915_gem_context_unreference(ring->last_context);
351 i915_gem_context_reference(dctx);
352 ring->last_context = dctx;
353 }
354 }
355
356 int i915_gem_context_init(struct drm_device *dev)
357 {
358 struct drm_i915_private *dev_priv = dev->dev_private;
359 struct intel_ring_buffer *ring;
360 int i;
361
362 if (!HAS_HW_CONTEXTS(dev))
363 return 0;
364
365 /* Init should only be called once per module load. Eventually the
366 * restriction on the context_disabled check can be loosened. */
367 if (WARN_ON(dev_priv->ring[RCS].default_context))
368 return 0;
369
370 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
371
372 if (dev_priv->hw_context_size > (1<<20)) {
373 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
374 return -E2BIG;
375 }
376
377 dev_priv->ring[RCS].default_context =
378 i915_gem_create_context(dev, NULL, USES_ALIASING_PPGTT(dev));
379
380 if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) {
381 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n",
382 PTR_ERR(dev_priv->ring[RCS].default_context));
383 return PTR_ERR(dev_priv->ring[RCS].default_context);
384 }
385
386 for (i = RCS + 1; i < I915_NUM_RINGS; i++) {
387 if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
388 continue;
389
390 ring = &dev_priv->ring[i];
391
392 /* NB: RCS will hold a ref for all rings */
393 ring->default_context = dev_priv->ring[RCS].default_context;
394 }
395
396 DRM_DEBUG_DRIVER("HW context support initialized\n");
397 return 0;
398 }
399
400 void i915_gem_context_fini(struct drm_device *dev)
401 {
402 struct drm_i915_private *dev_priv = dev->dev_private;
403 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
404 int i;
405
406 if (!HAS_HW_CONTEXTS(dev))
407 return;
408
409 /* The only known way to stop the gpu from accessing the hw context is
410 * to reset it. Do this as the very last operation to avoid confusing
411 * other code, leading to spurious errors. */
412 intel_gpu_reset(dev);
413
414 /* When default context is created and switched to, base object refcount
415 * will be 2 (+1 from object creation and +1 from do_switch()).
416 * i915_gem_context_fini() will be called after gpu_idle() has switched
417 * to default context. So we need to unreference the base object once
418 * to offset the do_switch part, so that i915_gem_context_unreference()
419 * can then free the base object correctly. */
420 WARN_ON(!dev_priv->ring[RCS].last_context);
421 if (dev_priv->ring[RCS].last_context == dctx) {
422 /* Fake switch to NULL context */
423 WARN_ON(dctx->obj->active);
424 i915_gem_object_ggtt_unpin(dctx->obj);
425 i915_gem_context_unreference(dctx);
426 dev_priv->ring[RCS].last_context = NULL;
427 }
428
429 for (i = 0; i < I915_NUM_RINGS; i++) {
430 struct intel_ring_buffer *ring = &dev_priv->ring[i];
431 if (!(INTEL_INFO(dev)->ring_mask & (1<<i)))
432 continue;
433
434 if (ring->last_context)
435 i915_gem_context_unreference(ring->last_context);
436
437 ring->default_context = NULL;
438 ring->last_context = NULL;
439 }
440
441 i915_gem_object_ggtt_unpin(dctx->obj);
442 i915_gem_context_unreference(dctx);
443 dev_priv->mm.aliasing_ppgtt = NULL;
444 }
445
446 int i915_gem_context_enable(struct drm_i915_private *dev_priv)
447 {
448 struct intel_ring_buffer *ring;
449 int ret, i;
450
451 if (!HAS_HW_CONTEXTS(dev_priv->dev))
452 return 0;
453
454 /* This is the only place the aliasing PPGTT gets enabled, which means
455 * it has to happen before we bail on reset */
456 if (dev_priv->mm.aliasing_ppgtt) {
457 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
458 ppgtt->enable(ppgtt);
459 }
460
461 /* FIXME: We should make this work, even in reset */
462 if (i915_reset_in_progress(&dev_priv->gpu_error))
463 return 0;
464
465 BUG_ON(!dev_priv->ring[RCS].default_context);
466
467 for_each_ring(ring, dev_priv, i) {
468 ret = do_switch(ring, ring->default_context);
469 if (ret)
470 return ret;
471 }
472
473 return 0;
474 }
475
476 static int context_idr_cleanup(int id, void *p, void *data)
477 {
478 struct i915_hw_context *ctx = p;
479
480 /* Ignore the default context because close will handle it */
481 if (is_default_context(ctx))
482 return 0;
483
484 i915_gem_context_unreference(ctx);
485 return 0;
486 }
487
488 struct i915_ctx_hang_stats *
489 i915_gem_context_get_hang_stats(struct drm_device *dev,
490 struct drm_file *file,
491 u32 id)
492 {
493 struct i915_hw_context *ctx;
494
495 ctx = i915_gem_context_get(file->driver_priv, id);
496 if (ctx == NULL)
497 return ERR_PTR(-ENOENT);
498
499 return &ctx->hang_stats;
500 }
501
502 int i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
503 {
504 struct drm_i915_file_private *file_priv = file->driver_priv;
505 struct drm_i915_private *dev_priv = dev->dev_private;
506
507 if (!HAS_HW_CONTEXTS(dev)) {
508 /* Cheat for hang stats */
509 file_priv->private_default_ctx =
510 kzalloc(sizeof(struct i915_hw_context), GFP_KERNEL);
511 file_priv->private_default_ctx->vm = &dev_priv->gtt.base;
512 return 0;
513 }
514
515 idr_init(&file_priv->context_idr);
516
517 mutex_lock(&dev->struct_mutex);
518 file_priv->private_default_ctx =
519 i915_gem_create_context(dev, file_priv, false);
520 mutex_unlock(&dev->struct_mutex);
521
522 if (IS_ERR(file_priv->private_default_ctx)) {
523 idr_destroy(&file_priv->context_idr);
524 return PTR_ERR(file_priv->private_default_ctx);
525 }
526
527 return 0;
528 }
529
530 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
531 {
532 struct drm_i915_file_private *file_priv = file->driver_priv;
533
534 if (!HAS_HW_CONTEXTS(dev)) {
535 kfree(file_priv->private_default_ctx);
536 return;
537 }
538
539 mutex_lock(&dev->struct_mutex);
540 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
541 i915_gem_context_unreference(file_priv->private_default_ctx);
542 idr_destroy(&file_priv->context_idr);
543 mutex_unlock(&dev->struct_mutex);
544 }
545
546 static struct i915_hw_context *
547 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
548 {
549 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
550 }
551
552 static inline int
553 mi_set_context(struct intel_ring_buffer *ring,
554 struct i915_hw_context *new_context,
555 u32 hw_flags)
556 {
557 int ret;
558
559 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
560 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
561 * explicitly, so we rely on the value at ring init, stored in
562 * itlb_before_ctx_switch.
563 */
564 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
565 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
566 if (ret)
567 return ret;
568 }
569
570 ret = intel_ring_begin(ring, 6);
571 if (ret)
572 return ret;
573
574 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
575 if (IS_GEN7(ring->dev))
576 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
577 else
578 intel_ring_emit(ring, MI_NOOP);
579
580 intel_ring_emit(ring, MI_NOOP);
581 intel_ring_emit(ring, MI_SET_CONTEXT);
582 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
583 MI_MM_SPACE_GTT |
584 MI_SAVE_EXT_STATE_EN |
585 MI_RESTORE_EXT_STATE_EN |
586 hw_flags);
587 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
588 intel_ring_emit(ring, MI_NOOP);
589
590 if (IS_GEN7(ring->dev))
591 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
592 else
593 intel_ring_emit(ring, MI_NOOP);
594
595 intel_ring_advance(ring);
596
597 return ret;
598 }
599
600 static int do_switch(struct intel_ring_buffer *ring,
601 struct i915_hw_context *to)
602 {
603 struct drm_i915_private *dev_priv = ring->dev->dev_private;
604 struct i915_hw_context *from = ring->last_context;
605 u32 hw_flags = 0;
606 int ret, i;
607
608 if (from != NULL && ring == &dev_priv->ring[RCS]) {
609 BUG_ON(from->obj == NULL);
610 BUG_ON(!i915_gem_obj_is_pinned(from->obj));
611 }
612
613 if (from == to && from->last_ring == ring && !to->remap_slice)
614 return 0;
615
616 if (ring != &dev_priv->ring[RCS]) {
617 if (from)
618 i915_gem_context_unreference(from);
619 goto done;
620 }
621
622 ret = i915_gem_obj_ggtt_pin(to->obj, get_context_alignment(ring->dev),
623 false, false);
624 if (ret)
625 return ret;
626
627 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
628 * that thanks to write = false in this call and us not setting any gpu
629 * write domains when putting a context object onto the active list
630 * (when switching away from it), this won't block.
631 * XXX: We need a real interface to do this instead of trickery. */
632 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
633 if (ret) {
634 i915_gem_object_ggtt_unpin(to->obj);
635 return ret;
636 }
637
638 if (!to->obj->has_global_gtt_mapping) {
639 struct i915_vma *vma = i915_gem_obj_to_vma(to->obj,
640 &dev_priv->gtt.base);
641 vma->bind_vma(vma, to->obj->cache_level, GLOBAL_BIND);
642 }
643
644 if (!to->is_initialized || is_default_context(to))
645 hw_flags |= MI_RESTORE_INHIBIT;
646
647 ret = mi_set_context(ring, to, hw_flags);
648 if (ret) {
649 i915_gem_object_ggtt_unpin(to->obj);
650 return ret;
651 }
652
653 for (i = 0; i < MAX_L3_SLICES; i++) {
654 if (!(to->remap_slice & (1<<i)))
655 continue;
656
657 ret = i915_gem_l3_remap(ring, i);
658 /* If it failed, try again next round */
659 if (ret)
660 DRM_DEBUG_DRIVER("L3 remapping failed\n");
661 else
662 to->remap_slice &= ~(1<<i);
663 }
664
665 /* The backing object for the context is done after switching to the
666 * *next* context. Therefore we cannot retire the previous context until
667 * the next context has already started running. In fact, the below code
668 * is a bit suboptimal because the retiring can occur simply after the
669 * MI_SET_CONTEXT instead of when the next seqno has completed.
670 */
671 if (from != NULL) {
672 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
673 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
674 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
675 * whole damn pipeline, we don't need to explicitly mark the
676 * object dirty. The only exception is that the context must be
677 * correct in case the object gets swapped out. Ideally we'd be
678 * able to defer doing this until we know the object would be
679 * swapped, but there is no way to do that yet.
680 */
681 from->obj->dirty = 1;
682 BUG_ON(from->obj->ring != ring);
683
684 /* obj is kept alive until the next request by its active ref */
685 i915_gem_object_ggtt_unpin(from->obj);
686 i915_gem_context_unreference(from);
687 }
688
689 done:
690 i915_gem_context_reference(to);
691 ring->last_context = to;
692 to->is_initialized = true;
693 to->last_ring = ring;
694
695 return 0;
696 }
697
698 /**
699 * i915_switch_context() - perform a GPU context switch.
700 * @ring: ring for which we'll execute the context switch
701 * @file_priv: file_priv associated with the context, may be NULL
702 * @id: context id number
703 *
704 * The context life cycle is simple. The context refcount is incremented and
705 * decremented by 1 and create and destroy. If the context is in use by the GPU,
706 * it will have a refoucnt > 1. This allows us to destroy the context abstract
707 * object while letting the normal object tracking destroy the backing BO.
708 */
709 int i915_switch_context(struct intel_ring_buffer *ring,
710 struct drm_file *file,
711 int to_id)
712 {
713 struct drm_i915_private *dev_priv = ring->dev->dev_private;
714 struct i915_hw_context *to;
715
716 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
717
718 if (file == NULL)
719 to = ring->default_context;
720 else
721 to = i915_gem_context_get(file->driver_priv, to_id);
722
723 if (to == NULL)
724 return -ENOENT;
725
726 /* We have the fake context, but don't supports switching. */
727 if (!HAS_HW_CONTEXTS(ring->dev))
728 return 0;
729
730 return do_switch(ring, to);
731 }
732
733 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
734 struct drm_file *file)
735 {
736 struct drm_i915_gem_context_create *args = data;
737 struct drm_i915_file_private *file_priv = file->driver_priv;
738 struct i915_hw_context *ctx;
739 int ret;
740
741 if (!(dev->driver->driver_features & DRIVER_GEM))
742 return -ENODEV;
743
744 if (!HAS_HW_CONTEXTS(dev))
745 return -ENODEV;
746
747 ret = i915_mutex_lock_interruptible(dev);
748 if (ret)
749 return ret;
750
751 ctx = i915_gem_create_context(dev, file_priv, false);
752 mutex_unlock(&dev->struct_mutex);
753 if (IS_ERR(ctx))
754 return PTR_ERR(ctx);
755
756 args->ctx_id = ctx->id;
757 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
758
759 return 0;
760 }
761
762 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
763 struct drm_file *file)
764 {
765 struct drm_i915_gem_context_destroy *args = data;
766 struct drm_i915_file_private *file_priv = file->driver_priv;
767 struct i915_hw_context *ctx;
768 int ret;
769
770 if (!(dev->driver->driver_features & DRIVER_GEM))
771 return -ENODEV;
772
773 if (args->ctx_id == DEFAULT_CONTEXT_ID)
774 return -EPERM;
775
776 ret = i915_mutex_lock_interruptible(dev);
777 if (ret)
778 return ret;
779
780 ctx = i915_gem_context_get(file_priv, args->ctx_id);
781 if (!ctx) {
782 mutex_unlock(&dev->struct_mutex);
783 return -ENOENT;
784 }
785
786 idr_remove(&ctx->file_priv->context_idr, ctx->id);
787 i915_gem_context_unreference(ctx);
788 mutex_unlock(&dev->struct_mutex);
789
790 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
791 return 0;
792 }
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