2 * Copyright © 2011-2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Ben Widawsky <ben@bwidawsk.net>
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded it's state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
89 #include <drm/i915_drm.h>
92 /* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
96 #define CONTEXT_ALIGN (64<<10)
98 static struct i915_hw_context
*
99 i915_gem_context_get(struct drm_i915_file_private
*file_priv
, u32 id
);
100 static int do_switch(struct i915_hw_context
*to
);
102 static int get_context_size(struct drm_device
*dev
)
104 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
108 switch (INTEL_INFO(dev
)->gen
) {
110 reg
= I915_READ(CXT_SIZE
);
111 ret
= GEN6_CXT_TOTAL_SIZE(reg
) * 64;
114 reg
= I915_READ(GEN7_CXT_SIZE
);
116 ret
= HSW_CXT_TOTAL_SIZE(reg
) * 64;
118 ret
= GEN7_CXT_TOTAL_SIZE(reg
) * 64;
127 static void do_destroy(struct i915_hw_context
*ctx
)
130 idr_remove(&ctx
->file_priv
->context_idr
, ctx
->id
);
132 drm_gem_object_unreference(&ctx
->obj
->base
);
136 static struct i915_hw_context
*
137 create_hw_context(struct drm_device
*dev
,
138 struct drm_i915_file_private
*file_priv
)
140 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
141 struct i915_hw_context
*ctx
;
144 ctx
= kzalloc(sizeof(*ctx
), GFP_KERNEL
);
146 return ERR_PTR(-ENOMEM
);
148 ctx
->obj
= i915_gem_alloc_object(dev
, dev_priv
->hw_context_size
);
149 if (ctx
->obj
== NULL
) {
151 DRM_DEBUG_DRIVER("Context object allocated failed\n");
152 return ERR_PTR(-ENOMEM
);
155 if (INTEL_INFO(dev
)->gen
>= 7) {
156 ret
= i915_gem_object_set_cache_level(ctx
->obj
,
162 /* The ring associated with the context object is handled by the normal
163 * object tracking code. We give an initial ring value simple to pass an
164 * assertion in the context switch code.
166 ctx
->ring
= &dev_priv
->ring
[RCS
];
168 /* Default context will never have a file_priv */
169 if (file_priv
== NULL
)
172 ctx
->file_priv
= file_priv
;
174 ret
= idr_alloc(&file_priv
->context_idr
, ctx
, DEFAULT_CONTEXT_ID
+ 1, 0,
187 static inline bool is_default_context(struct i915_hw_context
*ctx
)
189 return (ctx
== ctx
->ring
->default_context
);
193 * The default context needs to exist per ring that uses contexts. It stores the
194 * context state of the GPU for applications that don't utilize HW contexts, as
195 * well as an idle case.
197 static int create_default_context(struct drm_i915_private
*dev_priv
)
199 struct i915_hw_context
*ctx
;
202 BUG_ON(!mutex_is_locked(&dev_priv
->dev
->struct_mutex
));
204 ctx
= create_hw_context(dev_priv
->dev
, NULL
);
208 /* We may need to do things with the shrinker which require us to
209 * immediately switch back to the default context. This can cause a
210 * problem as pinning the default context also requires GTT space which
211 * may not be available. To avoid this we always pin the
214 dev_priv
->ring
[RCS
].default_context
= ctx
;
215 ret
= i915_gem_object_pin(ctx
->obj
, CONTEXT_ALIGN
, false, false);
219 ret
= do_switch(ctx
);
223 DRM_DEBUG_DRIVER("Default HW context loaded\n");
227 i915_gem_object_unpin(ctx
->obj
);
233 void i915_gem_context_init(struct drm_device
*dev
)
235 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
237 if (!HAS_HW_CONTEXTS(dev
)) {
238 dev_priv
->hw_contexts_disabled
= true;
242 /* If called from reset, or thaw... we've been here already */
243 if (dev_priv
->hw_contexts_disabled
||
244 dev_priv
->ring
[RCS
].default_context
)
247 dev_priv
->hw_context_size
= round_up(get_context_size(dev
), 4096);
249 if (dev_priv
->hw_context_size
> (1<<20)) {
250 dev_priv
->hw_contexts_disabled
= true;
254 if (create_default_context(dev_priv
)) {
255 dev_priv
->hw_contexts_disabled
= true;
259 DRM_DEBUG_DRIVER("HW context support initialized\n");
262 void i915_gem_context_fini(struct drm_device
*dev
)
264 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
266 if (dev_priv
->hw_contexts_disabled
)
269 /* The only known way to stop the gpu from accessing the hw context is
270 * to reset it. Do this as the very last operation to avoid confusing
271 * other code, leading to spurious errors. */
272 intel_gpu_reset(dev
);
274 i915_gem_object_unpin(dev_priv
->ring
[RCS
].default_context
->obj
);
276 do_destroy(dev_priv
->ring
[RCS
].default_context
);
279 static int context_idr_cleanup(int id
, void *p
, void *data
)
281 struct i915_hw_context
*ctx
= p
;
283 BUG_ON(id
== DEFAULT_CONTEXT_ID
);
290 void i915_gem_context_close(struct drm_device
*dev
, struct drm_file
*file
)
292 struct drm_i915_file_private
*file_priv
= file
->driver_priv
;
294 mutex_lock(&dev
->struct_mutex
);
295 idr_for_each(&file_priv
->context_idr
, context_idr_cleanup
, NULL
);
296 idr_destroy(&file_priv
->context_idr
);
297 mutex_unlock(&dev
->struct_mutex
);
300 static struct i915_hw_context
*
301 i915_gem_context_get(struct drm_i915_file_private
*file_priv
, u32 id
)
303 return (struct i915_hw_context
*)idr_find(&file_priv
->context_idr
, id
);
307 mi_set_context(struct intel_ring_buffer
*ring
,
308 struct i915_hw_context
*new_context
,
313 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
314 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
315 * explicitly, so we rely on the value at ring init, stored in
316 * itlb_before_ctx_switch.
318 if (IS_GEN6(ring
->dev
) && ring
->itlb_before_ctx_switch
) {
319 ret
= ring
->flush(ring
, I915_GEM_GPU_DOMAINS
, 0);
324 ret
= intel_ring_begin(ring
, 6);
328 if (IS_GEN7(ring
->dev
))
329 intel_ring_emit(ring
, MI_ARB_ON_OFF
| MI_ARB_DISABLE
);
331 intel_ring_emit(ring
, MI_NOOP
);
333 intel_ring_emit(ring
, MI_NOOP
);
334 intel_ring_emit(ring
, MI_SET_CONTEXT
);
335 intel_ring_emit(ring
, new_context
->obj
->gtt_offset
|
337 MI_SAVE_EXT_STATE_EN
|
338 MI_RESTORE_EXT_STATE_EN
|
340 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
341 intel_ring_emit(ring
, MI_NOOP
);
343 if (IS_GEN7(ring
->dev
))
344 intel_ring_emit(ring
, MI_ARB_ON_OFF
| MI_ARB_ENABLE
);
346 intel_ring_emit(ring
, MI_NOOP
);
348 intel_ring_advance(ring
);
353 static int do_switch(struct i915_hw_context
*to
)
355 struct intel_ring_buffer
*ring
= to
->ring
;
356 struct drm_i915_gem_object
*from_obj
= ring
->last_context_obj
;
360 BUG_ON(from_obj
!= NULL
&& from_obj
->pin_count
== 0);
362 if (from_obj
== to
->obj
)
365 ret
= i915_gem_object_pin(to
->obj
, CONTEXT_ALIGN
, false, false);
369 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
370 * that thanks to write = false in this call and us not setting any gpu
371 * write domains when putting a context object onto the active list
372 * (when switching away from it), this won't block.
373 * XXX: We need a real interface to do this instead of trickery. */
374 ret
= i915_gem_object_set_to_gtt_domain(to
->obj
, false);
376 i915_gem_object_unpin(to
->obj
);
380 if (!to
->obj
->has_global_gtt_mapping
)
381 i915_gem_gtt_bind_object(to
->obj
, to
->obj
->cache_level
);
383 if (!to
->is_initialized
|| is_default_context(to
))
384 hw_flags
|= MI_RESTORE_INHIBIT
;
385 else if (WARN_ON_ONCE(from_obj
== to
->obj
)) /* not yet expected */
386 hw_flags
|= MI_FORCE_RESTORE
;
388 ret
= mi_set_context(ring
, to
, hw_flags
);
390 i915_gem_object_unpin(to
->obj
);
394 /* The backing object for the context is done after switching to the
395 * *next* context. Therefore we cannot retire the previous context until
396 * the next context has already started running. In fact, the below code
397 * is a bit suboptimal because the retiring can occur simply after the
398 * MI_SET_CONTEXT instead of when the next seqno has completed.
400 if (from_obj
!= NULL
) {
401 from_obj
->base
.read_domains
= I915_GEM_DOMAIN_INSTRUCTION
;
402 i915_gem_object_move_to_active(from_obj
, ring
);
403 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
404 * whole damn pipeline, we don't need to explicitly mark the
405 * object dirty. The only exception is that the context must be
406 * correct in case the object gets swapped out. Ideally we'd be
407 * able to defer doing this until we know the object would be
408 * swapped, but there is no way to do that yet.
411 BUG_ON(from_obj
->ring
!= ring
);
412 i915_gem_object_unpin(from_obj
);
414 drm_gem_object_unreference(&from_obj
->base
);
417 drm_gem_object_reference(&to
->obj
->base
);
418 ring
->last_context_obj
= to
->obj
;
419 to
->is_initialized
= true;
425 * i915_switch_context() - perform a GPU context switch.
426 * @ring: ring for which we'll execute the context switch
427 * @file_priv: file_priv associated with the context, may be NULL
428 * @id: context id number
429 * @seqno: sequence number by which the new context will be switched to
432 * The context life cycle is simple. The context refcount is incremented and
433 * decremented by 1 and create and destroy. If the context is in use by the GPU,
434 * it will have a refoucnt > 1. This allows us to destroy the context abstract
435 * object while letting the normal object tracking destroy the backing BO.
437 int i915_switch_context(struct intel_ring_buffer
*ring
,
438 struct drm_file
*file
,
441 struct drm_i915_private
*dev_priv
= ring
->dev
->dev_private
;
442 struct i915_hw_context
*to
;
444 if (dev_priv
->hw_contexts_disabled
)
447 if (ring
!= &dev_priv
->ring
[RCS
])
450 if (to_id
== DEFAULT_CONTEXT_ID
) {
451 to
= ring
->default_context
;
456 to
= i915_gem_context_get(file
->driver_priv
, to_id
);
461 return do_switch(to
);
464 int i915_gem_context_create_ioctl(struct drm_device
*dev
, void *data
,
465 struct drm_file
*file
)
467 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
468 struct drm_i915_gem_context_create
*args
= data
;
469 struct drm_i915_file_private
*file_priv
= file
->driver_priv
;
470 struct i915_hw_context
*ctx
;
473 if (!(dev
->driver
->driver_features
& DRIVER_GEM
))
476 if (dev_priv
->hw_contexts_disabled
)
479 ret
= i915_mutex_lock_interruptible(dev
);
483 ctx
= create_hw_context(dev
, file_priv
);
484 mutex_unlock(&dev
->struct_mutex
);
488 args
->ctx_id
= ctx
->id
;
489 DRM_DEBUG_DRIVER("HW context %d created\n", args
->ctx_id
);
494 int i915_gem_context_destroy_ioctl(struct drm_device
*dev
, void *data
,
495 struct drm_file
*file
)
497 struct drm_i915_gem_context_destroy
*args
= data
;
498 struct drm_i915_file_private
*file_priv
= file
->driver_priv
;
499 struct i915_hw_context
*ctx
;
502 if (!(dev
->driver
->driver_features
& DRIVER_GEM
))
505 ret
= i915_mutex_lock_interruptible(dev
);
509 ctx
= i915_gem_context_get(file_priv
, args
->ctx_id
);
511 mutex_unlock(&dev
->struct_mutex
);
517 mutex_unlock(&dev
->struct_mutex
);
519 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args
->ctx_id
);