cc619c138777165b8e05550b4d09cf43e2281135
[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_gem_context.c
1 /*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28 /*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded its state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
88 #include <drm/drmP.h>
89 #include <drm/i915_drm.h>
90 #include "i915_drv.h"
91
92 /* This is a HW constraint. The value below is the largest known requirement
93 * I've seen in a spec to date, and that was a workaround for a non-shipping
94 * part. It should be safe to decrease this, but it's more future proof as is.
95 */
96 #define CONTEXT_ALIGN (64<<10)
97
98 static struct i915_hw_context *
99 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
100 static int do_switch(struct i915_hw_context *to);
101
102 static int get_context_size(struct drm_device *dev)
103 {
104 struct drm_i915_private *dev_priv = dev->dev_private;
105 int ret;
106 u32 reg;
107
108 switch (INTEL_INFO(dev)->gen) {
109 case 6:
110 reg = I915_READ(CXT_SIZE);
111 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
112 break;
113 case 7:
114 reg = I915_READ(GEN7_CXT_SIZE);
115 if (IS_HASWELL(dev))
116 ret = HSW_CXT_TOTAL_SIZE;
117 else
118 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
119 break;
120 default:
121 BUG();
122 }
123
124 return ret;
125 }
126
127 void i915_gem_context_free(struct kref *ctx_ref)
128 {
129 struct i915_hw_context *ctx = container_of(ctx_ref,
130 typeof(*ctx), ref);
131
132 list_del(&ctx->link);
133 drm_gem_object_unreference(&ctx->obj->base);
134 kfree(ctx);
135 }
136
137 static struct i915_hw_context *
138 create_hw_context(struct drm_device *dev,
139 struct drm_i915_file_private *file_priv)
140 {
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 struct i915_hw_context *ctx;
143 int ret;
144
145 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
146 if (ctx == NULL)
147 return ERR_PTR(-ENOMEM);
148
149 kref_init(&ctx->ref);
150 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
151 INIT_LIST_HEAD(&ctx->link);
152 if (ctx->obj == NULL) {
153 kfree(ctx);
154 DRM_DEBUG_DRIVER("Context object allocated failed\n");
155 return ERR_PTR(-ENOMEM);
156 }
157
158 if (INTEL_INFO(dev)->gen >= 7) {
159 ret = i915_gem_object_set_cache_level(ctx->obj,
160 I915_CACHE_L3_LLC);
161 /* Failure shouldn't ever happen this early */
162 if (WARN_ON(ret))
163 goto err_out;
164 }
165
166 /* The ring associated with the context object is handled by the normal
167 * object tracking code. We give an initial ring value simple to pass an
168 * assertion in the context switch code.
169 */
170 ctx->ring = &dev_priv->ring[RCS];
171 list_add_tail(&ctx->link, &dev_priv->context_list);
172
173 /* Default context will never have a file_priv */
174 if (file_priv == NULL)
175 return ctx;
176
177 ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
178 GFP_KERNEL);
179 if (ret < 0)
180 goto err_out;
181
182 ctx->file_priv = file_priv;
183 ctx->id = ret;
184 /* NB: Mark all slices as needing a remap so that when the context first
185 * loads it will restore whatever remap state already exists. If there
186 * is no remap info, it will be a NOP. */
187 ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
188
189 return ctx;
190
191 err_out:
192 i915_gem_context_unreference(ctx);
193 return ERR_PTR(ret);
194 }
195
196 static inline bool is_default_context(struct i915_hw_context *ctx)
197 {
198 return (ctx == ctx->ring->default_context);
199 }
200
201 /**
202 * The default context needs to exist per ring that uses contexts. It stores the
203 * context state of the GPU for applications that don't utilize HW contexts, as
204 * well as an idle case.
205 */
206 static int create_default_context(struct drm_i915_private *dev_priv)
207 {
208 struct i915_hw_context *ctx;
209 int ret;
210
211 BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
212
213 ctx = create_hw_context(dev_priv->dev, NULL);
214 if (IS_ERR(ctx))
215 return PTR_ERR(ctx);
216
217 /* We may need to do things with the shrinker which require us to
218 * immediately switch back to the default context. This can cause a
219 * problem as pinning the default context also requires GTT space which
220 * may not be available. To avoid this we always pin the
221 * default context.
222 */
223 ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
224 if (ret) {
225 DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
226 goto err_destroy;
227 }
228
229 ret = do_switch(ctx);
230 if (ret) {
231 DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
232 goto err_unpin;
233 }
234
235 dev_priv->ring[RCS].default_context = ctx;
236
237 DRM_DEBUG_DRIVER("Default HW context loaded\n");
238 return 0;
239
240 err_unpin:
241 i915_gem_object_unpin(ctx->obj);
242 err_destroy:
243 i915_gem_context_unreference(ctx);
244 return ret;
245 }
246
247 void i915_gem_context_init(struct drm_device *dev)
248 {
249 struct drm_i915_private *dev_priv = dev->dev_private;
250
251 if (!HAS_HW_CONTEXTS(dev)) {
252 dev_priv->hw_contexts_disabled = true;
253 DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n");
254 return;
255 }
256
257 /* If called from reset, or thaw... we've been here already */
258 if (dev_priv->hw_contexts_disabled ||
259 dev_priv->ring[RCS].default_context)
260 return;
261
262 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
263
264 if (dev_priv->hw_context_size > (1<<20)) {
265 dev_priv->hw_contexts_disabled = true;
266 DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
267 return;
268 }
269
270 if (create_default_context(dev_priv)) {
271 dev_priv->hw_contexts_disabled = true;
272 DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n");
273 return;
274 }
275
276 DRM_DEBUG_DRIVER("HW context support initialized\n");
277 }
278
279 void i915_gem_context_fini(struct drm_device *dev)
280 {
281 struct drm_i915_private *dev_priv = dev->dev_private;
282 struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
283
284 if (dev_priv->hw_contexts_disabled)
285 return;
286
287 /* The only known way to stop the gpu from accessing the hw context is
288 * to reset it. Do this as the very last operation to avoid confusing
289 * other code, leading to spurious errors. */
290 intel_gpu_reset(dev);
291
292 /* When default context is created and switched to, base object refcount
293 * will be 2 (+1 from object creation and +1 from do_switch()).
294 * i915_gem_context_fini() will be called after gpu_idle() has switched
295 * to default context. So we need to unreference the base object once
296 * to offset the do_switch part, so that i915_gem_context_unreference()
297 * can then free the base object correctly. */
298 WARN_ON(!dev_priv->ring[RCS].last_context);
299 if (dev_priv->ring[RCS].last_context == dctx) {
300 /* Fake switch to NULL context */
301 WARN_ON(dctx->obj->active);
302 i915_gem_object_unpin(dctx->obj);
303 i915_gem_context_unreference(dctx);
304 }
305
306 i915_gem_object_unpin(dctx->obj);
307 i915_gem_context_unreference(dctx);
308 dev_priv->ring[RCS].default_context = NULL;
309 dev_priv->ring[RCS].last_context = NULL;
310 }
311
312 static int context_idr_cleanup(int id, void *p, void *data)
313 {
314 struct i915_hw_context *ctx = p;
315
316 BUG_ON(id == DEFAULT_CONTEXT_ID);
317
318 i915_gem_context_unreference(ctx);
319 return 0;
320 }
321
322 struct i915_ctx_hang_stats *
323 i915_gem_context_get_hang_stats(struct drm_device *dev,
324 struct drm_file *file,
325 u32 id)
326 {
327 struct drm_i915_private *dev_priv = dev->dev_private;
328 struct drm_i915_file_private *file_priv = file->driver_priv;
329 struct i915_hw_context *ctx;
330
331 if (id == DEFAULT_CONTEXT_ID)
332 return &file_priv->hang_stats;
333
334 ctx = NULL;
335 if (!dev_priv->hw_contexts_disabled)
336 ctx = i915_gem_context_get(file->driver_priv, id);
337 if (ctx == NULL)
338 return ERR_PTR(-ENOENT);
339
340 return &ctx->hang_stats;
341 }
342
343 void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
344 {
345 struct drm_i915_file_private *file_priv = file->driver_priv;
346
347 mutex_lock(&dev->struct_mutex);
348 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
349 idr_destroy(&file_priv->context_idr);
350 mutex_unlock(&dev->struct_mutex);
351 }
352
353 static struct i915_hw_context *
354 i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
355 {
356 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
357 }
358
359 static inline int
360 mi_set_context(struct intel_ring_buffer *ring,
361 struct i915_hw_context *new_context,
362 u32 hw_flags)
363 {
364 int ret;
365
366 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
367 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
368 * explicitly, so we rely on the value at ring init, stored in
369 * itlb_before_ctx_switch.
370 */
371 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
372 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
373 if (ret)
374 return ret;
375 }
376
377 ret = intel_ring_begin(ring, 6);
378 if (ret)
379 return ret;
380
381 /* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
382 if (IS_GEN7(ring->dev))
383 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
384 else
385 intel_ring_emit(ring, MI_NOOP);
386
387 intel_ring_emit(ring, MI_NOOP);
388 intel_ring_emit(ring, MI_SET_CONTEXT);
389 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
390 MI_MM_SPACE_GTT |
391 MI_SAVE_EXT_STATE_EN |
392 MI_RESTORE_EXT_STATE_EN |
393 hw_flags);
394 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
395 intel_ring_emit(ring, MI_NOOP);
396
397 if (IS_GEN7(ring->dev))
398 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
399 else
400 intel_ring_emit(ring, MI_NOOP);
401
402 intel_ring_advance(ring);
403
404 return ret;
405 }
406
407 static int do_switch(struct i915_hw_context *to)
408 {
409 struct intel_ring_buffer *ring = to->ring;
410 struct i915_hw_context *from = ring->last_context;
411 u32 hw_flags = 0;
412 int ret, i;
413
414 BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
415
416 if (from == to && !to->remap_slice)
417 return 0;
418
419 ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
420 if (ret)
421 return ret;
422
423 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
424 * that thanks to write = false in this call and us not setting any gpu
425 * write domains when putting a context object onto the active list
426 * (when switching away from it), this won't block.
427 * XXX: We need a real interface to do this instead of trickery. */
428 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
429 if (ret) {
430 i915_gem_object_unpin(to->obj);
431 return ret;
432 }
433
434 if (!to->obj->has_global_gtt_mapping)
435 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
436
437 if (!to->is_initialized || is_default_context(to))
438 hw_flags |= MI_RESTORE_INHIBIT;
439
440 ret = mi_set_context(ring, to, hw_flags);
441 if (ret) {
442 i915_gem_object_unpin(to->obj);
443 return ret;
444 }
445
446 for (i = 0; i < MAX_L3_SLICES; i++) {
447 if (!(to->remap_slice & (1<<i)))
448 continue;
449
450 ret = i915_gem_l3_remap(ring, i);
451 /* If it failed, try again next round */
452 if (ret)
453 DRM_DEBUG_DRIVER("L3 remapping failed\n");
454 else
455 to->remap_slice &= ~(1<<i);
456 }
457
458 /* The backing object for the context is done after switching to the
459 * *next* context. Therefore we cannot retire the previous context until
460 * the next context has already started running. In fact, the below code
461 * is a bit suboptimal because the retiring can occur simply after the
462 * MI_SET_CONTEXT instead of when the next seqno has completed.
463 */
464 if (from != NULL) {
465 from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
466 i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
467 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
468 * whole damn pipeline, we don't need to explicitly mark the
469 * object dirty. The only exception is that the context must be
470 * correct in case the object gets swapped out. Ideally we'd be
471 * able to defer doing this until we know the object would be
472 * swapped, but there is no way to do that yet.
473 */
474 from->obj->dirty = 1;
475 BUG_ON(from->obj->ring != ring);
476
477 /* obj is kept alive until the next request by its active ref */
478 i915_gem_object_unpin(from->obj);
479 i915_gem_context_unreference(from);
480 }
481
482 i915_gem_context_reference(to);
483 ring->last_context = to;
484 to->is_initialized = true;
485
486 return 0;
487 }
488
489 /**
490 * i915_switch_context() - perform a GPU context switch.
491 * @ring: ring for which we'll execute the context switch
492 * @file_priv: file_priv associated with the context, may be NULL
493 * @id: context id number
494 * @seqno: sequence number by which the new context will be switched to
495 * @flags:
496 *
497 * The context life cycle is simple. The context refcount is incremented and
498 * decremented by 1 and create and destroy. If the context is in use by the GPU,
499 * it will have a refoucnt > 1. This allows us to destroy the context abstract
500 * object while letting the normal object tracking destroy the backing BO.
501 */
502 int i915_switch_context(struct intel_ring_buffer *ring,
503 struct drm_file *file,
504 int to_id)
505 {
506 struct drm_i915_private *dev_priv = ring->dev->dev_private;
507 struct i915_hw_context *to;
508
509 if (dev_priv->hw_contexts_disabled)
510 return 0;
511
512 WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
513
514 if (ring != &dev_priv->ring[RCS])
515 return 0;
516
517 if (to_id == DEFAULT_CONTEXT_ID) {
518 to = ring->default_context;
519 } else {
520 if (file == NULL)
521 return -EINVAL;
522
523 to = i915_gem_context_get(file->driver_priv, to_id);
524 if (to == NULL)
525 return -ENOENT;
526 }
527
528 return do_switch(to);
529 }
530
531 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
532 struct drm_file *file)
533 {
534 struct drm_i915_private *dev_priv = dev->dev_private;
535 struct drm_i915_gem_context_create *args = data;
536 struct drm_i915_file_private *file_priv = file->driver_priv;
537 struct i915_hw_context *ctx;
538 int ret;
539
540 if (!(dev->driver->driver_features & DRIVER_GEM))
541 return -ENODEV;
542
543 if (dev_priv->hw_contexts_disabled)
544 return -ENODEV;
545
546 ret = i915_mutex_lock_interruptible(dev);
547 if (ret)
548 return ret;
549
550 ctx = create_hw_context(dev, file_priv);
551 mutex_unlock(&dev->struct_mutex);
552 if (IS_ERR(ctx))
553 return PTR_ERR(ctx);
554
555 args->ctx_id = ctx->id;
556 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
557
558 return 0;
559 }
560
561 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
562 struct drm_file *file)
563 {
564 struct drm_i915_gem_context_destroy *args = data;
565 struct drm_i915_file_private *file_priv = file->driver_priv;
566 struct i915_hw_context *ctx;
567 int ret;
568
569 if (!(dev->driver->driver_features & DRIVER_GEM))
570 return -ENODEV;
571
572 ret = i915_mutex_lock_interruptible(dev);
573 if (ret)
574 return ret;
575
576 ctx = i915_gem_context_get(file_priv, args->ctx_id);
577 if (!ctx) {
578 mutex_unlock(&dev->struct_mutex);
579 return -ENOENT;
580 }
581
582 idr_remove(&ctx->file_priv->context_idr, ctx->id);
583 i915_gem_context_unreference(ctx);
584 mutex_unlock(&dev->struct_mutex);
585
586 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
587 return 0;
588 }
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