drivers/gpu/drm/i915/i915_gem_evict.c

   1 /*
   2  * Copyright © 2008-2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Chris Wilson <chris@chris-wilson.co.uuk>
  26  *
  27  */
  28
  29 #include <drm/drmP.h>
  30 #include "i915_drv.h"
  31 #include <drm/i915_drm.h>
  32 #include "i915_trace.h"
  33
  34 static bool
  35 mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
  36 {
  37         struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
  38
  39         if (obj->pin_count)
  40                 return false;
  41
  42         list_add(&obj->exec_list, unwind);
  43         return drm_mm_scan_add_block(&vma->node);
  44 }
  45
  46 int
  47 i915_gem_evict_something(struct drm_device *dev, int min_size,
  48                          unsigned alignment, unsigned cache_level,
  49                          bool mappable, bool nonblocking)
  50 {
  51         drm_i915_private_t *dev_priv = dev->dev_private;
  52         struct i915_address_space *vm = &dev_priv->gtt.base;
  53         struct list_head eviction_list, unwind_list;
  54         struct i915_vma *vma;
  55         struct drm_i915_gem_object *obj;
  56         int ret = 0;
  57
  58         trace_i915_gem_evict(dev, min_size, alignment, mappable);
  59
  60         /*
  61          * The goal is to evict objects and amalgamate space in LRU order.
  62          * The oldest idle objects reside on the inactive list, which is in
  63          * retirement order. The next objects to retire are those on the (per
  64          * ring) active list that do not have an outstanding flush. Once the
  65          * hardware reports completion (the seqno is updated after the
  66          * batchbuffer has been finished) the clean buffer objects would
  67          * be retired to the inactive list. Any dirty objects would be added
  68          * to the tail of the flushing list. So after processing the clean
  69          * active objects we need to emit a MI_FLUSH to retire the flushing
  70          * list, hence the retirement order of the flushing list is in
  71          * advance of the dirty objects on the active lists.
  72          *
  73          * The retirement sequence is thus:
  74          *   1. Inactive objects (already retired)
  75          *   2. Clean active objects
  76          *   3. Flushing list
  77          *   4. Dirty active objects.
  78          *
  79          * On each list, the oldest objects lie at the HEAD with the freshest
  80          * object on the TAIL.
  81          */
  82
  83         INIT_LIST_HEAD(&unwind_list);
  84         if (mappable)
  85                 drm_mm_init_scan_with_range(&vm->mm, min_size,
  86                                             alignment, cache_level, 0,
  87                                             dev_priv->gtt.mappable_end);
  88         else
  89                 drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level);
  90
  91         /* First see if there is a large enough contiguous idle region... */
  92         list_for_each_entry(obj, &vm->inactive_list, mm_list) {
  93                 if (mark_free(obj, &unwind_list))
  94                         goto found;
  95         }
  96
  97         if (nonblocking)
  98                 goto none;
  99
 100         /* Now merge in the soon-to-be-expired objects... */
 101         list_for_each_entry(obj, &vm->active_list, mm_list) {
 102                 if (mark_free(obj, &unwind_list))
 103                         goto found;
 104         }
 105
 106 none:
 107         /* Nothing found, clean up and bail out! */
 108         while (!list_empty(&unwind_list)) {
 109                 obj = list_first_entry(&unwind_list,
 110                                        struct drm_i915_gem_object,
 111                                        exec_list);
 112                 vma = __i915_gem_obj_to_vma(obj);
 113                 ret = drm_mm_scan_remove_block(&vma->node);
 114                 BUG_ON(ret);
 115
 116                 list_del_init(&obj->exec_list);
 117         }
 118
 119         /* We expect the caller to unpin, evict all and try again, or give up.
 120          * So calling i915_gem_evict_everything() is unnecessary.
 121          */
 122         return -ENOSPC;
 123
 124 found:
 125         /* drm_mm doesn't allow any other other operations while
 126          * scanning, therefore store to be evicted objects on a
 127          * temporary list. */
 128         INIT_LIST_HEAD(&eviction_list);
 129         while (!list_empty(&unwind_list)) {
 130                 obj = list_first_entry(&unwind_list,
 131                                        struct drm_i915_gem_object,
 132                                        exec_list);
 133                 vma = __i915_gem_obj_to_vma(obj);
 134                 if (drm_mm_scan_remove_block(&vma->node)) {
 135                         list_move(&obj->exec_list, &eviction_list);
 136                         drm_gem_object_reference(&obj->base);
 137                         continue;
 138                 }
 139                 list_del_init(&obj->exec_list);
 140         }
 141
 142         /* Unbinding will emit any required flushes */
 143         while (!list_empty(&eviction_list)) {
 144                 obj = list_first_entry(&eviction_list,
 145                                        struct drm_i915_gem_object,
 146                                        exec_list);
 147                 if (ret == 0)
 148                         ret = i915_gem_object_unbind(obj);
 149
 150                 list_del_init(&obj->exec_list);
 151                 drm_gem_object_unreference(&obj->base);
 152         }
 153
 154         return ret;
 155 }
 156
 157 int
 158 i915_gem_evict_everything(struct drm_device *dev)
 159 {
 160         drm_i915_private_t *dev_priv = dev->dev_private;
 161         struct i915_address_space *vm = &dev_priv->gtt.base;
 162         struct drm_i915_gem_object *obj, *next;
 163         bool lists_empty;
 164         int ret;
 165
 166         lists_empty = (list_empty(&vm->inactive_list) &&
 167                        list_empty(&vm->active_list));
 168         if (lists_empty)
 169                 return -ENOSPC;
 170
 171         trace_i915_gem_evict_everything(dev);
 172
 173         /* The gpu_idle will flush everything in the write domain to the
 174          * active list. Then we must move everything off the active list
 175          * with retire requests.
 176          */
 177         ret = i915_gpu_idle(dev);
 178         if (ret)
 179                 return ret;
 180
 181         i915_gem_retire_requests(dev);
 182
 183         /* Having flushed everything, unbind() should never raise an error */
 184         list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
 185                 if (obj->pin_count == 0)
 186                         WARN_ON(i915_gem_object_unbind(obj));
 187
 188         return 0;
 189 }