drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "intel_drv.h"
  34 #include "i915_drm.h"
  35 #include "i915_drv.h"
  36
  37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  38 {
  39         struct drm_device *dev = encoder->dev;
  40         struct drm_i915_private *dev_priv = dev->dev_private;
  41         u32 temp, reg;
  42
  43         if (HAS_PCH_SPLIT(dev))
  44                 reg = PCH_ADPA;
  45         else
  46                 reg = ADPA;
  47
  48         temp = I915_READ(reg);
  49         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  50         temp &= ~ADPA_DAC_ENABLE;
  51
  52         switch(mode) {
  53         case DRM_MODE_DPMS_ON:
  54                 temp |= ADPA_DAC_ENABLE;
  55                 break;
  56         case DRM_MODE_DPMS_STANDBY:
  57                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  58                 break;
  59         case DRM_MODE_DPMS_SUSPEND:
  60                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  61                 break;
  62         case DRM_MODE_DPMS_OFF:
  63                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  64                 break;
  65         }
  66
  67         I915_WRITE(reg, temp);
  68 }
  69
  70 static int intel_crt_mode_valid(struct drm_connector *connector,
  71                                 struct drm_display_mode *mode)
  72 {
  73         struct drm_device *dev = connector->dev;
  74
  75         int max_clock = 0;
  76         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  77                 return MODE_NO_DBLESCAN;
  78
  79         if (mode->clock < 25000)
  80                 return MODE_CLOCK_LOW;
  81
  82         if (!IS_I9XX(dev))
  83                 max_clock = 350000;
  84         else
  85                 max_clock = 400000;
  86         if (mode->clock > max_clock)
  87                 return MODE_CLOCK_HIGH;
  88
  89         return MODE_OK;
  90 }
  91
  92 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  93                                  struct drm_display_mode *mode,
  94                                  struct drm_display_mode *adjusted_mode)
  95 {
  96         return true;
  97 }
  98
  99 static void intel_crt_mode_set(struct drm_encoder *encoder,
 100                                struct drm_display_mode *mode,
 101                                struct drm_display_mode *adjusted_mode)
 102 {
 103
 104         struct drm_device *dev = encoder->dev;
 105         struct drm_crtc *crtc = encoder->crtc;
 106         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 107         struct drm_i915_private *dev_priv = dev->dev_private;
 108         int dpll_md_reg;
 109         u32 adpa, dpll_md;
 110         u32 adpa_reg;
 111
 112         if (intel_crtc->pipe == 0)
 113                 dpll_md_reg = DPLL_A_MD;
 114         else
 115                 dpll_md_reg = DPLL_B_MD;
 116
 117         if (HAS_PCH_SPLIT(dev))
 118                 adpa_reg = PCH_ADPA;
 119         else
 120                 adpa_reg = ADPA;
 121
 122         /*
 123          * Disable separate mode multiplier used when cloning SDVO to CRT
 124          * XXX this needs to be adjusted when we really are cloning
 125          */
 126         if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
 127                 dpll_md = I915_READ(dpll_md_reg);
 128                 I915_WRITE(dpll_md_reg,
 129                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 130         }
 131
 132         adpa = 0;
 133         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 134                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 135         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 136                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 137
 138         if (intel_crtc->pipe == 0) {
 139                 if (HAS_PCH_CPT(dev))
 140                         adpa |= PORT_TRANS_A_SEL_CPT;
 141                 else
 142                         adpa |= ADPA_PIPE_A_SELECT;
 143                 if (!HAS_PCH_SPLIT(dev))
 144                         I915_WRITE(BCLRPAT_A, 0);
 145         } else {
 146                 if (HAS_PCH_CPT(dev))
 147                         adpa |= PORT_TRANS_B_SEL_CPT;
 148                 else
 149                         adpa |= ADPA_PIPE_B_SELECT;
 150                 if (!HAS_PCH_SPLIT(dev))
 151                         I915_WRITE(BCLRPAT_B, 0);
 152         }
 153
 154         I915_WRITE(adpa_reg, adpa);
 155 }
 156
 157 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 158 {
 159         struct drm_device *dev = connector->dev;
 160         struct drm_i915_private *dev_priv = dev->dev_private;
 161         u32 adpa, temp;
 162         bool ret;
 163
 164         temp = adpa = I915_READ(PCH_ADPA);
 165
 166         if (HAS_PCH_CPT(dev)) {
 167                 /* Disable DAC before force detect */
 168                 I915_WRITE(PCH_ADPA, adpa & ~ADPA_DAC_ENABLE);
 169                 (void)I915_READ(PCH_ADPA);
 170         } else {
 171                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 172                 /* disable HPD first */
 173                 I915_WRITE(PCH_ADPA, adpa);
 174                 (void)I915_READ(PCH_ADPA);
 175         }
 176
 177         adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
 178                         ADPA_CRT_HOTPLUG_WARMUP_10MS |
 179                         ADPA_CRT_HOTPLUG_SAMPLE_4S |
 180                         ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
 181                         ADPA_CRT_HOTPLUG_VOLREF_325MV |
 182                         ADPA_CRT_HOTPLUG_ENABLE |
 183                         ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
 184
 185         DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
 186         I915_WRITE(PCH_ADPA, adpa);
 187
 188         while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
 189                 ;
 190
 191         if (HAS_PCH_CPT(dev)) {
 192                 I915_WRITE(PCH_ADPA, temp);
 193                 (void)I915_READ(PCH_ADPA);
 194         }
 195
 196         /* Check the status to see if both blue and green are on now */
 197         adpa = I915_READ(PCH_ADPA);
 198         adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
 199         if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
 200                 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
 201                 ret = true;
 202         else
 203                 ret = false;
 204
 205         return ret;
 206 }
 207
 208 /**
 209  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 210  *
 211  * Not for i915G/i915GM
 212  *
 213  * \return true if CRT is connected.
 214  * \return false if CRT is disconnected.
 215  */
 216 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 217 {
 218         struct drm_device *dev = connector->dev;
 219         struct drm_i915_private *dev_priv = dev->dev_private;
 220         u32 hotplug_en, orig, stat;
 221         bool ret = false;
 222         int i, tries = 0;
 223
 224         if (HAS_PCH_SPLIT(dev))
 225                 return intel_ironlake_crt_detect_hotplug(connector);
 226
 227         /*
 228          * On 4 series desktop, CRT detect sequence need to be done twice
 229          * to get a reliable result.
 230          */
 231
 232         if (IS_G4X(dev) && !IS_GM45(dev))
 233                 tries = 2;
 234         else
 235                 tries = 1;
 236         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 237         hotplug_en &= CRT_HOTPLUG_MASK;
 238         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 239
 240         if (IS_G4X(dev))
 241                 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
 242
 243         hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
 244
 245         for (i = 0; i < tries ; i++) {
 246                 unsigned long timeout;
 247                 /* turn on the FORCE_DETECT */
 248                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 249                 timeout = jiffies + msecs_to_jiffies(1000);
 250                 /* wait for FORCE_DETECT to go off */
 251                 do {
 252                         if (!(I915_READ(PORT_HOTPLUG_EN) &
 253                                         CRT_HOTPLUG_FORCE_DETECT))
 254                                 break;
 255                         msleep(1);
 256                 } while (time_after(timeout, jiffies));
 257         }
 258
 259         stat = I915_READ(PORT_HOTPLUG_STAT);
 260         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 261                 ret = true;
 262
 263         /* clear the interrupt we just generated, if any */
 264         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 265
 266         /* and put the bits back */
 267         I915_WRITE(PORT_HOTPLUG_EN, orig);
 268
 269         return ret;
 270 }
 271
 272 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
 273 {
 274         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 275
 276         /* CRT should always be at 0, but check anyway */
 277         if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
 278                 return false;
 279
 280         return intel_ddc_probe(intel_encoder);
 281 }
 282
 283 static enum drm_connector_status
 284 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
 285 {
 286         struct drm_encoder *encoder = &intel_encoder->enc;
 287         struct drm_device *dev = encoder->dev;
 288         struct drm_i915_private *dev_priv = dev->dev_private;
 289         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 290         uint32_t pipe = intel_crtc->pipe;
 291         uint32_t save_bclrpat;
 292         uint32_t save_vtotal;
 293         uint32_t vtotal, vactive;
 294         uint32_t vsample;
 295         uint32_t vblank, vblank_start, vblank_end;
 296         uint32_t dsl;
 297         uint32_t bclrpat_reg;
 298         uint32_t vtotal_reg;
 299         uint32_t vblank_reg;
 300         uint32_t vsync_reg;
 301         uint32_t pipeconf_reg;
 302         uint32_t pipe_dsl_reg;
 303         uint8_t st00;
 304         enum drm_connector_status status;
 305
 306         if (pipe == 0) {
 307                 bclrpat_reg = BCLRPAT_A;
 308                 vtotal_reg = VTOTAL_A;
 309                 vblank_reg = VBLANK_A;
 310                 vsync_reg = VSYNC_A;
 311                 pipeconf_reg = PIPEACONF;
 312                 pipe_dsl_reg = PIPEADSL;
 313         } else {
 314                 bclrpat_reg = BCLRPAT_B;
 315                 vtotal_reg = VTOTAL_B;
 316                 vblank_reg = VBLANK_B;
 317                 vsync_reg = VSYNC_B;
 318                 pipeconf_reg = PIPEBCONF;
 319                 pipe_dsl_reg = PIPEBDSL;
 320         }
 321
 322         save_bclrpat = I915_READ(bclrpat_reg);
 323         save_vtotal = I915_READ(vtotal_reg);
 324         vblank = I915_READ(vblank_reg);
 325
 326         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 327         vactive = (save_vtotal & 0x7ff) + 1;
 328
 329         vblank_start = (vblank & 0xfff) + 1;
 330         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 331
 332         /* Set the border color to purple. */
 333         I915_WRITE(bclrpat_reg, 0x500050);
 334
 335         if (IS_I9XX(dev)) {
 336                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 337                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 338                 /* Wait for next Vblank to substitue
 339                  * border color for Color info */
 340                 intel_wait_for_vblank(dev);
 341                 st00 = I915_READ8(VGA_MSR_WRITE);
 342                 status = ((st00 & (1 << 4)) != 0) ?
 343                         connector_status_connected :
 344                         connector_status_disconnected;
 345
 346                 I915_WRITE(pipeconf_reg, pipeconf);
 347         } else {
 348                 bool restore_vblank = false;
 349                 int count, detect;
 350
 351                 /*
 352                 * If there isn't any border, add some.
 353                 * Yes, this will flicker
 354                 */
 355                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 356                         uint32_t vsync = I915_READ(vsync_reg);
 357                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 358
 359                         vblank_start = vsync_start;
 360                         I915_WRITE(vblank_reg,
 361                                    (vblank_start - 1) |
 362                                    ((vblank_end - 1) << 16));
 363                         restore_vblank = true;
 364                 }
 365                 /* sample in the vertical border, selecting the larger one */
 366                 if (vblank_start - vactive >= vtotal - vblank_end)
 367                         vsample = (vblank_start + vactive) >> 1;
 368                 else
 369                         vsample = (vtotal + vblank_end) >> 1;
 370
 371                 /*
 372                  * Wait for the border to be displayed
 373                  */
 374                 while (I915_READ(pipe_dsl_reg) >= vactive)
 375                         ;
 376                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 377                         ;
 378                 /*
 379                  * Watch ST00 for an entire scanline
 380                  */
 381                 detect = 0;
 382                 count = 0;
 383                 do {
 384                         count++;
 385                         /* Read the ST00 VGA status register */
 386                         st00 = I915_READ8(VGA_MSR_WRITE);
 387                         if (st00 & (1 << 4))
 388                                 detect++;
 389                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 390
 391                 /* restore vblank if necessary */
 392                 if (restore_vblank)
 393                         I915_WRITE(vblank_reg, vblank);
 394                 /*
 395                  * If more than 3/4 of the scanline detected a monitor,
 396                  * then it is assumed to be present. This works even on i830,
 397                  * where there isn't any way to force the border color across
 398                  * the screen
 399                  */
 400                 status = detect * 4 > count * 3 ?
 401                          connector_status_connected :
 402                          connector_status_disconnected;
 403         }
 404
 405         /* Restore previous settings */
 406         I915_WRITE(bclrpat_reg, save_bclrpat);
 407
 408         return status;
 409 }
 410
 411 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
 412 {
 413         struct drm_device *dev = connector->dev;
 414         struct drm_encoder *encoder = intel_attached_encoder(connector);
 415         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 416         struct drm_crtc *crtc;
 417         int dpms_mode;
 418         enum drm_connector_status status;
 419
 420         if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
 421                 if (intel_crt_detect_hotplug(connector))
 422                         return connector_status_connected;
 423                 else
 424                         return connector_status_disconnected;
 425         }
 426
 427         if (intel_crt_detect_ddc(encoder))
 428                 return connector_status_connected;
 429
 430         /* for pre-945g platforms use load detect */
 431         if (encoder->crtc && encoder->crtc->enabled) {
 432                 status = intel_crt_load_detect(encoder->crtc, intel_encoder);
 433         } else {
 434                 crtc = intel_get_load_detect_pipe(intel_encoder, connector,
 435                                                   NULL, &dpms_mode);
 436                 if (crtc) {
 437                         status = intel_crt_load_detect(crtc, intel_encoder);
 438                         intel_release_load_detect_pipe(intel_encoder,
 439                                                        connector, dpms_mode);
 440                 } else
 441                         status = connector_status_unknown;
 442         }
 443
 444         return status;
 445 }
 446
 447 static void intel_crt_destroy(struct drm_connector *connector)
 448 {
 449         drm_sysfs_connector_remove(connector);
 450         drm_connector_cleanup(connector);
 451         kfree(connector);
 452 }
 453
 454 static int intel_crt_get_modes(struct drm_connector *connector)
 455 {
 456         int ret;
 457         struct drm_encoder *encoder = intel_attached_encoder(connector);
 458         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 459         struct i2c_adapter *ddc_bus;
 460         struct drm_device *dev = connector->dev;
 461
 462
 463         ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
 464         if (ret || !IS_G4X(dev))
 465                 goto end;
 466
 467         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 468         ddc_bus = intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
 469
 470         if (!ddc_bus) {
 471                 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
 472                            "DDC bus registration failed for CRTDDC_D.\n");
 473                 goto end;
 474         }
 475         /* Try to get modes by GPIOD port */
 476         ret = intel_ddc_get_modes(connector, ddc_bus);
 477         intel_i2c_destroy(ddc_bus);
 478
 479 end:
 480         return ret;
 481
 482 }
 483
 484 static int intel_crt_set_property(struct drm_connector *connector,
 485                                   struct drm_property *property,
 486                                   uint64_t value)
 487 {
 488         return 0;
 489 }
 490
 491 /*
 492  * Routines for controlling stuff on the analog port
 493  */
 494
 495 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 496         .dpms = intel_crt_dpms,
 497         .mode_fixup = intel_crt_mode_fixup,
 498         .prepare = intel_encoder_prepare,
 499         .commit = intel_encoder_commit,
 500         .mode_set = intel_crt_mode_set,
 501 };
 502
 503 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 504         .dpms = drm_helper_connector_dpms,
 505         .detect = intel_crt_detect,
 506         .fill_modes = drm_helper_probe_single_connector_modes,
 507         .destroy = intel_crt_destroy,
 508         .set_property = intel_crt_set_property,
 509 };
 510
 511 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 512         .mode_valid = intel_crt_mode_valid,
 513         .get_modes = intel_crt_get_modes,
 514         .best_encoder = intel_attached_encoder,
 515 };
 516
 517 static void intel_crt_enc_destroy(struct drm_encoder *encoder)
 518 {
 519         struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
 520
 521         intel_i2c_destroy(intel_encoder->ddc_bus);
 522         drm_encoder_cleanup(encoder);
 523         kfree(intel_encoder);
 524 }
 525
 526 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 527         .destroy = intel_crt_enc_destroy,
 528 };
 529
 530 void intel_crt_init(struct drm_device *dev)
 531 {
 532         struct drm_connector *connector;
 533         struct intel_encoder *intel_encoder;
 534         struct intel_connector *intel_connector;
 535         struct drm_i915_private *dev_priv = dev->dev_private;
 536         u32 i2c_reg;
 537
 538         intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
 539         if (!intel_encoder)
 540                 return;
 541
 542         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 543         if (!intel_connector) {
 544                 kfree(intel_encoder);
 545                 return;
 546         }
 547
 548         connector = &intel_connector->base;
 549         drm_connector_init(dev, &intel_connector->base,
 550                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 551
 552         drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs,
 553                          DRM_MODE_ENCODER_DAC);
 554
 555         drm_mode_connector_attach_encoder(&intel_connector->base,
 556                                           &intel_encoder->enc);
 557
 558         /* Set up the DDC bus. */
 559         if (HAS_PCH_SPLIT(dev))
 560                 i2c_reg = PCH_GPIOA;
 561         else {
 562                 i2c_reg = GPIOA;
 563                 /* Use VBT information for CRT DDC if available */
 564                 if (dev_priv->crt_ddc_bus != 0)
 565                         i2c_reg = dev_priv->crt_ddc_bus;
 566         }
 567         intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
 568         if (!intel_encoder->ddc_bus) {
 569                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 570                            "failed.\n");
 571                 return;
 572         }
 573
 574         intel_encoder->type = INTEL_OUTPUT_ANALOG;
 575         intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
 576                                    (1 << INTEL_ANALOG_CLONE_BIT) |
 577                                    (1 << INTEL_SDVO_LVDS_CLONE_BIT);
 578         intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 579         connector->interlace_allowed = 1;
 580         connector->doublescan_allowed = 0;
 581
 582         drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
 583         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 584
 585         drm_sysfs_connector_add(connector);
 586
 587         if (I915_HAS_HOTPLUG(dev))
 588                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 589         else
 590                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 591
 592         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 593 }