drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_atomic_helper.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_crtc_helper.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38
  39 /* Here's the desired hotplug mode */
  40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  41                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  42                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  43                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  44                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  45                            ADPA_CRT_HOTPLUG_ENABLE)
  46
  47 struct intel_crt {
  48         struct intel_encoder base;
  49         /* DPMS state is stored in the connector, which we need in the
  50          * encoder's enable/disable callbacks */
  51         struct intel_connector *connector;
  52         bool force_hotplug_required;
  53         i915_reg_t adpa_reg;
  54 };
  55
  56 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  57 {
  58         return container_of(encoder, struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  62 {
  63         return intel_encoder_to_crt(intel_attached_encoder(connector));
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         enum intel_display_power_domain power_domain;
  73         u32 tmp;
  74         bool ret;
  75
  76         power_domain = intel_display_port_power_domain(encoder);
  77         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  78                 return false;
  79
  80         ret = false;
  81
  82         tmp = I915_READ(crt->adpa_reg);
  83
  84         if (!(tmp & ADPA_DAC_ENABLE))
  85                 goto out;
  86
  87         if (HAS_PCH_CPT(dev))
  88                 *pipe = PORT_TO_PIPE_CPT(tmp);
  89         else
  90                 *pipe = PORT_TO_PIPE(tmp);
  91
  92         ret = true;
  93 out:
  94         intel_display_power_put(dev_priv, power_domain);
  95
  96         return ret;
  97 }
  98
  99 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
 100 {
 101         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 102         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 103         u32 tmp, flags = 0;
 104
 105         tmp = I915_READ(crt->adpa_reg);
 106
 107         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
 108                 flags |= DRM_MODE_FLAG_PHSYNC;
 109         else
 110                 flags |= DRM_MODE_FLAG_NHSYNC;
 111
 112         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 113                 flags |= DRM_MODE_FLAG_PVSYNC;
 114         else
 115                 flags |= DRM_MODE_FLAG_NVSYNC;
 116
 117         return flags;
 118 }
 119
 120 static void intel_crt_get_config(struct intel_encoder *encoder,
 121                                  struct intel_crtc_state *pipe_config)
 122 {
 123         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 124
 125         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 126 }
 127
 128 static void hsw_crt_get_config(struct intel_encoder *encoder,
 129                                struct intel_crtc_state *pipe_config)
 130 {
 131         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 132
 133         intel_ddi_get_config(encoder, pipe_config);
 134
 135         pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 136                                               DRM_MODE_FLAG_NHSYNC |
 137                                               DRM_MODE_FLAG_PVSYNC |
 138                                               DRM_MODE_FLAG_NVSYNC);
 139         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 140
 141         pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv);
 142 }
 143
 144 /* Note: The caller is required to filter out dpms modes not supported by the
 145  * platform. */
 146 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 147 {
 148         struct drm_device *dev = encoder->base.dev;
 149         struct drm_i915_private *dev_priv = dev->dev_private;
 150         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 151         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 152         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 153         u32 adpa;
 154
 155         if (INTEL_INFO(dev)->gen >= 5)
 156                 adpa = ADPA_HOTPLUG_BITS;
 157         else
 158                 adpa = 0;
 159
 160         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 161                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 162         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 163                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 164
 165         /* For CPT allow 3 pipe config, for others just use A or B */
 166         if (HAS_PCH_LPT(dev))
 167                 ; /* Those bits don't exist here */
 168         else if (HAS_PCH_CPT(dev))
 169                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 170         else if (crtc->pipe == 0)
 171                 adpa |= ADPA_PIPE_A_SELECT;
 172         else
 173                 adpa |= ADPA_PIPE_B_SELECT;
 174
 175         if (!HAS_PCH_SPLIT(dev))
 176                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 177
 178         switch (mode) {
 179         case DRM_MODE_DPMS_ON:
 180                 adpa |= ADPA_DAC_ENABLE;
 181                 break;
 182         case DRM_MODE_DPMS_STANDBY:
 183                 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 184                 break;
 185         case DRM_MODE_DPMS_SUSPEND:
 186                 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 187                 break;
 188         case DRM_MODE_DPMS_OFF:
 189                 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 190                 break;
 191         }
 192
 193         I915_WRITE(crt->adpa_reg, adpa);
 194 }
 195
 196 static void intel_disable_crt(struct intel_encoder *encoder)
 197 {
 198         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 199 }
 200
 201 static void pch_disable_crt(struct intel_encoder *encoder)
 202 {
 203 }
 204
 205 static void pch_post_disable_crt(struct intel_encoder *encoder)
 206 {
 207         intel_disable_crt(encoder);
 208 }
 209
 210 static void intel_enable_crt(struct intel_encoder *encoder)
 211 {
 212         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_ON);
 213 }
 214
 215 static enum drm_mode_status
 216 intel_crt_mode_valid(struct drm_connector *connector,
 217                      struct drm_display_mode *mode)
 218 {
 219         struct drm_device *dev = connector->dev;
 220         int max_dotclk = to_i915(dev)->max_dotclk_freq;
 221         int max_clock;
 222
 223         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 224                 return MODE_NO_DBLESCAN;
 225
 226         if (mode->clock < 25000)
 227                 return MODE_CLOCK_LOW;
 228
 229         if (HAS_PCH_LPT(dev))
 230                 max_clock = 180000;
 231         else if (IS_VALLEYVIEW(dev))
 232                 /*
 233                  * 270 MHz due to current DPLL limits,
 234                  * DAC limit supposedly 355 MHz.
 235                  */
 236                 max_clock = 270000;
 237         else if (IS_GEN3(dev) || IS_GEN4(dev))
 238                 max_clock = 400000;
 239         else
 240                 max_clock = 350000;
 241         if (mode->clock > max_clock)
 242                 return MODE_CLOCK_HIGH;
 243
 244         if (mode->clock > max_dotclk)
 245                 return MODE_CLOCK_HIGH;
 246
 247         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 248         if (HAS_PCH_LPT(dev) &&
 249             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 250                 return MODE_CLOCK_HIGH;
 251
 252         return MODE_OK;
 253 }
 254
 255 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 256                                      struct intel_crtc_state *pipe_config)
 257 {
 258         struct drm_device *dev = encoder->base.dev;
 259
 260         if (HAS_PCH_SPLIT(dev))
 261                 pipe_config->has_pch_encoder = true;
 262
 263         /* LPT FDI RX only supports 8bpc. */
 264         if (HAS_PCH_LPT(dev))
 265                 pipe_config->pipe_bpp = 24;
 266
 267         /* FDI must always be 2.7 GHz */
 268         if (HAS_DDI(dev))
 269                 pipe_config->port_clock = 135000 * 2;
 270
 271         return true;
 272 }
 273
 274 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 275 {
 276         struct drm_device *dev = connector->dev;
 277         struct intel_crt *crt = intel_attached_crt(connector);
 278         struct drm_i915_private *dev_priv = dev->dev_private;
 279         u32 adpa;
 280         bool ret;
 281
 282         /* The first time through, trigger an explicit detection cycle */
 283         if (crt->force_hotplug_required) {
 284                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 285                 u32 save_adpa;
 286
 287                 crt->force_hotplug_required = 0;
 288
 289                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 290                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 291
 292                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 293                 if (turn_off_dac)
 294                         adpa &= ~ADPA_DAC_ENABLE;
 295
 296                 I915_WRITE(crt->adpa_reg, adpa);
 297
 298                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 299                              1000))
 300                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 301
 302                 if (turn_off_dac) {
 303                         I915_WRITE(crt->adpa_reg, save_adpa);
 304                         POSTING_READ(crt->adpa_reg);
 305                 }
 306         }
 307
 308         /* Check the status to see if both blue and green are on now */
 309         adpa = I915_READ(crt->adpa_reg);
 310         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 311                 ret = true;
 312         else
 313                 ret = false;
 314         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 315
 316         return ret;
 317 }
 318
 319 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 320 {
 321         struct drm_device *dev = connector->dev;
 322         struct intel_crt *crt = intel_attached_crt(connector);
 323         struct drm_i915_private *dev_priv = dev->dev_private;
 324         u32 adpa;
 325         bool ret;
 326         u32 save_adpa;
 327
 328         save_adpa = adpa = I915_READ(crt->adpa_reg);
 329         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 330
 331         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 332
 333         I915_WRITE(crt->adpa_reg, adpa);
 334
 335         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 336                      1000)) {
 337                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 338                 I915_WRITE(crt->adpa_reg, save_adpa);
 339         }
 340
 341         /* Check the status to see if both blue and green are on now */
 342         adpa = I915_READ(crt->adpa_reg);
 343         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 344                 ret = true;
 345         else
 346                 ret = false;
 347
 348         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 349
 350         return ret;
 351 }
 352
 353 /**
 354  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 355  *
 356  * Not for i915G/i915GM
 357  *
 358  * \return true if CRT is connected.
 359  * \return false if CRT is disconnected.
 360  */
 361 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 362 {
 363         struct drm_device *dev = connector->dev;
 364         struct drm_i915_private *dev_priv = dev->dev_private;
 365         u32 stat;
 366         bool ret = false;
 367         int i, tries = 0;
 368
 369         if (HAS_PCH_SPLIT(dev))
 370                 return intel_ironlake_crt_detect_hotplug(connector);
 371
 372         if (IS_VALLEYVIEW(dev))
 373                 return valleyview_crt_detect_hotplug(connector);
 374
 375         /*
 376          * On 4 series desktop, CRT detect sequence need to be done twice
 377          * to get a reliable result.
 378          */
 379
 380         if (IS_G4X(dev) && !IS_GM45(dev))
 381                 tries = 2;
 382         else
 383                 tries = 1;
 384
 385         for (i = 0; i < tries ; i++) {
 386                 /* turn on the FORCE_DETECT */
 387                 i915_hotplug_interrupt_update(dev_priv,
 388                                               CRT_HOTPLUG_FORCE_DETECT,
 389                                               CRT_HOTPLUG_FORCE_DETECT);
 390                 /* wait for FORCE_DETECT to go off */
 391                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 392                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 393                              1000))
 394                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 395         }
 396
 397         stat = I915_READ(PORT_HOTPLUG_STAT);
 398         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 399                 ret = true;
 400
 401         /* clear the interrupt we just generated, if any */
 402         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 403
 404         i915_hotplug_interrupt_update(dev_priv, CRT_HOTPLUG_FORCE_DETECT, 0);
 405
 406         return ret;
 407 }
 408
 409 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 410                                 struct i2c_adapter *i2c)
 411 {
 412         struct edid *edid;
 413
 414         edid = drm_get_edid(connector, i2c);
 415
 416         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 417                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 418                 intel_gmbus_force_bit(i2c, true);
 419                 edid = drm_get_edid(connector, i2c);
 420                 intel_gmbus_force_bit(i2c, false);
 421         }
 422
 423         return edid;
 424 }
 425
 426 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 427 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 428                                 struct i2c_adapter *adapter)
 429 {
 430         struct edid *edid;
 431         int ret;
 432
 433         edid = intel_crt_get_edid(connector, adapter);
 434         if (!edid)
 435                 return 0;
 436
 437         ret = intel_connector_update_modes(connector, edid);
 438         kfree(edid);
 439
 440         return ret;
 441 }
 442
 443 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 444 {
 445         struct intel_crt *crt = intel_attached_crt(connector);
 446         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 447         struct edid *edid;
 448         struct i2c_adapter *i2c;
 449
 450         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 451
 452         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 453         edid = intel_crt_get_edid(connector, i2c);
 454
 455         if (edid) {
 456                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 457
 458                 /*
 459                  * This may be a DVI-I connector with a shared DDC
 460                  * link between analog and digital outputs, so we
 461                  * have to check the EDID input spec of the attached device.
 462                  */
 463                 if (!is_digital) {
 464                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 465                         return true;
 466                 }
 467
 468                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 469         } else {
 470                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 471         }
 472
 473         kfree(edid);
 474
 475         return false;
 476 }
 477
 478 static enum drm_connector_status
 479 intel_crt_load_detect(struct intel_crt *crt, uint32_t pipe)
 480 {
 481         struct drm_device *dev = crt->base.base.dev;
 482         struct drm_i915_private *dev_priv = dev->dev_private;
 483         uint32_t save_bclrpat;
 484         uint32_t save_vtotal;
 485         uint32_t vtotal, vactive;
 486         uint32_t vsample;
 487         uint32_t vblank, vblank_start, vblank_end;
 488         uint32_t dsl;
 489         i915_reg_t bclrpat_reg, vtotal_reg,
 490                 vblank_reg, vsync_reg, pipeconf_reg, pipe_dsl_reg;
 491         uint8_t st00;
 492         enum drm_connector_status status;
 493
 494         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 495
 496         bclrpat_reg = BCLRPAT(pipe);
 497         vtotal_reg = VTOTAL(pipe);
 498         vblank_reg = VBLANK(pipe);
 499         vsync_reg = VSYNC(pipe);
 500         pipeconf_reg = PIPECONF(pipe);
 501         pipe_dsl_reg = PIPEDSL(pipe);
 502
 503         save_bclrpat = I915_READ(bclrpat_reg);
 504         save_vtotal = I915_READ(vtotal_reg);
 505         vblank = I915_READ(vblank_reg);
 506
 507         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 508         vactive = (save_vtotal & 0x7ff) + 1;
 509
 510         vblank_start = (vblank & 0xfff) + 1;
 511         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 512
 513         /* Set the border color to purple. */
 514         I915_WRITE(bclrpat_reg, 0x500050);
 515
 516         if (!IS_GEN2(dev)) {
 517                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 518                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 519                 POSTING_READ(pipeconf_reg);
 520                 /* Wait for next Vblank to substitue
 521                  * border color for Color info */
 522                 intel_wait_for_vblank(dev, pipe);
 523                 st00 = I915_READ8(_VGA_MSR_WRITE);
 524                 status = ((st00 & (1 << 4)) != 0) ?
 525                         connector_status_connected :
 526                         connector_status_disconnected;
 527
 528                 I915_WRITE(pipeconf_reg, pipeconf);
 529         } else {
 530                 bool restore_vblank = false;
 531                 int count, detect;
 532
 533                 /*
 534                 * If there isn't any border, add some.
 535                 * Yes, this will flicker
 536                 */
 537                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 538                         uint32_t vsync = I915_READ(vsync_reg);
 539                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 540
 541                         vblank_start = vsync_start;
 542                         I915_WRITE(vblank_reg,
 543                                    (vblank_start - 1) |
 544                                    ((vblank_end - 1) << 16));
 545                         restore_vblank = true;
 546                 }
 547                 /* sample in the vertical border, selecting the larger one */
 548                 if (vblank_start - vactive >= vtotal - vblank_end)
 549                         vsample = (vblank_start + vactive) >> 1;
 550                 else
 551                         vsample = (vtotal + vblank_end) >> 1;
 552
 553                 /*
 554                  * Wait for the border to be displayed
 555                  */
 556                 while (I915_READ(pipe_dsl_reg) >= vactive)
 557                         ;
 558                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 559                         ;
 560                 /*
 561                  * Watch ST00 for an entire scanline
 562                  */
 563                 detect = 0;
 564                 count = 0;
 565                 do {
 566                         count++;
 567                         /* Read the ST00 VGA status register */
 568                         st00 = I915_READ8(_VGA_MSR_WRITE);
 569                         if (st00 & (1 << 4))
 570                                 detect++;
 571                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 572
 573                 /* restore vblank if necessary */
 574                 if (restore_vblank)
 575                         I915_WRITE(vblank_reg, vblank);
 576                 /*
 577                  * If more than 3/4 of the scanline detected a monitor,
 578                  * then it is assumed to be present. This works even on i830,
 579                  * where there isn't any way to force the border color across
 580                  * the screen
 581                  */
 582                 status = detect * 4 > count * 3 ?
 583                          connector_status_connected :
 584                          connector_status_disconnected;
 585         }
 586
 587         /* Restore previous settings */
 588         I915_WRITE(bclrpat_reg, save_bclrpat);
 589
 590         return status;
 591 }
 592
 593 static enum drm_connector_status
 594 intel_crt_detect(struct drm_connector *connector, bool force)
 595 {
 596         struct drm_device *dev = connector->dev;
 597         struct drm_i915_private *dev_priv = dev->dev_private;
 598         struct intel_crt *crt = intel_attached_crt(connector);
 599         struct intel_encoder *intel_encoder = &crt->base;
 600         enum intel_display_power_domain power_domain;
 601         enum drm_connector_status status;
 602         struct intel_load_detect_pipe tmp;
 603         struct drm_modeset_acquire_ctx ctx;
 604
 605         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 606                       connector->base.id, connector->name,
 607                       force);
 608
 609         power_domain = intel_display_port_power_domain(intel_encoder);
 610         intel_display_power_get(dev_priv, power_domain);
 611
 612         if (I915_HAS_HOTPLUG(dev)) {
 613                 /* We can not rely on the HPD pin always being correctly wired
 614                  * up, for example many KVM do not pass it through, and so
 615                  * only trust an assertion that the monitor is connected.
 616                  */
 617                 if (intel_crt_detect_hotplug(connector)) {
 618                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 619                         status = connector_status_connected;
 620                         goto out;
 621                 } else
 622                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 623         }
 624
 625         if (intel_crt_detect_ddc(connector)) {
 626                 status = connector_status_connected;
 627                 goto out;
 628         }
 629
 630         /* Load detection is broken on HPD capable machines. Whoever wants a
 631          * broken monitor (without edid) to work behind a broken kvm (that fails
 632          * to have the right resistors for HP detection) needs to fix this up.
 633          * For now just bail out. */
 634         if (I915_HAS_HOTPLUG(dev) && !i915.load_detect_test) {
 635                 status = connector_status_disconnected;
 636                 goto out;
 637         }
 638
 639         if (!force) {
 640                 status = connector->status;
 641                 goto out;
 642         }
 643
 644         drm_modeset_acquire_init(&ctx, 0);
 645
 646         /* for pre-945g platforms use load detect */
 647         if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
 648                 if (intel_crt_detect_ddc(connector))
 649                         status = connector_status_connected;
 650                 else if (INTEL_INFO(dev)->gen < 4)
 651                         status = intel_crt_load_detect(crt,
 652                                 to_intel_crtc(connector->state->crtc)->pipe);
 653                 else if (i915.load_detect_test)
 654                         status = connector_status_disconnected;
 655                 else
 656                         status = connector_status_unknown;
 657                 intel_release_load_detect_pipe(connector, &tmp, &ctx);
 658         } else
 659                 status = connector_status_unknown;
 660
 661         drm_modeset_drop_locks(&ctx);
 662         drm_modeset_acquire_fini(&ctx);
 663
 664 out:
 665         intel_display_power_put(dev_priv, power_domain);
 666         return status;
 667 }
 668
 669 static void intel_crt_destroy(struct drm_connector *connector)
 670 {
 671         drm_connector_cleanup(connector);
 672         kfree(connector);
 673 }
 674
 675 static int intel_crt_get_modes(struct drm_connector *connector)
 676 {
 677         struct drm_device *dev = connector->dev;
 678         struct drm_i915_private *dev_priv = dev->dev_private;
 679         struct intel_crt *crt = intel_attached_crt(connector);
 680         struct intel_encoder *intel_encoder = &crt->base;
 681         enum intel_display_power_domain power_domain;
 682         int ret;
 683         struct i2c_adapter *i2c;
 684
 685         power_domain = intel_display_port_power_domain(intel_encoder);
 686         intel_display_power_get(dev_priv, power_domain);
 687
 688         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 689         ret = intel_crt_ddc_get_modes(connector, i2c);
 690         if (ret || !IS_G4X(dev))
 691                 goto out;
 692
 693         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 694         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPB);
 695         ret = intel_crt_ddc_get_modes(connector, i2c);
 696
 697 out:
 698         intel_display_power_put(dev_priv, power_domain);
 699
 700         return ret;
 701 }
 702
 703 static int intel_crt_set_property(struct drm_connector *connector,
 704                                   struct drm_property *property,
 705                                   uint64_t value)
 706 {
 707         return 0;
 708 }
 709
 710 static void intel_crt_reset(struct drm_connector *connector)
 711 {
 712         struct drm_device *dev = connector->dev;
 713         struct drm_i915_private *dev_priv = dev->dev_private;
 714         struct intel_crt *crt = intel_attached_crt(connector);
 715
 716         if (INTEL_INFO(dev)->gen >= 5) {
 717                 u32 adpa;
 718
 719                 adpa = I915_READ(crt->adpa_reg);
 720                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 721                 adpa |= ADPA_HOTPLUG_BITS;
 722                 I915_WRITE(crt->adpa_reg, adpa);
 723                 POSTING_READ(crt->adpa_reg);
 724
 725                 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
 726                 crt->force_hotplug_required = 1;
 727         }
 728
 729 }
 730
 731 /*
 732  * Routines for controlling stuff on the analog port
 733  */
 734
 735 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 736         .reset = intel_crt_reset,
 737         .dpms = drm_atomic_helper_connector_dpms,
 738         .detect = intel_crt_detect,
 739         .fill_modes = drm_helper_probe_single_connector_modes,
 740         .destroy = intel_crt_destroy,
 741         .set_property = intel_crt_set_property,
 742         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 743         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 744         .atomic_get_property = intel_connector_atomic_get_property,
 745 };
 746
 747 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 748         .mode_valid = intel_crt_mode_valid,
 749         .get_modes = intel_crt_get_modes,
 750         .best_encoder = intel_best_encoder,
 751 };
 752
 753 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 754         .destroy = intel_encoder_destroy,
 755 };
 756
 757 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 758 {
 759         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 760         return 1;
 761 }
 762
 763 static const struct dmi_system_id intel_no_crt[] = {
 764         {
 765                 .callback = intel_no_crt_dmi_callback,
 766                 .ident = "ACER ZGB",
 767                 .matches = {
 768                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 769                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 770                 },
 771         },
 772         {
 773                 .callback = intel_no_crt_dmi_callback,
 774                 .ident = "DELL XPS 8700",
 775                 .matches = {
 776                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 777                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 778                 },
 779         },
 780         { }
 781 };
 782
 783 void intel_crt_init(struct drm_device *dev)
 784 {
 785         struct drm_connector *connector;
 786         struct intel_crt *crt;
 787         struct intel_connector *intel_connector;
 788         struct drm_i915_private *dev_priv = dev->dev_private;
 789         i915_reg_t adpa_reg;
 790         u32 adpa;
 791
 792         /* Skip machines without VGA that falsely report hotplug events */
 793         if (dmi_check_system(intel_no_crt))
 794                 return;
 795
 796         if (HAS_PCH_SPLIT(dev))
 797                 adpa_reg = PCH_ADPA;
 798         else if (IS_VALLEYVIEW(dev))
 799                 adpa_reg = VLV_ADPA;
 800         else
 801                 adpa_reg = ADPA;
 802
 803         adpa = I915_READ(adpa_reg);
 804         if ((adpa & ADPA_DAC_ENABLE) == 0) {
 805                 /*
 806                  * On some machines (some IVB at least) CRT can be
 807                  * fused off, but there's no known fuse bit to
 808                  * indicate that. On these machine the ADPA register
 809                  * works normally, except the DAC enable bit won't
 810                  * take. So the only way to tell is attempt to enable
 811                  * it and see what happens.
 812                  */
 813                 I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |
 814                            ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 815                 if ((I915_READ(adpa_reg) & ADPA_DAC_ENABLE) == 0)
 816                         return;
 817                 I915_WRITE(adpa_reg, adpa);
 818         }
 819
 820         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 821         if (!crt)
 822                 return;
 823
 824         intel_connector = intel_connector_alloc();
 825         if (!intel_connector) {
 826                 kfree(crt);
 827                 return;
 828         }
 829
 830         connector = &intel_connector->base;
 831         crt->connector = intel_connector;
 832         drm_connector_init(dev, &intel_connector->base,
 833                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 834
 835         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 836                          DRM_MODE_ENCODER_DAC, NULL);
 837
 838         intel_connector_attach_encoder(intel_connector, &crt->base);
 839
 840         crt->base.type = INTEL_OUTPUT_ANALOG;
 841         crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 842         if (IS_I830(dev))
 843                 crt->base.crtc_mask = (1 << 0);
 844         else
 845                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 846
 847         if (IS_GEN2(dev))
 848                 connector->interlace_allowed = 0;
 849         else
 850                 connector->interlace_allowed = 1;
 851         connector->doublescan_allowed = 0;
 852
 853         crt->adpa_reg = adpa_reg;
 854
 855         crt->base.compute_config = intel_crt_compute_config;
 856         if (HAS_PCH_SPLIT(dev)) {
 857                 crt->base.disable = pch_disable_crt;
 858                 crt->base.post_disable = pch_post_disable_crt;
 859         } else {
 860                 crt->base.disable = intel_disable_crt;
 861         }
 862         crt->base.enable = intel_enable_crt;
 863         if (I915_HAS_HOTPLUG(dev))
 864                 crt->base.hpd_pin = HPD_CRT;
 865         if (HAS_DDI(dev)) {
 866                 crt->base.get_config = hsw_crt_get_config;
 867                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 868         } else {
 869                 crt->base.get_config = intel_crt_get_config;
 870                 crt->base.get_hw_state = intel_crt_get_hw_state;
 871         }
 872         intel_connector->get_hw_state = intel_connector_get_hw_state;
 873         intel_connector->unregister = intel_connector_unregister;
 874
 875         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 876
 877         drm_connector_register(connector);
 878
 879         if (!I915_HAS_HOTPLUG(dev))
 880                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 881
 882         /*
 883          * Configure the automatic hotplug detection stuff
 884          */
 885         crt->force_hotplug_required = 0;
 886
 887         /*
 888          * TODO: find a proper way to discover whether we need to set the the
 889          * polarity and link reversal bits or not, instead of relying on the
 890          * BIOS.
 891          */
 892         if (HAS_PCH_LPT(dev)) {
 893                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 894                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 895
 896                 dev_priv->fdi_rx_config = I915_READ(FDI_RX_CTL(PIPE_A)) & fdi_config;
 897         }
 898
 899         intel_crt_reset(connector);
 900 }