2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base
;
48 bool force_hotplug_required
;
52 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
54 return container_of(intel_attached_encoder(connector
),
55 struct intel_crt
, base
);
58 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
60 return container_of(encoder
, struct intel_crt
, base
);
63 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
66 struct drm_device
*dev
= encoder
->base
.dev
;
67 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
68 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
71 tmp
= I915_READ(crt
->adpa_reg
);
73 if (!(tmp
& ADPA_DAC_ENABLE
))
77 *pipe
= PORT_TO_PIPE_CPT(tmp
);
79 *pipe
= PORT_TO_PIPE(tmp
);
84 static void intel_disable_crt(struct intel_encoder
*encoder
)
86 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
87 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
90 temp
= I915_READ(crt
->adpa_reg
);
91 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
92 temp
&= ~ADPA_DAC_ENABLE
;
93 I915_WRITE(crt
->adpa_reg
, temp
);
96 static void intel_enable_crt(struct intel_encoder
*encoder
)
98 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
99 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
102 temp
= I915_READ(crt
->adpa_reg
);
103 temp
|= ADPA_DAC_ENABLE
;
104 I915_WRITE(crt
->adpa_reg
, temp
);
107 /* Note: The caller is required to filter out dpms modes not supported by the
109 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
111 struct drm_device
*dev
= encoder
->base
.dev
;
112 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
113 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
116 temp
= I915_READ(crt
->adpa_reg
);
117 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
118 temp
&= ~ADPA_DAC_ENABLE
;
121 case DRM_MODE_DPMS_ON
:
122 temp
|= ADPA_DAC_ENABLE
;
124 case DRM_MODE_DPMS_STANDBY
:
125 temp
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
127 case DRM_MODE_DPMS_SUSPEND
:
128 temp
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
130 case DRM_MODE_DPMS_OFF
:
131 temp
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
135 I915_WRITE(crt
->adpa_reg
, temp
);
138 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
140 struct drm_device
*dev
= connector
->dev
;
141 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
142 struct drm_crtc
*crtc
;
145 /* PCH platforms and VLV only support on/off. */
146 if (INTEL_INFO(dev
)->gen
< 5 && mode
!= DRM_MODE_DPMS_ON
)
147 mode
= DRM_MODE_DPMS_OFF
;
149 if (mode
== connector
->dpms
)
152 old_dpms
= connector
->dpms
;
153 connector
->dpms
= mode
;
155 /* Only need to change hw state when actually enabled */
156 crtc
= encoder
->base
.crtc
;
158 encoder
->connectors_active
= false;
162 /* We need the pipe to run for anything but OFF. */
163 if (mode
== DRM_MODE_DPMS_OFF
)
164 encoder
->connectors_active
= false;
166 encoder
->connectors_active
= true;
168 if (mode
< old_dpms
) {
169 /* From off to on, enable the pipe first. */
170 intel_crtc_update_dpms(crtc
);
172 intel_crt_set_dpms(encoder
, mode
);
174 intel_crt_set_dpms(encoder
, mode
);
176 intel_crtc_update_dpms(crtc
);
179 intel_modeset_check_state(connector
->dev
);
182 static int intel_crt_mode_valid(struct drm_connector
*connector
,
183 struct drm_display_mode
*mode
)
185 struct drm_device
*dev
= connector
->dev
;
188 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
189 return MODE_NO_DBLESCAN
;
191 if (mode
->clock
< 25000)
192 return MODE_CLOCK_LOW
;
198 if (mode
->clock
> max_clock
)
199 return MODE_CLOCK_HIGH
;
204 static bool intel_crt_mode_fixup(struct drm_encoder
*encoder
,
205 const struct drm_display_mode
*mode
,
206 struct drm_display_mode
*adjusted_mode
)
211 static void intel_crt_mode_set(struct drm_encoder
*encoder
,
212 struct drm_display_mode
*mode
,
213 struct drm_display_mode
*adjusted_mode
)
216 struct drm_device
*dev
= encoder
->dev
;
217 struct drm_crtc
*crtc
= encoder
->crtc
;
218 struct intel_crt
*crt
=
219 intel_encoder_to_crt(to_intel_encoder(encoder
));
220 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
221 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
224 if (HAS_PCH_SPLIT(dev
))
225 adpa
= ADPA_HOTPLUG_BITS
;
229 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
230 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
231 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
232 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
234 /* For CPT allow 3 pipe config, for others just use A or B */
235 if (HAS_PCH_LPT(dev
))
236 ; /* Those bits don't exist here */
237 else if (HAS_PCH_CPT(dev
))
238 adpa
|= PORT_TRANS_SEL_CPT(intel_crtc
->pipe
);
239 else if (intel_crtc
->pipe
== 0)
240 adpa
|= ADPA_PIPE_A_SELECT
;
242 adpa
|= ADPA_PIPE_B_SELECT
;
244 if (!HAS_PCH_SPLIT(dev
))
245 I915_WRITE(BCLRPAT(intel_crtc
->pipe
), 0);
247 I915_WRITE(crt
->adpa_reg
, adpa
);
250 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
252 struct drm_device
*dev
= connector
->dev
;
253 struct intel_crt
*crt
= intel_attached_crt(connector
);
254 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
258 /* The first time through, trigger an explicit detection cycle */
259 if (crt
->force_hotplug_required
) {
260 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
263 crt
->force_hotplug_required
= 0;
265 save_adpa
= adpa
= I915_READ(PCH_ADPA
);
266 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
268 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
270 adpa
&= ~ADPA_DAC_ENABLE
;
272 I915_WRITE(PCH_ADPA
, adpa
);
274 if (wait_for((I915_READ(PCH_ADPA
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
276 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
279 I915_WRITE(PCH_ADPA
, save_adpa
);
280 POSTING_READ(PCH_ADPA
);
284 /* Check the status to see if both blue and green are on now */
285 adpa
= I915_READ(PCH_ADPA
);
286 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
290 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
295 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
297 struct drm_device
*dev
= connector
->dev
;
298 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
303 save_adpa
= adpa
= I915_READ(ADPA
);
304 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
306 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
308 I915_WRITE(ADPA
, adpa
);
310 if (wait_for((I915_READ(ADPA
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
312 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
313 I915_WRITE(ADPA
, save_adpa
);
316 /* Check the status to see if both blue and green are on now */
317 adpa
= I915_READ(ADPA
);
318 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
323 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
325 /* FIXME: debug force function and remove */
332 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
334 * Not for i915G/i915GM
336 * \return true if CRT is connected.
337 * \return false if CRT is disconnected.
339 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
341 struct drm_device
*dev
= connector
->dev
;
342 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
343 u32 hotplug_en
, orig
, stat
;
347 if (HAS_PCH_SPLIT(dev
))
348 return intel_ironlake_crt_detect_hotplug(connector
);
350 if (IS_VALLEYVIEW(dev
))
351 return valleyview_crt_detect_hotplug(connector
);
354 * On 4 series desktop, CRT detect sequence need to be done twice
355 * to get a reliable result.
358 if (IS_G4X(dev
) && !IS_GM45(dev
))
362 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
363 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
365 for (i
= 0; i
< tries
; i
++) {
366 /* turn on the FORCE_DETECT */
367 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
368 /* wait for FORCE_DETECT to go off */
369 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
370 CRT_HOTPLUG_FORCE_DETECT
) == 0,
372 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
375 stat
= I915_READ(PORT_HOTPLUG_STAT
);
376 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
379 /* clear the interrupt we just generated, if any */
380 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
382 /* and put the bits back */
383 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
388 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
389 struct i2c_adapter
*i2c
)
393 edid
= drm_get_edid(connector
, i2c
);
395 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
396 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
397 intel_gmbus_force_bit(i2c
, true);
398 edid
= drm_get_edid(connector
, i2c
);
399 intel_gmbus_force_bit(i2c
, false);
405 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
406 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
407 struct i2c_adapter
*adapter
)
412 edid
= intel_crt_get_edid(connector
, adapter
);
416 ret
= intel_connector_update_modes(connector
, edid
);
422 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
424 struct intel_crt
*crt
= intel_attached_crt(connector
);
425 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
427 struct i2c_adapter
*i2c
;
429 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
431 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->crt_ddc_pin
);
432 edid
= intel_crt_get_edid(connector
, i2c
);
435 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
438 * This may be a DVI-I connector with a shared DDC
439 * link between analog and digital outputs, so we
440 * have to check the EDID input spec of the attached device.
443 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
447 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
449 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
457 static enum drm_connector_status
458 intel_crt_load_detect(struct intel_crt
*crt
)
460 struct drm_device
*dev
= crt
->base
.base
.dev
;
461 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
462 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
463 uint32_t save_bclrpat
;
464 uint32_t save_vtotal
;
465 uint32_t vtotal
, vactive
;
467 uint32_t vblank
, vblank_start
, vblank_end
;
469 uint32_t bclrpat_reg
;
473 uint32_t pipeconf_reg
;
474 uint32_t pipe_dsl_reg
;
476 enum drm_connector_status status
;
478 DRM_DEBUG_KMS("starting load-detect on CRT\n");
480 bclrpat_reg
= BCLRPAT(pipe
);
481 vtotal_reg
= VTOTAL(pipe
);
482 vblank_reg
= VBLANK(pipe
);
483 vsync_reg
= VSYNC(pipe
);
484 pipeconf_reg
= PIPECONF(pipe
);
485 pipe_dsl_reg
= PIPEDSL(pipe
);
487 save_bclrpat
= I915_READ(bclrpat_reg
);
488 save_vtotal
= I915_READ(vtotal_reg
);
489 vblank
= I915_READ(vblank_reg
);
491 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
492 vactive
= (save_vtotal
& 0x7ff) + 1;
494 vblank_start
= (vblank
& 0xfff) + 1;
495 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
497 /* Set the border color to purple. */
498 I915_WRITE(bclrpat_reg
, 0x500050);
501 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
502 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
503 POSTING_READ(pipeconf_reg
);
504 /* Wait for next Vblank to substitue
505 * border color for Color info */
506 intel_wait_for_vblank(dev
, pipe
);
507 st00
= I915_READ8(VGA_MSR_WRITE
);
508 status
= ((st00
& (1 << 4)) != 0) ?
509 connector_status_connected
:
510 connector_status_disconnected
;
512 I915_WRITE(pipeconf_reg
, pipeconf
);
514 bool restore_vblank
= false;
518 * If there isn't any border, add some.
519 * Yes, this will flicker
521 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
522 uint32_t vsync
= I915_READ(vsync_reg
);
523 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
525 vblank_start
= vsync_start
;
526 I915_WRITE(vblank_reg
,
528 ((vblank_end
- 1) << 16));
529 restore_vblank
= true;
531 /* sample in the vertical border, selecting the larger one */
532 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
533 vsample
= (vblank_start
+ vactive
) >> 1;
535 vsample
= (vtotal
+ vblank_end
) >> 1;
538 * Wait for the border to be displayed
540 while (I915_READ(pipe_dsl_reg
) >= vactive
)
542 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
545 * Watch ST00 for an entire scanline
551 /* Read the ST00 VGA status register */
552 st00
= I915_READ8(VGA_MSR_WRITE
);
555 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
557 /* restore vblank if necessary */
559 I915_WRITE(vblank_reg
, vblank
);
561 * If more than 3/4 of the scanline detected a monitor,
562 * then it is assumed to be present. This works even on i830,
563 * where there isn't any way to force the border color across
566 status
= detect
* 4 > count
* 3 ?
567 connector_status_connected
:
568 connector_status_disconnected
;
571 /* Restore previous settings */
572 I915_WRITE(bclrpat_reg
, save_bclrpat
);
577 static enum drm_connector_status
578 intel_crt_detect(struct drm_connector
*connector
, bool force
)
580 struct drm_device
*dev
= connector
->dev
;
581 struct intel_crt
*crt
= intel_attached_crt(connector
);
582 enum drm_connector_status status
;
583 struct intel_load_detect_pipe tmp
;
585 if (I915_HAS_HOTPLUG(dev
)) {
586 /* We can not rely on the HPD pin always being correctly wired
587 * up, for example many KVM do not pass it through, and so
588 * only trust an assertion that the monitor is connected.
590 if (intel_crt_detect_hotplug(connector
)) {
591 DRM_DEBUG_KMS("CRT detected via hotplug\n");
592 return connector_status_connected
;
594 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
597 if (intel_crt_detect_ddc(connector
))
598 return connector_status_connected
;
600 /* Load detection is broken on HPD capable machines. Whoever wants a
601 * broken monitor (without edid) to work behind a broken kvm (that fails
602 * to have the right resistors for HP detection) needs to fix this up.
603 * For now just bail out. */
604 if (I915_HAS_HOTPLUG(dev
))
605 return connector_status_disconnected
;
608 return connector
->status
;
610 /* for pre-945g platforms use load detect */
611 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
)) {
612 if (intel_crt_detect_ddc(connector
))
613 status
= connector_status_connected
;
615 status
= intel_crt_load_detect(crt
);
616 intel_release_load_detect_pipe(connector
, &tmp
);
618 status
= connector_status_unknown
;
623 static void intel_crt_destroy(struct drm_connector
*connector
)
625 drm_sysfs_connector_remove(connector
);
626 drm_connector_cleanup(connector
);
630 static int intel_crt_get_modes(struct drm_connector
*connector
)
632 struct drm_device
*dev
= connector
->dev
;
633 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
635 struct i2c_adapter
*i2c
;
637 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->crt_ddc_pin
);
638 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
639 if (ret
|| !IS_G4X(dev
))
642 /* Try to probe digital port for output in DVI-I -> VGA mode. */
643 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
644 return intel_crt_ddc_get_modes(connector
, i2c
);
647 static int intel_crt_set_property(struct drm_connector
*connector
,
648 struct drm_property
*property
,
654 static void intel_crt_reset(struct drm_connector
*connector
)
656 struct drm_device
*dev
= connector
->dev
;
657 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
658 struct intel_crt
*crt
= intel_attached_crt(connector
);
660 if (HAS_PCH_SPLIT(dev
)) {
663 adpa
= I915_READ(PCH_ADPA
);
664 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
665 adpa
|= ADPA_HOTPLUG_BITS
;
666 I915_WRITE(PCH_ADPA
, adpa
);
667 POSTING_READ(PCH_ADPA
);
669 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
670 crt
->force_hotplug_required
= 1;
676 * Routines for controlling stuff on the analog port
679 static const struct drm_encoder_helper_funcs crt_encoder_funcs
= {
680 .mode_fixup
= intel_crt_mode_fixup
,
681 .mode_set
= intel_crt_mode_set
,
682 .disable
= intel_encoder_noop
,
685 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
686 .reset
= intel_crt_reset
,
687 .dpms
= intel_crt_dpms
,
688 .detect
= intel_crt_detect
,
689 .fill_modes
= drm_helper_probe_single_connector_modes
,
690 .destroy
= intel_crt_destroy
,
691 .set_property
= intel_crt_set_property
,
694 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
695 .mode_valid
= intel_crt_mode_valid
,
696 .get_modes
= intel_crt_get_modes
,
697 .best_encoder
= intel_best_encoder
,
700 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
701 .destroy
= intel_encoder_destroy
,
704 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
706 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
710 static const struct dmi_system_id intel_no_crt
[] = {
712 .callback
= intel_no_crt_dmi_callback
,
715 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
716 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
722 void intel_crt_init(struct drm_device
*dev
)
724 struct drm_connector
*connector
;
725 struct intel_crt
*crt
;
726 struct intel_connector
*intel_connector
;
727 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
729 /* Skip machines without VGA that falsely report hotplug events */
730 if (dmi_check_system(intel_no_crt
))
733 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
737 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
738 if (!intel_connector
) {
743 connector
= &intel_connector
->base
;
744 drm_connector_init(dev
, &intel_connector
->base
,
745 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
747 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
748 DRM_MODE_ENCODER_DAC
);
750 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
752 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
753 crt
->base
.cloneable
= true;
755 crt
->base
.crtc_mask
= (1 << 0);
757 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
760 connector
->interlace_allowed
= 0;
762 connector
->interlace_allowed
= 1;
763 connector
->doublescan_allowed
= 0;
765 if (HAS_PCH_SPLIT(dev
))
766 crt
->adpa_reg
= PCH_ADPA
;
767 else if (IS_VALLEYVIEW(dev
))
768 crt
->adpa_reg
= VLV_ADPA
;
770 crt
->adpa_reg
= ADPA
;
772 crt
->base
.disable
= intel_disable_crt
;
773 crt
->base
.enable
= intel_enable_crt
;
775 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
777 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
778 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
780 drm_encoder_helper_add(&crt
->base
.base
, &crt_encoder_funcs
);
781 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
783 drm_sysfs_connector_add(connector
);
785 if (I915_HAS_HOTPLUG(dev
))
786 connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
788 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
791 * Configure the automatic hotplug detection stuff
793 crt
->force_hotplug_required
= 0;
795 dev_priv
->hotplug_supported_mask
|= CRT_HOTPLUG_INT_STATUS
;