drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         bool force_hotplug_required;
  49         u32 adpa_reg;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_crt, base);
  61 }
  62
  63 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  64                                    enum pipe *pipe)
  65 {
  66         struct drm_device *dev = encoder->base.dev;
  67         struct drm_i915_private *dev_priv = dev->dev_private;
  68         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  69         u32 tmp;
  70
  71         tmp = I915_READ(crt->adpa_reg);
  72
  73         if (!(tmp & ADPA_DAC_ENABLE))
  74                 return false;
  75
  76         if (HAS_PCH_CPT(dev))
  77                 *pipe = PORT_TO_PIPE_CPT(tmp);
  78         else
  79                 *pipe = PORT_TO_PIPE(tmp);
  80
  81         return true;
  82 }
  83
  84 static void intel_disable_crt(struct intel_encoder *encoder)
  85 {
  86         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  87         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  88         u32 temp;
  89
  90         temp = I915_READ(crt->adpa_reg);
  91         temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  92         temp &= ~ADPA_DAC_ENABLE;
  93         I915_WRITE(crt->adpa_reg, temp);
  94 }
  95
  96 static void intel_enable_crt(struct intel_encoder *encoder)
  97 {
  98         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  99         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 100         u32 temp;
 101
 102         temp = I915_READ(crt->adpa_reg);
 103         temp |= ADPA_DAC_ENABLE;
 104         I915_WRITE(crt->adpa_reg, temp);
 105 }
 106
 107 /* Note: The caller is required to filter out dpms modes not supported by the
 108  * platform. */
 109 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 110 {
 111         struct drm_device *dev = encoder->base.dev;
 112         struct drm_i915_private *dev_priv = dev->dev_private;
 113         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 114         u32 temp;
 115
 116         temp = I915_READ(crt->adpa_reg);
 117         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
 118         temp &= ~ADPA_DAC_ENABLE;
 119
 120         switch (mode) {
 121         case DRM_MODE_DPMS_ON:
 122                 temp |= ADPA_DAC_ENABLE;
 123                 break;
 124         case DRM_MODE_DPMS_STANDBY:
 125                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 126                 break;
 127         case DRM_MODE_DPMS_SUSPEND:
 128                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 129                 break;
 130         case DRM_MODE_DPMS_OFF:
 131                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 132                 break;
 133         }
 134
 135         I915_WRITE(crt->adpa_reg, temp);
 136 }
 137
 138 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 139 {
 140         struct drm_device *dev = connector->dev;
 141         struct intel_encoder *encoder = intel_attached_encoder(connector);
 142         struct drm_crtc *crtc;
 143         int old_dpms;
 144
 145         /* PCH platforms and VLV only support on/off. */
 146         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 147                 mode = DRM_MODE_DPMS_OFF;
 148
 149         if (mode == connector->dpms)
 150                 return;
 151
 152         old_dpms = connector->dpms;
 153         connector->dpms = mode;
 154
 155         /* Only need to change hw state when actually enabled */
 156         crtc = encoder->base.crtc;
 157         if (!crtc) {
 158                 encoder->connectors_active = false;
 159                 return;
 160         }
 161
 162         /* We need the pipe to run for anything but OFF. */
 163         if (mode == DRM_MODE_DPMS_OFF)
 164                 encoder->connectors_active = false;
 165         else
 166                 encoder->connectors_active = true;
 167
 168         if (mode < old_dpms) {
 169                 /* From off to on, enable the pipe first. */
 170                 intel_crtc_update_dpms(crtc);
 171
 172                 intel_crt_set_dpms(encoder, mode);
 173         } else {
 174                 intel_crt_set_dpms(encoder, mode);
 175
 176                 intel_crtc_update_dpms(crtc);
 177         }
 178
 179         intel_modeset_check_state(connector->dev);
 180 }
 181
 182 static int intel_crt_mode_valid(struct drm_connector *connector,
 183                                 struct drm_display_mode *mode)
 184 {
 185         struct drm_device *dev = connector->dev;
 186
 187         int max_clock = 0;
 188         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 189                 return MODE_NO_DBLESCAN;
 190
 191         if (mode->clock < 25000)
 192                 return MODE_CLOCK_LOW;
 193
 194         if (IS_GEN2(dev))
 195                 max_clock = 350000;
 196         else
 197                 max_clock = 400000;
 198         if (mode->clock > max_clock)
 199                 return MODE_CLOCK_HIGH;
 200
 201         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 202         if (HAS_PCH_LPT(dev) &&
 203             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 204                 return MODE_CLOCK_HIGH;
 205
 206         return MODE_OK;
 207 }
 208
 209 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 210                                      struct intel_crtc_config *pipe_config)
 211 {
 212         struct drm_device *dev = encoder->base.dev;
 213
 214         if (HAS_PCH_SPLIT(dev))
 215                 pipe_config->has_pch_encoder = true;
 216
 217         return true;
 218 }
 219
 220 static void intel_crt_mode_set(struct drm_encoder *encoder,
 221                                struct drm_display_mode *mode,
 222                                struct drm_display_mode *adjusted_mode)
 223 {
 224
 225         struct drm_device *dev = encoder->dev;
 226         struct drm_crtc *crtc = encoder->crtc;
 227         struct intel_crt *crt =
 228                 intel_encoder_to_crt(to_intel_encoder(encoder));
 229         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 230         struct drm_i915_private *dev_priv = dev->dev_private;
 231         u32 adpa;
 232
 233         if (HAS_PCH_SPLIT(dev))
 234                 adpa = ADPA_HOTPLUG_BITS;
 235         else
 236                 adpa = 0;
 237
 238         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 239                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 240         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 241                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 242
 243         /* For CPT allow 3 pipe config, for others just use A or B */
 244         if (HAS_PCH_LPT(dev))
 245                 ; /* Those bits don't exist here */
 246         else if (HAS_PCH_CPT(dev))
 247                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 248         else if (intel_crtc->pipe == 0)
 249                 adpa |= ADPA_PIPE_A_SELECT;
 250         else
 251                 adpa |= ADPA_PIPE_B_SELECT;
 252
 253         if (!HAS_PCH_SPLIT(dev))
 254                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 255
 256         I915_WRITE(crt->adpa_reg, adpa);
 257 }
 258
 259 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 260 {
 261         struct drm_device *dev = connector->dev;
 262         struct intel_crt *crt = intel_attached_crt(connector);
 263         struct drm_i915_private *dev_priv = dev->dev_private;
 264         u32 adpa;
 265         bool ret;
 266
 267         /* The first time through, trigger an explicit detection cycle */
 268         if (crt->force_hotplug_required) {
 269                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 270                 u32 save_adpa;
 271
 272                 crt->force_hotplug_required = 0;
 273
 274                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 275                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 276
 277                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 278                 if (turn_off_dac)
 279                         adpa &= ~ADPA_DAC_ENABLE;
 280
 281                 I915_WRITE(crt->adpa_reg, adpa);
 282
 283                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 284                              1000))
 285                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 286
 287                 if (turn_off_dac) {
 288                         I915_WRITE(crt->adpa_reg, save_adpa);
 289                         POSTING_READ(crt->adpa_reg);
 290                 }
 291         }
 292
 293         /* Check the status to see if both blue and green are on now */
 294         adpa = I915_READ(crt->adpa_reg);
 295         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 296                 ret = true;
 297         else
 298                 ret = false;
 299         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 300
 301         return ret;
 302 }
 303
 304 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 305 {
 306         struct drm_device *dev = connector->dev;
 307         struct intel_crt *crt = intel_attached_crt(connector);
 308         struct drm_i915_private *dev_priv = dev->dev_private;
 309         u32 adpa;
 310         bool ret;
 311         u32 save_adpa;
 312
 313         save_adpa = adpa = I915_READ(crt->adpa_reg);
 314         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 315
 316         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 317
 318         I915_WRITE(crt->adpa_reg, adpa);
 319
 320         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 321                      1000)) {
 322                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 323                 I915_WRITE(crt->adpa_reg, save_adpa);
 324         }
 325
 326         /* Check the status to see if both blue and green are on now */
 327         adpa = I915_READ(crt->adpa_reg);
 328         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 329                 ret = true;
 330         else
 331                 ret = false;
 332
 333         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 334
 335         /* FIXME: debug force function and remove */
 336         ret = true;
 337
 338         return ret;
 339 }
 340
 341 /**
 342  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 343  *
 344  * Not for i915G/i915GM
 345  *
 346  * \return true if CRT is connected.
 347  * \return false if CRT is disconnected.
 348  */
 349 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 350 {
 351         struct drm_device *dev = connector->dev;
 352         struct drm_i915_private *dev_priv = dev->dev_private;
 353         u32 hotplug_en, orig, stat;
 354         bool ret = false;
 355         int i, tries = 0;
 356
 357         if (HAS_PCH_SPLIT(dev))
 358                 return intel_ironlake_crt_detect_hotplug(connector);
 359
 360         if (IS_VALLEYVIEW(dev))
 361                 return valleyview_crt_detect_hotplug(connector);
 362
 363         /*
 364          * On 4 series desktop, CRT detect sequence need to be done twice
 365          * to get a reliable result.
 366          */
 367
 368         if (IS_G4X(dev) && !IS_GM45(dev))
 369                 tries = 2;
 370         else
 371                 tries = 1;
 372         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 373         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 374
 375         for (i = 0; i < tries ; i++) {
 376                 /* turn on the FORCE_DETECT */
 377                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 378                 /* wait for FORCE_DETECT to go off */
 379                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 380                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 381                              1000))
 382                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 383         }
 384
 385         stat = I915_READ(PORT_HOTPLUG_STAT);
 386         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 387                 ret = true;
 388
 389         /* clear the interrupt we just generated, if any */
 390         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 391
 392         /* and put the bits back */
 393         I915_WRITE(PORT_HOTPLUG_EN, orig);
 394
 395         return ret;
 396 }
 397
 398 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 399                                 struct i2c_adapter *i2c)
 400 {
 401         struct edid *edid;
 402
 403         edid = drm_get_edid(connector, i2c);
 404
 405         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 406                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 407                 intel_gmbus_force_bit(i2c, true);
 408                 edid = drm_get_edid(connector, i2c);
 409                 intel_gmbus_force_bit(i2c, false);
 410         }
 411
 412         return edid;
 413 }
 414
 415 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 416 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 417                                 struct i2c_adapter *adapter)
 418 {
 419         struct edid *edid;
 420         int ret;
 421
 422         edid = intel_crt_get_edid(connector, adapter);
 423         if (!edid)
 424                 return 0;
 425
 426         ret = intel_connector_update_modes(connector, edid);
 427         kfree(edid);
 428
 429         return ret;
 430 }
 431
 432 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 433 {
 434         struct intel_crt *crt = intel_attached_crt(connector);
 435         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 436         struct edid *edid;
 437         struct i2c_adapter *i2c;
 438
 439         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 440
 441         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 442         edid = intel_crt_get_edid(connector, i2c);
 443
 444         if (edid) {
 445                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 446
 447                 /*
 448                  * This may be a DVI-I connector with a shared DDC
 449                  * link between analog and digital outputs, so we
 450                  * have to check the EDID input spec of the attached device.
 451                  */
 452                 if (!is_digital) {
 453                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 454                         return true;
 455                 }
 456
 457                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 458         } else {
 459                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 460         }
 461
 462         kfree(edid);
 463
 464         return false;
 465 }
 466
 467 static enum drm_connector_status
 468 intel_crt_load_detect(struct intel_crt *crt)
 469 {
 470         struct drm_device *dev = crt->base.base.dev;
 471         struct drm_i915_private *dev_priv = dev->dev_private;
 472         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 473         uint32_t save_bclrpat;
 474         uint32_t save_vtotal;
 475         uint32_t vtotal, vactive;
 476         uint32_t vsample;
 477         uint32_t vblank, vblank_start, vblank_end;
 478         uint32_t dsl;
 479         uint32_t bclrpat_reg;
 480         uint32_t vtotal_reg;
 481         uint32_t vblank_reg;
 482         uint32_t vsync_reg;
 483         uint32_t pipeconf_reg;
 484         uint32_t pipe_dsl_reg;
 485         uint8_t st00;
 486         enum drm_connector_status status;
 487
 488         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 489
 490         bclrpat_reg = BCLRPAT(pipe);
 491         vtotal_reg = VTOTAL(pipe);
 492         vblank_reg = VBLANK(pipe);
 493         vsync_reg = VSYNC(pipe);
 494         pipeconf_reg = PIPECONF(pipe);
 495         pipe_dsl_reg = PIPEDSL(pipe);
 496
 497         save_bclrpat = I915_READ(bclrpat_reg);
 498         save_vtotal = I915_READ(vtotal_reg);
 499         vblank = I915_READ(vblank_reg);
 500
 501         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 502         vactive = (save_vtotal & 0x7ff) + 1;
 503
 504         vblank_start = (vblank & 0xfff) + 1;
 505         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 506
 507         /* Set the border color to purple. */
 508         I915_WRITE(bclrpat_reg, 0x500050);
 509
 510         if (!IS_GEN2(dev)) {
 511                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 512                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 513                 POSTING_READ(pipeconf_reg);
 514                 /* Wait for next Vblank to substitue
 515                  * border color for Color info */
 516                 intel_wait_for_vblank(dev, pipe);
 517                 st00 = I915_READ8(VGA_MSR_WRITE);
 518                 status = ((st00 & (1 << 4)) != 0) ?
 519                         connector_status_connected :
 520                         connector_status_disconnected;
 521
 522                 I915_WRITE(pipeconf_reg, pipeconf);
 523         } else {
 524                 bool restore_vblank = false;
 525                 int count, detect;
 526
 527                 /*
 528                 * If there isn't any border, add some.
 529                 * Yes, this will flicker
 530                 */
 531                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 532                         uint32_t vsync = I915_READ(vsync_reg);
 533                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 534
 535                         vblank_start = vsync_start;
 536                         I915_WRITE(vblank_reg,
 537                                    (vblank_start - 1) |
 538                                    ((vblank_end - 1) << 16));
 539                         restore_vblank = true;
 540                 }
 541                 /* sample in the vertical border, selecting the larger one */
 542                 if (vblank_start - vactive >= vtotal - vblank_end)
 543                         vsample = (vblank_start + vactive) >> 1;
 544                 else
 545                         vsample = (vtotal + vblank_end) >> 1;
 546
 547                 /*
 548                  * Wait for the border to be displayed
 549                  */
 550                 while (I915_READ(pipe_dsl_reg) >= vactive)
 551                         ;
 552                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 553                         ;
 554                 /*
 555                  * Watch ST00 for an entire scanline
 556                  */
 557                 detect = 0;
 558                 count = 0;
 559                 do {
 560                         count++;
 561                         /* Read the ST00 VGA status register */
 562                         st00 = I915_READ8(VGA_MSR_WRITE);
 563                         if (st00 & (1 << 4))
 564                                 detect++;
 565                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 566
 567                 /* restore vblank if necessary */
 568                 if (restore_vblank)
 569                         I915_WRITE(vblank_reg, vblank);
 570                 /*
 571                  * If more than 3/4 of the scanline detected a monitor,
 572                  * then it is assumed to be present. This works even on i830,
 573                  * where there isn't any way to force the border color across
 574                  * the screen
 575                  */
 576                 status = detect * 4 > count * 3 ?
 577                          connector_status_connected :
 578                          connector_status_disconnected;
 579         }
 580
 581         /* Restore previous settings */
 582         I915_WRITE(bclrpat_reg, save_bclrpat);
 583
 584         return status;
 585 }
 586
 587 static enum drm_connector_status
 588 intel_crt_detect(struct drm_connector *connector, bool force)
 589 {
 590         struct drm_device *dev = connector->dev;
 591         struct intel_crt *crt = intel_attached_crt(connector);
 592         enum drm_connector_status status;
 593         struct intel_load_detect_pipe tmp;
 594
 595         if (I915_HAS_HOTPLUG(dev)) {
 596                 /* We can not rely on the HPD pin always being correctly wired
 597                  * up, for example many KVM do not pass it through, and so
 598                  * only trust an assertion that the monitor is connected.
 599                  */
 600                 if (intel_crt_detect_hotplug(connector)) {
 601                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 602                         return connector_status_connected;
 603                 } else
 604                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 605         }
 606
 607         if (intel_crt_detect_ddc(connector))
 608                 return connector_status_connected;
 609
 610         /* Load detection is broken on HPD capable machines. Whoever wants a
 611          * broken monitor (without edid) to work behind a broken kvm (that fails
 612          * to have the right resistors for HP detection) needs to fix this up.
 613          * For now just bail out. */
 614         if (I915_HAS_HOTPLUG(dev))
 615                 return connector_status_disconnected;
 616
 617         if (!force)
 618                 return connector->status;
 619
 620         /* for pre-945g platforms use load detect */
 621         if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
 622                 if (intel_crt_detect_ddc(connector))
 623                         status = connector_status_connected;
 624                 else
 625                         status = intel_crt_load_detect(crt);
 626                 intel_release_load_detect_pipe(connector, &tmp);
 627         } else
 628                 status = connector_status_unknown;
 629
 630         return status;
 631 }
 632
 633 static void intel_crt_destroy(struct drm_connector *connector)
 634 {
 635         drm_sysfs_connector_remove(connector);
 636         drm_connector_cleanup(connector);
 637         kfree(connector);
 638 }
 639
 640 static int intel_crt_get_modes(struct drm_connector *connector)
 641 {
 642         struct drm_device *dev = connector->dev;
 643         struct drm_i915_private *dev_priv = dev->dev_private;
 644         int ret;
 645         struct i2c_adapter *i2c;
 646
 647         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
 648         ret = intel_crt_ddc_get_modes(connector, i2c);
 649         if (ret || !IS_G4X(dev))
 650                 return ret;
 651
 652         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 653         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 654         return intel_crt_ddc_get_modes(connector, i2c);
 655 }
 656
 657 static int intel_crt_set_property(struct drm_connector *connector,
 658                                   struct drm_property *property,
 659                                   uint64_t value)
 660 {
 661         return 0;
 662 }
 663
 664 static void intel_crt_reset(struct drm_connector *connector)
 665 {
 666         struct drm_device *dev = connector->dev;
 667         struct drm_i915_private *dev_priv = dev->dev_private;
 668         struct intel_crt *crt = intel_attached_crt(connector);
 669
 670         if (HAS_PCH_SPLIT(dev)) {
 671                 u32 adpa;
 672
 673                 adpa = I915_READ(crt->adpa_reg);
 674                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 675                 adpa |= ADPA_HOTPLUG_BITS;
 676                 I915_WRITE(crt->adpa_reg, adpa);
 677                 POSTING_READ(crt->adpa_reg);
 678
 679                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 680                 crt->force_hotplug_required = 1;
 681         }
 682
 683 }
 684
 685 /*
 686  * Routines for controlling stuff on the analog port
 687  */
 688
 689 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
 690         .mode_set = intel_crt_mode_set,
 691 };
 692
 693 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 694         .reset = intel_crt_reset,
 695         .dpms = intel_crt_dpms,
 696         .detect = intel_crt_detect,
 697         .fill_modes = drm_helper_probe_single_connector_modes,
 698         .destroy = intel_crt_destroy,
 699         .set_property = intel_crt_set_property,
 700 };
 701
 702 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 703         .mode_valid = intel_crt_mode_valid,
 704         .get_modes = intel_crt_get_modes,
 705         .best_encoder = intel_best_encoder,
 706 };
 707
 708 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 709         .destroy = intel_encoder_destroy,
 710 };
 711
 712 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 713 {
 714         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 715         return 1;
 716 }
 717
 718 static const struct dmi_system_id intel_no_crt[] = {
 719         {
 720                 .callback = intel_no_crt_dmi_callback,
 721                 .ident = "ACER ZGB",
 722                 .matches = {
 723                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 724                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 725                 },
 726         },
 727         { }
 728 };
 729
 730 void intel_crt_init(struct drm_device *dev)
 731 {
 732         struct drm_connector *connector;
 733         struct intel_crt *crt;
 734         struct intel_connector *intel_connector;
 735         struct drm_i915_private *dev_priv = dev->dev_private;
 736
 737         /* Skip machines without VGA that falsely report hotplug events */
 738         if (dmi_check_system(intel_no_crt))
 739                 return;
 740
 741         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 742         if (!crt)
 743                 return;
 744
 745         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 746         if (!intel_connector) {
 747                 kfree(crt);
 748                 return;
 749         }
 750
 751         connector = &intel_connector->base;
 752         drm_connector_init(dev, &intel_connector->base,
 753                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 754
 755         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 756                          DRM_MODE_ENCODER_DAC);
 757
 758         intel_connector_attach_encoder(intel_connector, &crt->base);
 759
 760         crt->base.type = INTEL_OUTPUT_ANALOG;
 761         crt->base.cloneable = true;
 762         if (IS_I830(dev))
 763                 crt->base.crtc_mask = (1 << 0);
 764         else
 765                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 766
 767         if (IS_GEN2(dev))
 768                 connector->interlace_allowed = 0;
 769         else
 770                 connector->interlace_allowed = 1;
 771         connector->doublescan_allowed = 0;
 772
 773         if (HAS_PCH_SPLIT(dev))
 774                 crt->adpa_reg = PCH_ADPA;
 775         else if (IS_VALLEYVIEW(dev))
 776                 crt->adpa_reg = VLV_ADPA;
 777         else
 778                 crt->adpa_reg = ADPA;
 779
 780         crt->base.compute_config = intel_crt_compute_config;
 781         crt->base.disable = intel_disable_crt;
 782         crt->base.enable = intel_enable_crt;
 783         if (I915_HAS_HOTPLUG(dev))
 784                 crt->base.hpd_pin = HPD_CRT;
 785         if (HAS_DDI(dev))
 786                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 787         else
 788                 crt->base.get_hw_state = intel_crt_get_hw_state;
 789         intel_connector->get_hw_state = intel_connector_get_hw_state;
 790
 791         drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
 792         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 793
 794         drm_sysfs_connector_add(connector);
 795
 796         if (!I915_HAS_HOTPLUG(dev))
 797                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 798
 799         /*
 800          * Configure the automatic hotplug detection stuff
 801          */
 802         crt->force_hotplug_required = 0;
 803
 804         /*
 805          * TODO: find a proper way to discover whether we need to set the the
 806          * polarity and link reversal bits or not, instead of relying on the
 807          * BIOS.
 808          */
 809         if (HAS_PCH_LPT(dev)) {
 810                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 811                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 812
 813                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 814         }
 815 }