drm/i915: Subclass intel_encoder.
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_crt.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include "drmP.h"
30 #include "drm.h"
31 #include "drm_crtc.h"
32 #include "drm_crtc_helper.h"
33 #include "intel_drv.h"
34 #include "i915_drm.h"
35 #include "i915_drv.h"
36
37 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
38 {
39 struct drm_device *dev = encoder->dev;
40 struct drm_i915_private *dev_priv = dev->dev_private;
41 u32 temp, reg;
42
43 if (HAS_PCH_SPLIT(dev))
44 reg = PCH_ADPA;
45 else
46 reg = ADPA;
47
48 temp = I915_READ(reg);
49 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
50 temp &= ~ADPA_DAC_ENABLE;
51
52 switch(mode) {
53 case DRM_MODE_DPMS_ON:
54 temp |= ADPA_DAC_ENABLE;
55 break;
56 case DRM_MODE_DPMS_STANDBY:
57 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
58 break;
59 case DRM_MODE_DPMS_SUSPEND:
60 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
61 break;
62 case DRM_MODE_DPMS_OFF:
63 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
64 break;
65 }
66
67 I915_WRITE(reg, temp);
68 }
69
70 static int intel_crt_mode_valid(struct drm_connector *connector,
71 struct drm_display_mode *mode)
72 {
73 struct drm_device *dev = connector->dev;
74
75 int max_clock = 0;
76 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
77 return MODE_NO_DBLESCAN;
78
79 if (mode->clock < 25000)
80 return MODE_CLOCK_LOW;
81
82 if (!IS_I9XX(dev))
83 max_clock = 350000;
84 else
85 max_clock = 400000;
86 if (mode->clock > max_clock)
87 return MODE_CLOCK_HIGH;
88
89 return MODE_OK;
90 }
91
92 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
93 struct drm_display_mode *mode,
94 struct drm_display_mode *adjusted_mode)
95 {
96 return true;
97 }
98
99 static void intel_crt_mode_set(struct drm_encoder *encoder,
100 struct drm_display_mode *mode,
101 struct drm_display_mode *adjusted_mode)
102 {
103
104 struct drm_device *dev = encoder->dev;
105 struct drm_crtc *crtc = encoder->crtc;
106 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
107 struct drm_i915_private *dev_priv = dev->dev_private;
108 int dpll_md_reg;
109 u32 adpa, dpll_md;
110 u32 adpa_reg;
111
112 if (intel_crtc->pipe == 0)
113 dpll_md_reg = DPLL_A_MD;
114 else
115 dpll_md_reg = DPLL_B_MD;
116
117 if (HAS_PCH_SPLIT(dev))
118 adpa_reg = PCH_ADPA;
119 else
120 adpa_reg = ADPA;
121
122 /*
123 * Disable separate mode multiplier used when cloning SDVO to CRT
124 * XXX this needs to be adjusted when we really are cloning
125 */
126 if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
127 dpll_md = I915_READ(dpll_md_reg);
128 I915_WRITE(dpll_md_reg,
129 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
130 }
131
132 adpa = 0;
133 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
134 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
135 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
136 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
137
138 if (intel_crtc->pipe == 0) {
139 if (HAS_PCH_CPT(dev))
140 adpa |= PORT_TRANS_A_SEL_CPT;
141 else
142 adpa |= ADPA_PIPE_A_SELECT;
143 if (!HAS_PCH_SPLIT(dev))
144 I915_WRITE(BCLRPAT_A, 0);
145 } else {
146 if (HAS_PCH_CPT(dev))
147 adpa |= PORT_TRANS_B_SEL_CPT;
148 else
149 adpa |= ADPA_PIPE_B_SELECT;
150 if (!HAS_PCH_SPLIT(dev))
151 I915_WRITE(BCLRPAT_B, 0);
152 }
153
154 I915_WRITE(adpa_reg, adpa);
155 }
156
157 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
158 {
159 struct drm_device *dev = connector->dev;
160 struct drm_i915_private *dev_priv = dev->dev_private;
161 u32 adpa, temp;
162 bool ret;
163
164 temp = adpa = I915_READ(PCH_ADPA);
165
166 if (HAS_PCH_CPT(dev)) {
167 /* Disable DAC before force detect */
168 I915_WRITE(PCH_ADPA, adpa & ~ADPA_DAC_ENABLE);
169 (void)I915_READ(PCH_ADPA);
170 } else {
171 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
172 /* disable HPD first */
173 I915_WRITE(PCH_ADPA, adpa);
174 (void)I915_READ(PCH_ADPA);
175 }
176
177 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
178 ADPA_CRT_HOTPLUG_WARMUP_10MS |
179 ADPA_CRT_HOTPLUG_SAMPLE_4S |
180 ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
181 ADPA_CRT_HOTPLUG_VOLREF_325MV |
182 ADPA_CRT_HOTPLUG_ENABLE |
183 ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
184
185 DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
186 I915_WRITE(PCH_ADPA, adpa);
187
188 while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
189 ;
190
191 if (HAS_PCH_CPT(dev)) {
192 I915_WRITE(PCH_ADPA, temp);
193 (void)I915_READ(PCH_ADPA);
194 }
195
196 /* Check the status to see if both blue and green are on now */
197 adpa = I915_READ(PCH_ADPA);
198 adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
199 if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
200 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
201 ret = true;
202 else
203 ret = false;
204
205 return ret;
206 }
207
208 /**
209 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
210 *
211 * Not for i915G/i915GM
212 *
213 * \return true if CRT is connected.
214 * \return false if CRT is disconnected.
215 */
216 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
217 {
218 struct drm_device *dev = connector->dev;
219 struct drm_i915_private *dev_priv = dev->dev_private;
220 u32 hotplug_en, orig, stat;
221 bool ret = false;
222 int i, tries = 0;
223
224 if (HAS_PCH_SPLIT(dev))
225 return intel_ironlake_crt_detect_hotplug(connector);
226
227 /*
228 * On 4 series desktop, CRT detect sequence need to be done twice
229 * to get a reliable result.
230 */
231
232 if (IS_G4X(dev) && !IS_GM45(dev))
233 tries = 2;
234 else
235 tries = 1;
236 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
237 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
238
239 for (i = 0; i < tries ; i++) {
240 unsigned long timeout;
241 /* turn on the FORCE_DETECT */
242 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
243 timeout = jiffies + msecs_to_jiffies(1000);
244 /* wait for FORCE_DETECT to go off */
245 do {
246 if (!(I915_READ(PORT_HOTPLUG_EN) &
247 CRT_HOTPLUG_FORCE_DETECT))
248 break;
249 msleep(1);
250 } while (time_after(timeout, jiffies));
251 }
252
253 stat = I915_READ(PORT_HOTPLUG_STAT);
254 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
255 ret = true;
256
257 /* clear the interrupt we just generated, if any */
258 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
259
260 /* and put the bits back */
261 I915_WRITE(PORT_HOTPLUG_EN, orig);
262
263 return ret;
264 }
265
266 static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
267 {
268 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
269
270 /* CRT should always be at 0, but check anyway */
271 if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
272 return false;
273
274 return intel_ddc_probe(intel_encoder);
275 }
276
277 static enum drm_connector_status
278 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
279 {
280 struct drm_encoder *encoder = &intel_encoder->enc;
281 struct drm_device *dev = encoder->dev;
282 struct drm_i915_private *dev_priv = dev->dev_private;
283 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
284 uint32_t pipe = intel_crtc->pipe;
285 uint32_t save_bclrpat;
286 uint32_t save_vtotal;
287 uint32_t vtotal, vactive;
288 uint32_t vsample;
289 uint32_t vblank, vblank_start, vblank_end;
290 uint32_t dsl;
291 uint32_t bclrpat_reg;
292 uint32_t vtotal_reg;
293 uint32_t vblank_reg;
294 uint32_t vsync_reg;
295 uint32_t pipeconf_reg;
296 uint32_t pipe_dsl_reg;
297 uint8_t st00;
298 enum drm_connector_status status;
299
300 if (pipe == 0) {
301 bclrpat_reg = BCLRPAT_A;
302 vtotal_reg = VTOTAL_A;
303 vblank_reg = VBLANK_A;
304 vsync_reg = VSYNC_A;
305 pipeconf_reg = PIPEACONF;
306 pipe_dsl_reg = PIPEADSL;
307 } else {
308 bclrpat_reg = BCLRPAT_B;
309 vtotal_reg = VTOTAL_B;
310 vblank_reg = VBLANK_B;
311 vsync_reg = VSYNC_B;
312 pipeconf_reg = PIPEBCONF;
313 pipe_dsl_reg = PIPEBDSL;
314 }
315
316 save_bclrpat = I915_READ(bclrpat_reg);
317 save_vtotal = I915_READ(vtotal_reg);
318 vblank = I915_READ(vblank_reg);
319
320 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
321 vactive = (save_vtotal & 0x7ff) + 1;
322
323 vblank_start = (vblank & 0xfff) + 1;
324 vblank_end = ((vblank >> 16) & 0xfff) + 1;
325
326 /* Set the border color to purple. */
327 I915_WRITE(bclrpat_reg, 0x500050);
328
329 if (IS_I9XX(dev)) {
330 uint32_t pipeconf = I915_READ(pipeconf_reg);
331 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
332 /* Wait for next Vblank to substitue
333 * border color for Color info */
334 intel_wait_for_vblank(dev);
335 st00 = I915_READ8(VGA_MSR_WRITE);
336 status = ((st00 & (1 << 4)) != 0) ?
337 connector_status_connected :
338 connector_status_disconnected;
339
340 I915_WRITE(pipeconf_reg, pipeconf);
341 } else {
342 bool restore_vblank = false;
343 int count, detect;
344
345 /*
346 * If there isn't any border, add some.
347 * Yes, this will flicker
348 */
349 if (vblank_start <= vactive && vblank_end >= vtotal) {
350 uint32_t vsync = I915_READ(vsync_reg);
351 uint32_t vsync_start = (vsync & 0xffff) + 1;
352
353 vblank_start = vsync_start;
354 I915_WRITE(vblank_reg,
355 (vblank_start - 1) |
356 ((vblank_end - 1) << 16));
357 restore_vblank = true;
358 }
359 /* sample in the vertical border, selecting the larger one */
360 if (vblank_start - vactive >= vtotal - vblank_end)
361 vsample = (vblank_start + vactive) >> 1;
362 else
363 vsample = (vtotal + vblank_end) >> 1;
364
365 /*
366 * Wait for the border to be displayed
367 */
368 while (I915_READ(pipe_dsl_reg) >= vactive)
369 ;
370 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
371 ;
372 /*
373 * Watch ST00 for an entire scanline
374 */
375 detect = 0;
376 count = 0;
377 do {
378 count++;
379 /* Read the ST00 VGA status register */
380 st00 = I915_READ8(VGA_MSR_WRITE);
381 if (st00 & (1 << 4))
382 detect++;
383 } while ((I915_READ(pipe_dsl_reg) == dsl));
384
385 /* restore vblank if necessary */
386 if (restore_vblank)
387 I915_WRITE(vblank_reg, vblank);
388 /*
389 * If more than 3/4 of the scanline detected a monitor,
390 * then it is assumed to be present. This works even on i830,
391 * where there isn't any way to force the border color across
392 * the screen
393 */
394 status = detect * 4 > count * 3 ?
395 connector_status_connected :
396 connector_status_disconnected;
397 }
398
399 /* Restore previous settings */
400 I915_WRITE(bclrpat_reg, save_bclrpat);
401
402 return status;
403 }
404
405 static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
406 {
407 struct drm_device *dev = connector->dev;
408 struct drm_encoder *encoder = intel_attached_encoder(connector);
409 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
410 struct drm_crtc *crtc;
411 int dpms_mode;
412 enum drm_connector_status status;
413
414 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
415 if (intel_crt_detect_hotplug(connector))
416 return connector_status_connected;
417 else
418 return connector_status_disconnected;
419 }
420
421 if (intel_crt_detect_ddc(encoder))
422 return connector_status_connected;
423
424 /* for pre-945g platforms use load detect */
425 if (encoder->crtc && encoder->crtc->enabled) {
426 status = intel_crt_load_detect(encoder->crtc, intel_encoder);
427 } else {
428 crtc = intel_get_load_detect_pipe(intel_encoder, connector,
429 NULL, &dpms_mode);
430 if (crtc) {
431 status = intel_crt_load_detect(crtc, intel_encoder);
432 intel_release_load_detect_pipe(intel_encoder,
433 connector, dpms_mode);
434 } else
435 status = connector_status_unknown;
436 }
437
438 return status;
439 }
440
441 static void intel_crt_destroy(struct drm_connector *connector)
442 {
443 drm_sysfs_connector_remove(connector);
444 drm_connector_cleanup(connector);
445 kfree(connector);
446 }
447
448 static int intel_crt_get_modes(struct drm_connector *connector)
449 {
450 int ret;
451 struct drm_encoder *encoder = intel_attached_encoder(connector);
452 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
453 struct i2c_adapter *ddc_bus;
454 struct drm_device *dev = connector->dev;
455
456
457 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
458 if (ret || !IS_G4X(dev))
459 goto end;
460
461 /* Try to probe digital port for output in DVI-I -> VGA mode. */
462 ddc_bus = intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
463
464 if (!ddc_bus) {
465 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
466 "DDC bus registration failed for CRTDDC_D.\n");
467 goto end;
468 }
469 /* Try to get modes by GPIOD port */
470 ret = intel_ddc_get_modes(connector, ddc_bus);
471 intel_i2c_destroy(ddc_bus);
472
473 end:
474 return ret;
475
476 }
477
478 static int intel_crt_set_property(struct drm_connector *connector,
479 struct drm_property *property,
480 uint64_t value)
481 {
482 return 0;
483 }
484
485 /*
486 * Routines for controlling stuff on the analog port
487 */
488
489 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
490 .dpms = intel_crt_dpms,
491 .mode_fixup = intel_crt_mode_fixup,
492 .prepare = intel_encoder_prepare,
493 .commit = intel_encoder_commit,
494 .mode_set = intel_crt_mode_set,
495 };
496
497 static const struct drm_connector_funcs intel_crt_connector_funcs = {
498 .dpms = drm_helper_connector_dpms,
499 .detect = intel_crt_detect,
500 .fill_modes = drm_helper_probe_single_connector_modes,
501 .destroy = intel_crt_destroy,
502 .set_property = intel_crt_set_property,
503 };
504
505 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
506 .mode_valid = intel_crt_mode_valid,
507 .get_modes = intel_crt_get_modes,
508 .best_encoder = intel_attached_encoder,
509 };
510
511 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
512 .destroy = intel_encoder_destroy,
513 };
514
515 void intel_crt_init(struct drm_device *dev)
516 {
517 struct drm_connector *connector;
518 struct intel_encoder *intel_encoder;
519 struct intel_connector *intel_connector;
520 struct drm_i915_private *dev_priv = dev->dev_private;
521 u32 i2c_reg;
522
523 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
524 if (!intel_encoder)
525 return;
526
527 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
528 if (!intel_connector) {
529 kfree(intel_encoder);
530 return;
531 }
532
533 connector = &intel_connector->base;
534 drm_connector_init(dev, &intel_connector->base,
535 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
536
537 drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs,
538 DRM_MODE_ENCODER_DAC);
539
540 drm_mode_connector_attach_encoder(&intel_connector->base,
541 &intel_encoder->enc);
542
543 /* Set up the DDC bus. */
544 if (HAS_PCH_SPLIT(dev))
545 i2c_reg = PCH_GPIOA;
546 else {
547 i2c_reg = GPIOA;
548 /* Use VBT information for CRT DDC if available */
549 if (dev_priv->crt_ddc_bus != 0)
550 i2c_reg = dev_priv->crt_ddc_bus;
551 }
552 intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
553 if (!intel_encoder->ddc_bus) {
554 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
555 "failed.\n");
556 return;
557 }
558
559 intel_encoder->type = INTEL_OUTPUT_ANALOG;
560 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
561 (1 << INTEL_ANALOG_CLONE_BIT) |
562 (1 << INTEL_SDVO_LVDS_CLONE_BIT);
563 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
564 connector->interlace_allowed = 1;
565 connector->doublescan_allowed = 0;
566
567 drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
568 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
569
570 drm_sysfs_connector_add(connector);
571
572 if (I915_HAS_HOTPLUG(dev))
573 connector->polled = DRM_CONNECTOR_POLL_HPD;
574 else
575 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
576
577 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
578 }
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