drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_edid.h>
  34 #include "intel_drv.h"
  35 #include <drm/i915_drm.h>
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         /* DPMS state is stored in the connector, which we need in the
  49          * encoder's enable/disable callbacks */
  50         struct intel_connector *connector;
  51         bool force_hotplug_required;
  52         u32 adpa_reg;
  53 };
  54
  55 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  56 {
  57         return container_of(encoder, struct intel_crt, base);
  58 }
  59
  60 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  61 {
  62         return intel_encoder_to_crt(intel_attached_encoder(connector));
  63 }
  64
  65 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  66                                    enum pipe *pipe)
  67 {
  68         struct drm_device *dev = encoder->base.dev;
  69         struct drm_i915_private *dev_priv = dev->dev_private;
  70         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  71         enum intel_display_power_domain power_domain;
  72         u32 tmp;
  73
  74         power_domain = intel_display_port_power_domain(encoder);
  75         if (!intel_display_power_enabled(dev_priv, power_domain))
  76                 return false;
  77
  78         tmp = I915_READ(crt->adpa_reg);
  79
  80         if (!(tmp & ADPA_DAC_ENABLE))
  81                 return false;
  82
  83         if (HAS_PCH_CPT(dev))
  84                 *pipe = PORT_TO_PIPE_CPT(tmp);
  85         else
  86                 *pipe = PORT_TO_PIPE(tmp);
  87
  88         return true;
  89 }
  90
  91 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  92 {
  93         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  94         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  95         u32 tmp, flags = 0;
  96
  97         tmp = I915_READ(crt->adpa_reg);
  98
  99         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
 100                 flags |= DRM_MODE_FLAG_PHSYNC;
 101         else
 102                 flags |= DRM_MODE_FLAG_NHSYNC;
 103
 104         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 105                 flags |= DRM_MODE_FLAG_PVSYNC;
 106         else
 107                 flags |= DRM_MODE_FLAG_NVSYNC;
 108
 109         return flags;
 110 }
 111
 112 static void intel_crt_get_config(struct intel_encoder *encoder,
 113                                  struct intel_crtc_config *pipe_config)
 114 {
 115         struct drm_device *dev = encoder->base.dev;
 116         int dotclock;
 117
 118         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 119
 120         dotclock = pipe_config->port_clock;
 121
 122         if (HAS_PCH_SPLIT(dev))
 123                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 124
 125         pipe_config->adjusted_mode.crtc_clock = dotclock;
 126 }
 127
 128 static void hsw_crt_get_config(struct intel_encoder *encoder,
 129                                struct intel_crtc_config *pipe_config)
 130 {
 131         intel_ddi_get_config(encoder, pipe_config);
 132
 133         pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 134                                               DRM_MODE_FLAG_NHSYNC |
 135                                               DRM_MODE_FLAG_PVSYNC |
 136                                               DRM_MODE_FLAG_NVSYNC);
 137         pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
 138 }
 139
 140 static void hsw_crt_pre_enable(struct intel_encoder *encoder)
 141 {
 142         struct drm_device *dev = encoder->base.dev;
 143         struct drm_i915_private *dev_priv = dev->dev_private;
 144
 145         WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL already enabled\n");
 146         I915_WRITE(SPLL_CTL,
 147                    SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC);
 148         POSTING_READ(SPLL_CTL);
 149         udelay(20);
 150 }
 151
 152 /* Note: The caller is required to filter out dpms modes not supported by the
 153  * platform. */
 154 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 155 {
 156         struct drm_device *dev = encoder->base.dev;
 157         struct drm_i915_private *dev_priv = dev->dev_private;
 158         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 159         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 160         struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
 161         u32 adpa;
 162
 163         if (INTEL_INFO(dev)->gen >= 5)
 164                 adpa = ADPA_HOTPLUG_BITS;
 165         else
 166                 adpa = 0;
 167
 168         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 169                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 170         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 171                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 172
 173         /* For CPT allow 3 pipe config, for others just use A or B */
 174         if (HAS_PCH_LPT(dev))
 175                 ; /* Those bits don't exist here */
 176         else if (HAS_PCH_CPT(dev))
 177                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 178         else if (crtc->pipe == 0)
 179                 adpa |= ADPA_PIPE_A_SELECT;
 180         else
 181                 adpa |= ADPA_PIPE_B_SELECT;
 182
 183         if (!HAS_PCH_SPLIT(dev))
 184                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 185
 186         switch (mode) {
 187         case DRM_MODE_DPMS_ON:
 188                 adpa |= ADPA_DAC_ENABLE;
 189                 break;
 190         case DRM_MODE_DPMS_STANDBY:
 191                 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 192                 break;
 193         case DRM_MODE_DPMS_SUSPEND:
 194                 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 195                 break;
 196         case DRM_MODE_DPMS_OFF:
 197                 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 198                 break;
 199         }
 200
 201         I915_WRITE(crt->adpa_reg, adpa);
 202 }
 203
 204 static void intel_disable_crt(struct intel_encoder *encoder)
 205 {
 206         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 207 }
 208
 209 static void intel_enable_crt(struct intel_encoder *encoder)
 210 {
 211         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 212
 213         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 214 }
 215
 216 /* Special dpms function to support cloning between dvo/sdvo/crt. */
 217 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 218 {
 219         struct drm_device *dev = connector->dev;
 220         struct intel_encoder *encoder = intel_attached_encoder(connector);
 221         struct drm_crtc *crtc;
 222         int old_dpms;
 223
 224         /* PCH platforms and VLV only support on/off. */
 225         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 226                 mode = DRM_MODE_DPMS_OFF;
 227
 228         if (mode == connector->dpms)
 229                 return;
 230
 231         old_dpms = connector->dpms;
 232         connector->dpms = mode;
 233
 234         /* Only need to change hw state when actually enabled */
 235         crtc = encoder->base.crtc;
 236         if (!crtc) {
 237                 encoder->connectors_active = false;
 238                 return;
 239         }
 240
 241         /* We need the pipe to run for anything but OFF. */
 242         if (mode == DRM_MODE_DPMS_OFF)
 243                 encoder->connectors_active = false;
 244         else
 245                 encoder->connectors_active = true;
 246
 247         /* We call connector dpms manually below in case pipe dpms doesn't
 248          * change due to cloning. */
 249         if (mode < old_dpms) {
 250                 /* From off to on, enable the pipe first. */
 251                 intel_crtc_update_dpms(crtc);
 252
 253                 intel_crt_set_dpms(encoder, mode);
 254         } else {
 255                 intel_crt_set_dpms(encoder, mode);
 256
 257                 intel_crtc_update_dpms(crtc);
 258         }
 259
 260         intel_modeset_check_state(connector->dev);
 261 }
 262
 263 static enum drm_mode_status
 264 intel_crt_mode_valid(struct drm_connector *connector,
 265                      struct drm_display_mode *mode)
 266 {
 267         struct drm_device *dev = connector->dev;
 268
 269         int max_clock = 0;
 270         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 271                 return MODE_NO_DBLESCAN;
 272
 273         if (mode->clock < 25000)
 274                 return MODE_CLOCK_LOW;
 275
 276         if (IS_GEN2(dev))
 277                 max_clock = 350000;
 278         else
 279                 max_clock = 400000;
 280         if (mode->clock > max_clock)
 281                 return MODE_CLOCK_HIGH;
 282
 283         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 284         if (HAS_PCH_LPT(dev) &&
 285             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 286                 return MODE_CLOCK_HIGH;
 287
 288         return MODE_OK;
 289 }
 290
 291 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 292                                      struct intel_crtc_config *pipe_config)
 293 {
 294         struct drm_device *dev = encoder->base.dev;
 295
 296         if (HAS_PCH_SPLIT(dev))
 297                 pipe_config->has_pch_encoder = true;
 298
 299         /* LPT FDI RX only supports 8bpc. */
 300         if (HAS_PCH_LPT(dev))
 301                 pipe_config->pipe_bpp = 24;
 302
 303         /* FDI must always be 2.7 GHz */
 304         if (HAS_DDI(dev))
 305                 pipe_config->port_clock = 135000 * 2;
 306
 307         return true;
 308 }
 309
 310 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 311 {
 312         struct drm_device *dev = connector->dev;
 313         struct intel_crt *crt = intel_attached_crt(connector);
 314         struct drm_i915_private *dev_priv = dev->dev_private;
 315         u32 adpa;
 316         bool ret;
 317
 318         /* The first time through, trigger an explicit detection cycle */
 319         if (crt->force_hotplug_required) {
 320                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 321                 u32 save_adpa;
 322
 323                 crt->force_hotplug_required = 0;
 324
 325                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 326                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 327
 328                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 329                 if (turn_off_dac)
 330                         adpa &= ~ADPA_DAC_ENABLE;
 331
 332                 I915_WRITE(crt->adpa_reg, adpa);
 333
 334                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 335                              1000))
 336                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 337
 338                 if (turn_off_dac) {
 339                         I915_WRITE(crt->adpa_reg, save_adpa);
 340                         POSTING_READ(crt->adpa_reg);
 341                 }
 342         }
 343
 344         /* Check the status to see if both blue and green are on now */
 345         adpa = I915_READ(crt->adpa_reg);
 346         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 347                 ret = true;
 348         else
 349                 ret = false;
 350         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 351
 352         return ret;
 353 }
 354
 355 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 356 {
 357         struct drm_device *dev = connector->dev;
 358         struct intel_crt *crt = intel_attached_crt(connector);
 359         struct drm_i915_private *dev_priv = dev->dev_private;
 360         u32 adpa;
 361         bool ret;
 362         u32 save_adpa;
 363
 364         save_adpa = adpa = I915_READ(crt->adpa_reg);
 365         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 366
 367         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 368
 369         I915_WRITE(crt->adpa_reg, adpa);
 370
 371         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 372                      1000)) {
 373                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 374                 I915_WRITE(crt->adpa_reg, save_adpa);
 375         }
 376
 377         /* Check the status to see if both blue and green are on now */
 378         adpa = I915_READ(crt->adpa_reg);
 379         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 380                 ret = true;
 381         else
 382                 ret = false;
 383
 384         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 385
 386         return ret;
 387 }
 388
 389 /**
 390  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 391  *
 392  * Not for i915G/i915GM
 393  *
 394  * \return true if CRT is connected.
 395  * \return false if CRT is disconnected.
 396  */
 397 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 398 {
 399         struct drm_device *dev = connector->dev;
 400         struct drm_i915_private *dev_priv = dev->dev_private;
 401         u32 hotplug_en, orig, stat;
 402         bool ret = false;
 403         int i, tries = 0;
 404
 405         if (HAS_PCH_SPLIT(dev))
 406                 return intel_ironlake_crt_detect_hotplug(connector);
 407
 408         if (IS_VALLEYVIEW(dev))
 409                 return valleyview_crt_detect_hotplug(connector);
 410
 411         /*
 412          * On 4 series desktop, CRT detect sequence need to be done twice
 413          * to get a reliable result.
 414          */
 415
 416         if (IS_G4X(dev) && !IS_GM45(dev))
 417                 tries = 2;
 418         else
 419                 tries = 1;
 420         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 421         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 422
 423         for (i = 0; i < tries ; i++) {
 424                 /* turn on the FORCE_DETECT */
 425                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 426                 /* wait for FORCE_DETECT to go off */
 427                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 428                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 429                              1000))
 430                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 431         }
 432
 433         stat = I915_READ(PORT_HOTPLUG_STAT);
 434         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 435                 ret = true;
 436
 437         /* clear the interrupt we just generated, if any */
 438         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 439
 440         /* and put the bits back */
 441         I915_WRITE(PORT_HOTPLUG_EN, orig);
 442
 443         return ret;
 444 }
 445
 446 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 447                                 struct i2c_adapter *i2c)
 448 {
 449         struct edid *edid;
 450
 451         edid = drm_get_edid(connector, i2c);
 452
 453         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 454                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 455                 intel_gmbus_force_bit(i2c, true);
 456                 edid = drm_get_edid(connector, i2c);
 457                 intel_gmbus_force_bit(i2c, false);
 458         }
 459
 460         return edid;
 461 }
 462
 463 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 464 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 465                                 struct i2c_adapter *adapter)
 466 {
 467         struct edid *edid;
 468         int ret;
 469
 470         edid = intel_crt_get_edid(connector, adapter);
 471         if (!edid)
 472                 return 0;
 473
 474         ret = intel_connector_update_modes(connector, edid);
 475         kfree(edid);
 476
 477         return ret;
 478 }
 479
 480 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 481 {
 482         struct intel_crt *crt = intel_attached_crt(connector);
 483         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 484         struct edid *edid;
 485         struct i2c_adapter *i2c;
 486
 487         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 488
 489         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 490         edid = intel_crt_get_edid(connector, i2c);
 491
 492         if (edid) {
 493                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 494
 495                 /*
 496                  * This may be a DVI-I connector with a shared DDC
 497                  * link between analog and digital outputs, so we
 498                  * have to check the EDID input spec of the attached device.
 499                  */
 500                 if (!is_digital) {
 501                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 502                         return true;
 503                 }
 504
 505                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 506         } else {
 507                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 508         }
 509
 510         kfree(edid);
 511
 512         return false;
 513 }
 514
 515 static enum drm_connector_status
 516 intel_crt_load_detect(struct intel_crt *crt)
 517 {
 518         struct drm_device *dev = crt->base.base.dev;
 519         struct drm_i915_private *dev_priv = dev->dev_private;
 520         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 521         uint32_t save_bclrpat;
 522         uint32_t save_vtotal;
 523         uint32_t vtotal, vactive;
 524         uint32_t vsample;
 525         uint32_t vblank, vblank_start, vblank_end;
 526         uint32_t dsl;
 527         uint32_t bclrpat_reg;
 528         uint32_t vtotal_reg;
 529         uint32_t vblank_reg;
 530         uint32_t vsync_reg;
 531         uint32_t pipeconf_reg;
 532         uint32_t pipe_dsl_reg;
 533         uint8_t st00;
 534         enum drm_connector_status status;
 535
 536         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 537
 538         bclrpat_reg = BCLRPAT(pipe);
 539         vtotal_reg = VTOTAL(pipe);
 540         vblank_reg = VBLANK(pipe);
 541         vsync_reg = VSYNC(pipe);
 542         pipeconf_reg = PIPECONF(pipe);
 543         pipe_dsl_reg = PIPEDSL(pipe);
 544
 545         save_bclrpat = I915_READ(bclrpat_reg);
 546         save_vtotal = I915_READ(vtotal_reg);
 547         vblank = I915_READ(vblank_reg);
 548
 549         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 550         vactive = (save_vtotal & 0x7ff) + 1;
 551
 552         vblank_start = (vblank & 0xfff) + 1;
 553         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 554
 555         /* Set the border color to purple. */
 556         I915_WRITE(bclrpat_reg, 0x500050);
 557
 558         if (!IS_GEN2(dev)) {
 559                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 560                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 561                 POSTING_READ(pipeconf_reg);
 562                 /* Wait for next Vblank to substitue
 563                  * border color for Color info */
 564                 intel_wait_for_vblank(dev, pipe);
 565                 st00 = I915_READ8(VGA_MSR_WRITE);
 566                 status = ((st00 & (1 << 4)) != 0) ?
 567                         connector_status_connected :
 568                         connector_status_disconnected;
 569
 570                 I915_WRITE(pipeconf_reg, pipeconf);
 571         } else {
 572                 bool restore_vblank = false;
 573                 int count, detect;
 574
 575                 /*
 576                 * If there isn't any border, add some.
 577                 * Yes, this will flicker
 578                 */
 579                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 580                         uint32_t vsync = I915_READ(vsync_reg);
 581                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 582
 583                         vblank_start = vsync_start;
 584                         I915_WRITE(vblank_reg,
 585                                    (vblank_start - 1) |
 586                                    ((vblank_end - 1) << 16));
 587                         restore_vblank = true;
 588                 }
 589                 /* sample in the vertical border, selecting the larger one */
 590                 if (vblank_start - vactive >= vtotal - vblank_end)
 591                         vsample = (vblank_start + vactive) >> 1;
 592                 else
 593                         vsample = (vtotal + vblank_end) >> 1;
 594
 595                 /*
 596                  * Wait for the border to be displayed
 597                  */
 598                 while (I915_READ(pipe_dsl_reg) >= vactive)
 599                         ;
 600                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 601                         ;
 602                 /*
 603                  * Watch ST00 for an entire scanline
 604                  */
 605                 detect = 0;
 606                 count = 0;
 607                 do {
 608                         count++;
 609                         /* Read the ST00 VGA status register */
 610                         st00 = I915_READ8(VGA_MSR_WRITE);
 611                         if (st00 & (1 << 4))
 612                                 detect++;
 613                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 614
 615                 /* restore vblank if necessary */
 616                 if (restore_vblank)
 617                         I915_WRITE(vblank_reg, vblank);
 618                 /*
 619                  * If more than 3/4 of the scanline detected a monitor,
 620                  * then it is assumed to be present. This works even on i830,
 621                  * where there isn't any way to force the border color across
 622                  * the screen
 623                  */
 624                 status = detect * 4 > count * 3 ?
 625                          connector_status_connected :
 626                          connector_status_disconnected;
 627         }
 628
 629         /* Restore previous settings */
 630         I915_WRITE(bclrpat_reg, save_bclrpat);
 631
 632         return status;
 633 }
 634
 635 static enum drm_connector_status
 636 intel_crt_detect(struct drm_connector *connector, bool force)
 637 {
 638         struct drm_device *dev = connector->dev;
 639         struct drm_i915_private *dev_priv = dev->dev_private;
 640         struct intel_crt *crt = intel_attached_crt(connector);
 641         struct intel_encoder *intel_encoder = &crt->base;
 642         enum intel_display_power_domain power_domain;
 643         enum drm_connector_status status;
 644         struct intel_load_detect_pipe tmp;
 645         struct drm_modeset_acquire_ctx ctx;
 646
 647         intel_runtime_pm_get(dev_priv);
 648
 649         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 650                       connector->base.id, connector->name,
 651                       force);
 652
 653         power_domain = intel_display_port_power_domain(intel_encoder);
 654         intel_display_power_get(dev_priv, power_domain);
 655
 656         if (I915_HAS_HOTPLUG(dev)) {
 657                 /* We can not rely on the HPD pin always being correctly wired
 658                  * up, for example many KVM do not pass it through, and so
 659                  * only trust an assertion that the monitor is connected.
 660                  */
 661                 if (intel_crt_detect_hotplug(connector)) {
 662                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 663                         status = connector_status_connected;
 664                         goto out;
 665                 } else
 666                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 667         }
 668
 669         if (intel_crt_detect_ddc(connector)) {
 670                 status = connector_status_connected;
 671                 goto out;
 672         }
 673
 674         /* Load detection is broken on HPD capable machines. Whoever wants a
 675          * broken monitor (without edid) to work behind a broken kvm (that fails
 676          * to have the right resistors for HP detection) needs to fix this up.
 677          * For now just bail out. */
 678         if (I915_HAS_HOTPLUG(dev)) {
 679                 status = connector_status_disconnected;
 680                 goto out;
 681         }
 682
 683         if (!force) {
 684                 status = connector->status;
 685                 goto out;
 686         }
 687
 688         /* for pre-945g platforms use load detect */
 689         if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
 690                 if (intel_crt_detect_ddc(connector))
 691                         status = connector_status_connected;
 692                 else
 693                         status = intel_crt_load_detect(crt);
 694                 intel_release_load_detect_pipe(connector, &tmp, &ctx);
 695         } else
 696                 status = connector_status_unknown;
 697
 698 out:
 699         intel_display_power_put(dev_priv, power_domain);
 700         intel_runtime_pm_put(dev_priv);
 701
 702         return status;
 703 }
 704
 705 static void intel_crt_destroy(struct drm_connector *connector)
 706 {
 707         drm_connector_cleanup(connector);
 708         kfree(connector);
 709 }
 710
 711 static int intel_crt_get_modes(struct drm_connector *connector)
 712 {
 713         struct drm_device *dev = connector->dev;
 714         struct drm_i915_private *dev_priv = dev->dev_private;
 715         struct intel_crt *crt = intel_attached_crt(connector);
 716         struct intel_encoder *intel_encoder = &crt->base;
 717         enum intel_display_power_domain power_domain;
 718         int ret;
 719         struct i2c_adapter *i2c;
 720
 721         power_domain = intel_display_port_power_domain(intel_encoder);
 722         intel_display_power_get(dev_priv, power_domain);
 723
 724         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 725         ret = intel_crt_ddc_get_modes(connector, i2c);
 726         if (ret || !IS_G4X(dev))
 727                 goto out;
 728
 729         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 730         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 731         ret = intel_crt_ddc_get_modes(connector, i2c);
 732
 733 out:
 734         intel_display_power_put(dev_priv, power_domain);
 735
 736         return ret;
 737 }
 738
 739 static int intel_crt_set_property(struct drm_connector *connector,
 740                                   struct drm_property *property,
 741                                   uint64_t value)
 742 {
 743         return 0;
 744 }
 745
 746 static void intel_crt_reset(struct drm_connector *connector)
 747 {
 748         struct drm_device *dev = connector->dev;
 749         struct drm_i915_private *dev_priv = dev->dev_private;
 750         struct intel_crt *crt = intel_attached_crt(connector);
 751
 752         if (INTEL_INFO(dev)->gen >= 5) {
 753                 u32 adpa;
 754
 755                 adpa = I915_READ(crt->adpa_reg);
 756                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 757                 adpa |= ADPA_HOTPLUG_BITS;
 758                 I915_WRITE(crt->adpa_reg, adpa);
 759                 POSTING_READ(crt->adpa_reg);
 760
 761                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 762                 crt->force_hotplug_required = 1;
 763         }
 764
 765 }
 766
 767 /*
 768  * Routines for controlling stuff on the analog port
 769  */
 770
 771 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 772         .reset = intel_crt_reset,
 773         .dpms = intel_crt_dpms,
 774         .detect = intel_crt_detect,
 775         .fill_modes = drm_helper_probe_single_connector_modes,
 776         .destroy = intel_crt_destroy,
 777         .set_property = intel_crt_set_property,
 778 };
 779
 780 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 781         .mode_valid = intel_crt_mode_valid,
 782         .get_modes = intel_crt_get_modes,
 783         .best_encoder = intel_best_encoder,
 784 };
 785
 786 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 787         .destroy = intel_encoder_destroy,
 788 };
 789
 790 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 791 {
 792         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 793         return 1;
 794 }
 795
 796 static const struct dmi_system_id intel_no_crt[] = {
 797         {
 798                 .callback = intel_no_crt_dmi_callback,
 799                 .ident = "ACER ZGB",
 800                 .matches = {
 801                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 802                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 803                 },
 804         },
 805         {
 806                 .callback = intel_no_crt_dmi_callback,
 807                 .ident = "DELL XPS 8700",
 808                 .matches = {
 809                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 810                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 811                 },
 812         },
 813         { }
 814 };
 815
 816 void intel_crt_init(struct drm_device *dev)
 817 {
 818         struct drm_connector *connector;
 819         struct intel_crt *crt;
 820         struct intel_connector *intel_connector;
 821         struct drm_i915_private *dev_priv = dev->dev_private;
 822
 823         /* Skip machines without VGA that falsely report hotplug events */
 824         if (dmi_check_system(intel_no_crt))
 825                 return;
 826
 827         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 828         if (!crt)
 829                 return;
 830
 831         intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
 832         if (!intel_connector) {
 833                 kfree(crt);
 834                 return;
 835         }
 836
 837         connector = &intel_connector->base;
 838         crt->connector = intel_connector;
 839         drm_connector_init(dev, &intel_connector->base,
 840                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 841
 842         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 843                          DRM_MODE_ENCODER_DAC);
 844
 845         intel_connector_attach_encoder(intel_connector, &crt->base);
 846
 847         crt->base.type = INTEL_OUTPUT_ANALOG;
 848         crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 849         if (IS_I830(dev))
 850                 crt->base.crtc_mask = (1 << 0);
 851         else
 852                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 853
 854         if (IS_GEN2(dev))
 855                 connector->interlace_allowed = 0;
 856         else
 857                 connector->interlace_allowed = 1;
 858         connector->doublescan_allowed = 0;
 859
 860         if (HAS_PCH_SPLIT(dev))
 861                 crt->adpa_reg = PCH_ADPA;
 862         else if (IS_VALLEYVIEW(dev))
 863                 crt->adpa_reg = VLV_ADPA;
 864         else
 865                 crt->adpa_reg = ADPA;
 866
 867         crt->base.compute_config = intel_crt_compute_config;
 868         crt->base.disable = intel_disable_crt;
 869         crt->base.enable = intel_enable_crt;
 870         if (I915_HAS_HOTPLUG(dev))
 871                 crt->base.hpd_pin = HPD_CRT;
 872         if (HAS_DDI(dev)) {
 873                 crt->base.get_config = hsw_crt_get_config;
 874                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 875                 crt->base.pre_enable = hsw_crt_pre_enable;
 876         } else {
 877                 crt->base.get_config = intel_crt_get_config;
 878                 crt->base.get_hw_state = intel_crt_get_hw_state;
 879         }
 880         intel_connector->get_hw_state = intel_connector_get_hw_state;
 881         intel_connector->unregister = intel_connector_unregister;
 882
 883         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 884
 885         drm_sysfs_connector_add(connector);
 886
 887         if (!I915_HAS_HOTPLUG(dev))
 888                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 889
 890         /*
 891          * Configure the automatic hotplug detection stuff
 892          */
 893         crt->force_hotplug_required = 0;
 894
 895         /*
 896          * TODO: find a proper way to discover whether we need to set the the
 897          * polarity and link reversal bits or not, instead of relying on the
 898          * BIOS.
 899          */
 900         if (HAS_PCH_LPT(dev)) {
 901                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 902                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 903
 904                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 905         }
 906
 907         intel_crt_reset(connector);
 908 }