drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <drm/drmP.h>
  31 #include <drm/drm_atomic_helper.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_crtc_helper.h>
  34 #include <drm/drm_edid.h>
  35 #include "intel_drv.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38
  39 /* Here's the desired hotplug mode */
  40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  41                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  42                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  43                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  44                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  45                            ADPA_CRT_HOTPLUG_ENABLE)
  46
  47 struct intel_crt {
  48         struct intel_encoder base;
  49         /* DPMS state is stored in the connector, which we need in the
  50          * encoder's enable/disable callbacks */
  51         struct intel_connector *connector;
  52         bool force_hotplug_required;
  53         u32 adpa_reg;
  54 };
  55
  56 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
  57 {
  58         return container_of(encoder, struct intel_crt, base);
  59 }
  60
  61 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  62 {
  63         return intel_encoder_to_crt(intel_attached_encoder(connector));
  64 }
  65
  66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
  67                                    enum pipe *pipe)
  68 {
  69         struct drm_device *dev = encoder->base.dev;
  70         struct drm_i915_private *dev_priv = dev->dev_private;
  71         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  72         enum intel_display_power_domain power_domain;
  73         u32 tmp;
  74
  75         power_domain = intel_display_port_power_domain(encoder);
  76         if (!intel_display_power_is_enabled(dev_priv, power_domain))
  77                 return false;
  78
  79         tmp = I915_READ(crt->adpa_reg);
  80
  81         if (!(tmp & ADPA_DAC_ENABLE))
  82                 return false;
  83
  84         if (HAS_PCH_CPT(dev))
  85                 *pipe = PORT_TO_PIPE_CPT(tmp);
  86         else
  87                 *pipe = PORT_TO_PIPE(tmp);
  88
  89         return true;
  90 }
  91
  92 static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
  93 {
  94         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  95         struct intel_crt *crt = intel_encoder_to_crt(encoder);
  96         u32 tmp, flags = 0;
  97
  98         tmp = I915_READ(crt->adpa_reg);
  99
 100         if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
 101                 flags |= DRM_MODE_FLAG_PHSYNC;
 102         else
 103                 flags |= DRM_MODE_FLAG_NHSYNC;
 104
 105         if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
 106                 flags |= DRM_MODE_FLAG_PVSYNC;
 107         else
 108                 flags |= DRM_MODE_FLAG_NVSYNC;
 109
 110         return flags;
 111 }
 112
 113 static void intel_crt_get_config(struct intel_encoder *encoder,
 114                                  struct intel_crtc_state *pipe_config)
 115 {
 116         struct drm_device *dev = encoder->base.dev;
 117         int dotclock;
 118
 119         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 120
 121         dotclock = pipe_config->port_clock;
 122
 123         if (HAS_PCH_SPLIT(dev))
 124                 ironlake_check_encoder_dotclock(pipe_config, dotclock);
 125
 126         pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 127 }
 128
 129 static void hsw_crt_get_config(struct intel_encoder *encoder,
 130                                struct intel_crtc_state *pipe_config)
 131 {
 132         intel_ddi_get_config(encoder, pipe_config);
 133
 134         pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
 135                                               DRM_MODE_FLAG_NHSYNC |
 136                                               DRM_MODE_FLAG_PVSYNC |
 137                                               DRM_MODE_FLAG_NVSYNC);
 138         pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
 139 }
 140
 141 static void hsw_crt_pre_enable(struct intel_encoder *encoder)
 142 {
 143         struct drm_device *dev = encoder->base.dev;
 144         struct drm_i915_private *dev_priv = dev->dev_private;
 145
 146         WARN(I915_READ(SPLL_CTL) & SPLL_PLL_ENABLE, "SPLL already enabled\n");
 147         I915_WRITE(SPLL_CTL,
 148                    SPLL_PLL_ENABLE | SPLL_PLL_FREQ_1350MHz | SPLL_PLL_SSC);
 149         POSTING_READ(SPLL_CTL);
 150         udelay(20);
 151 }
 152
 153 /* Note: The caller is required to filter out dpms modes not supported by the
 154  * platform. */
 155 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
 156 {
 157         struct drm_device *dev = encoder->base.dev;
 158         struct drm_i915_private *dev_priv = dev->dev_private;
 159         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 160         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 161         struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 162         u32 adpa;
 163
 164         if (INTEL_INFO(dev)->gen >= 5)
 165                 adpa = ADPA_HOTPLUG_BITS;
 166         else
 167                 adpa = 0;
 168
 169         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 170                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 171         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 172                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 173
 174         /* For CPT allow 3 pipe config, for others just use A or B */
 175         if (HAS_PCH_LPT(dev))
 176                 ; /* Those bits don't exist here */
 177         else if (HAS_PCH_CPT(dev))
 178                 adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
 179         else if (crtc->pipe == 0)
 180                 adpa |= ADPA_PIPE_A_SELECT;
 181         else
 182                 adpa |= ADPA_PIPE_B_SELECT;
 183
 184         if (!HAS_PCH_SPLIT(dev))
 185                 I915_WRITE(BCLRPAT(crtc->pipe), 0);
 186
 187         switch (mode) {
 188         case DRM_MODE_DPMS_ON:
 189                 adpa |= ADPA_DAC_ENABLE;
 190                 break;
 191         case DRM_MODE_DPMS_STANDBY:
 192                 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
 193                 break;
 194         case DRM_MODE_DPMS_SUSPEND:
 195                 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
 196                 break;
 197         case DRM_MODE_DPMS_OFF:
 198                 adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
 199                 break;
 200         }
 201
 202         I915_WRITE(crt->adpa_reg, adpa);
 203 }
 204
 205 static void intel_disable_crt(struct intel_encoder *encoder)
 206 {
 207         intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
 208 }
 209
 210
 211 static void hsw_crt_post_disable(struct intel_encoder *encoder)
 212 {
 213         struct drm_device *dev = encoder->base.dev;
 214         struct drm_i915_private *dev_priv = dev->dev_private;
 215         uint32_t val;
 216
 217         DRM_DEBUG_KMS("Disabling SPLL\n");
 218         val = I915_READ(SPLL_CTL);
 219         WARN_ON(!(val & SPLL_PLL_ENABLE));
 220         I915_WRITE(SPLL_CTL, val & ~SPLL_PLL_ENABLE);
 221         POSTING_READ(SPLL_CTL);
 222 }
 223
 224 static void intel_enable_crt(struct intel_encoder *encoder)
 225 {
 226         struct intel_crt *crt = intel_encoder_to_crt(encoder);
 227
 228         intel_crt_set_dpms(encoder, crt->connector->base.dpms);
 229 }
 230
 231 /* Special dpms function to support cloning between dvo/sdvo/crt. */
 232 static void intel_crt_dpms(struct drm_connector *connector, int mode)
 233 {
 234         struct drm_device *dev = connector->dev;
 235         struct intel_encoder *encoder = intel_attached_encoder(connector);
 236         struct drm_crtc *crtc;
 237         int old_dpms;
 238
 239         /* PCH platforms and VLV only support on/off. */
 240         if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
 241                 mode = DRM_MODE_DPMS_OFF;
 242
 243         if (mode == connector->dpms)
 244                 return;
 245
 246         old_dpms = connector->dpms;
 247         connector->dpms = mode;
 248
 249         /* Only need to change hw state when actually enabled */
 250         crtc = encoder->base.crtc;
 251         if (!crtc) {
 252                 encoder->connectors_active = false;
 253                 return;
 254         }
 255
 256         /* We need the pipe to run for anything but OFF. */
 257         if (mode == DRM_MODE_DPMS_OFF)
 258                 encoder->connectors_active = false;
 259         else
 260                 encoder->connectors_active = true;
 261
 262         /* We call connector dpms manually below in case pipe dpms doesn't
 263          * change due to cloning. */
 264         if (mode < old_dpms) {
 265                 /* From off to on, enable the pipe first. */
 266                 intel_crtc_update_dpms(crtc);
 267
 268                 intel_crt_set_dpms(encoder, mode);
 269         } else {
 270                 intel_crt_set_dpms(encoder, mode);
 271
 272                 intel_crtc_update_dpms(crtc);
 273         }
 274
 275         intel_modeset_check_state(connector->dev);
 276 }
 277
 278 static enum drm_mode_status
 279 intel_crt_mode_valid(struct drm_connector *connector,
 280                      struct drm_display_mode *mode)
 281 {
 282         struct drm_device *dev = connector->dev;
 283
 284         int max_clock = 0;
 285         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 286                 return MODE_NO_DBLESCAN;
 287
 288         if (mode->clock < 25000)
 289                 return MODE_CLOCK_LOW;
 290
 291         if (IS_GEN2(dev))
 292                 max_clock = 350000;
 293         else
 294                 max_clock = 400000;
 295         if (mode->clock > max_clock)
 296                 return MODE_CLOCK_HIGH;
 297
 298         /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
 299         if (HAS_PCH_LPT(dev) &&
 300             (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
 301                 return MODE_CLOCK_HIGH;
 302
 303         return MODE_OK;
 304 }
 305
 306 static bool intel_crt_compute_config(struct intel_encoder *encoder,
 307                                      struct intel_crtc_state *pipe_config)
 308 {
 309         struct drm_device *dev = encoder->base.dev;
 310
 311         if (HAS_PCH_SPLIT(dev))
 312                 pipe_config->has_pch_encoder = true;
 313
 314         /* LPT FDI RX only supports 8bpc. */
 315         if (HAS_PCH_LPT(dev))
 316                 pipe_config->pipe_bpp = 24;
 317
 318         /* FDI must always be 2.7 GHz */
 319         if (HAS_DDI(dev)) {
 320                 pipe_config->ddi_pll_sel = PORT_CLK_SEL_SPLL;
 321                 pipe_config->port_clock = 135000 * 2;
 322         }
 323
 324         return true;
 325 }
 326
 327 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 328 {
 329         struct drm_device *dev = connector->dev;
 330         struct intel_crt *crt = intel_attached_crt(connector);
 331         struct drm_i915_private *dev_priv = dev->dev_private;
 332         u32 adpa;
 333         bool ret;
 334
 335         /* The first time through, trigger an explicit detection cycle */
 336         if (crt->force_hotplug_required) {
 337                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 338                 u32 save_adpa;
 339
 340                 crt->force_hotplug_required = 0;
 341
 342                 save_adpa = adpa = I915_READ(crt->adpa_reg);
 343                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 344
 345                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 346                 if (turn_off_dac)
 347                         adpa &= ~ADPA_DAC_ENABLE;
 348
 349                 I915_WRITE(crt->adpa_reg, adpa);
 350
 351                 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 352                              1000))
 353                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 354
 355                 if (turn_off_dac) {
 356                         I915_WRITE(crt->adpa_reg, save_adpa);
 357                         POSTING_READ(crt->adpa_reg);
 358                 }
 359         }
 360
 361         /* Check the status to see if both blue and green are on now */
 362         adpa = I915_READ(crt->adpa_reg);
 363         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 364                 ret = true;
 365         else
 366                 ret = false;
 367         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 368
 369         return ret;
 370 }
 371
 372 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
 373 {
 374         struct drm_device *dev = connector->dev;
 375         struct intel_crt *crt = intel_attached_crt(connector);
 376         struct drm_i915_private *dev_priv = dev->dev_private;
 377         u32 adpa;
 378         bool ret;
 379         u32 save_adpa;
 380
 381         save_adpa = adpa = I915_READ(crt->adpa_reg);
 382         DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 383
 384         adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 385
 386         I915_WRITE(crt->adpa_reg, adpa);
 387
 388         if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 389                      1000)) {
 390                 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 391                 I915_WRITE(crt->adpa_reg, save_adpa);
 392         }
 393
 394         /* Check the status to see if both blue and green are on now */
 395         adpa = I915_READ(crt->adpa_reg);
 396         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 397                 ret = true;
 398         else
 399                 ret = false;
 400
 401         DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
 402
 403         return ret;
 404 }
 405
 406 /**
 407  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 408  *
 409  * Not for i915G/i915GM
 410  *
 411  * \return true if CRT is connected.
 412  * \return false if CRT is disconnected.
 413  */
 414 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 415 {
 416         struct drm_device *dev = connector->dev;
 417         struct drm_i915_private *dev_priv = dev->dev_private;
 418         u32 hotplug_en, orig, stat;
 419         bool ret = false;
 420         int i, tries = 0;
 421
 422         if (HAS_PCH_SPLIT(dev))
 423                 return intel_ironlake_crt_detect_hotplug(connector);
 424
 425         if (IS_VALLEYVIEW(dev))
 426                 return valleyview_crt_detect_hotplug(connector);
 427
 428         /*
 429          * On 4 series desktop, CRT detect sequence need to be done twice
 430          * to get a reliable result.
 431          */
 432
 433         if (IS_G4X(dev) && !IS_GM45(dev))
 434                 tries = 2;
 435         else
 436                 tries = 1;
 437         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 438         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 439
 440         for (i = 0; i < tries ; i++) {
 441                 /* turn on the FORCE_DETECT */
 442                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 443                 /* wait for FORCE_DETECT to go off */
 444                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 445                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 446                              1000))
 447                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 448         }
 449
 450         stat = I915_READ(PORT_HOTPLUG_STAT);
 451         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 452                 ret = true;
 453
 454         /* clear the interrupt we just generated, if any */
 455         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 456
 457         /* and put the bits back */
 458         I915_WRITE(PORT_HOTPLUG_EN, orig);
 459
 460         return ret;
 461 }
 462
 463 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
 464                                 struct i2c_adapter *i2c)
 465 {
 466         struct edid *edid;
 467
 468         edid = drm_get_edid(connector, i2c);
 469
 470         if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
 471                 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
 472                 intel_gmbus_force_bit(i2c, true);
 473                 edid = drm_get_edid(connector, i2c);
 474                 intel_gmbus_force_bit(i2c, false);
 475         }
 476
 477         return edid;
 478 }
 479
 480 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
 481 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
 482                                 struct i2c_adapter *adapter)
 483 {
 484         struct edid *edid;
 485         int ret;
 486
 487         edid = intel_crt_get_edid(connector, adapter);
 488         if (!edid)
 489                 return 0;
 490
 491         ret = intel_connector_update_modes(connector, edid);
 492         kfree(edid);
 493
 494         return ret;
 495 }
 496
 497 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 498 {
 499         struct intel_crt *crt = intel_attached_crt(connector);
 500         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 501         struct edid *edid;
 502         struct i2c_adapter *i2c;
 503
 504         BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
 505
 506         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 507         edid = intel_crt_get_edid(connector, i2c);
 508
 509         if (edid) {
 510                 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 511
 512                 /*
 513                  * This may be a DVI-I connector with a shared DDC
 514                  * link between analog and digital outputs, so we
 515                  * have to check the EDID input spec of the attached device.
 516                  */
 517                 if (!is_digital) {
 518                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 519                         return true;
 520                 }
 521
 522                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 523         } else {
 524                 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
 525         }
 526
 527         kfree(edid);
 528
 529         return false;
 530 }
 531
 532 static enum drm_connector_status
 533 intel_crt_load_detect(struct intel_crt *crt)
 534 {
 535         struct drm_device *dev = crt->base.base.dev;
 536         struct drm_i915_private *dev_priv = dev->dev_private;
 537         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 538         uint32_t save_bclrpat;
 539         uint32_t save_vtotal;
 540         uint32_t vtotal, vactive;
 541         uint32_t vsample;
 542         uint32_t vblank, vblank_start, vblank_end;
 543         uint32_t dsl;
 544         uint32_t bclrpat_reg;
 545         uint32_t vtotal_reg;
 546         uint32_t vblank_reg;
 547         uint32_t vsync_reg;
 548         uint32_t pipeconf_reg;
 549         uint32_t pipe_dsl_reg;
 550         uint8_t st00;
 551         enum drm_connector_status status;
 552
 553         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 554
 555         bclrpat_reg = BCLRPAT(pipe);
 556         vtotal_reg = VTOTAL(pipe);
 557         vblank_reg = VBLANK(pipe);
 558         vsync_reg = VSYNC(pipe);
 559         pipeconf_reg = PIPECONF(pipe);
 560         pipe_dsl_reg = PIPEDSL(pipe);
 561
 562         save_bclrpat = I915_READ(bclrpat_reg);
 563         save_vtotal = I915_READ(vtotal_reg);
 564         vblank = I915_READ(vblank_reg);
 565
 566         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 567         vactive = (save_vtotal & 0x7ff) + 1;
 568
 569         vblank_start = (vblank & 0xfff) + 1;
 570         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 571
 572         /* Set the border color to purple. */
 573         I915_WRITE(bclrpat_reg, 0x500050);
 574
 575         if (!IS_GEN2(dev)) {
 576                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 577                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 578                 POSTING_READ(pipeconf_reg);
 579                 /* Wait for next Vblank to substitue
 580                  * border color for Color info */
 581                 intel_wait_for_vblank(dev, pipe);
 582                 st00 = I915_READ8(VGA_MSR_WRITE);
 583                 status = ((st00 & (1 << 4)) != 0) ?
 584                         connector_status_connected :
 585                         connector_status_disconnected;
 586
 587                 I915_WRITE(pipeconf_reg, pipeconf);
 588         } else {
 589                 bool restore_vblank = false;
 590                 int count, detect;
 591
 592                 /*
 593                 * If there isn't any border, add some.
 594                 * Yes, this will flicker
 595                 */
 596                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 597                         uint32_t vsync = I915_READ(vsync_reg);
 598                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 599
 600                         vblank_start = vsync_start;
 601                         I915_WRITE(vblank_reg,
 602                                    (vblank_start - 1) |
 603                                    ((vblank_end - 1) << 16));
 604                         restore_vblank = true;
 605                 }
 606                 /* sample in the vertical border, selecting the larger one */
 607                 if (vblank_start - vactive >= vtotal - vblank_end)
 608                         vsample = (vblank_start + vactive) >> 1;
 609                 else
 610                         vsample = (vtotal + vblank_end) >> 1;
 611
 612                 /*
 613                  * Wait for the border to be displayed
 614                  */
 615                 while (I915_READ(pipe_dsl_reg) >= vactive)
 616                         ;
 617                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 618                         ;
 619                 /*
 620                  * Watch ST00 for an entire scanline
 621                  */
 622                 detect = 0;
 623                 count = 0;
 624                 do {
 625                         count++;
 626                         /* Read the ST00 VGA status register */
 627                         st00 = I915_READ8(VGA_MSR_WRITE);
 628                         if (st00 & (1 << 4))
 629                                 detect++;
 630                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 631
 632                 /* restore vblank if necessary */
 633                 if (restore_vblank)
 634                         I915_WRITE(vblank_reg, vblank);
 635                 /*
 636                  * If more than 3/4 of the scanline detected a monitor,
 637                  * then it is assumed to be present. This works even on i830,
 638                  * where there isn't any way to force the border color across
 639                  * the screen
 640                  */
 641                 status = detect * 4 > count * 3 ?
 642                          connector_status_connected :
 643                          connector_status_disconnected;
 644         }
 645
 646         /* Restore previous settings */
 647         I915_WRITE(bclrpat_reg, save_bclrpat);
 648
 649         return status;
 650 }
 651
 652 static enum drm_connector_status
 653 intel_crt_detect(struct drm_connector *connector, bool force)
 654 {
 655         struct drm_device *dev = connector->dev;
 656         struct drm_i915_private *dev_priv = dev->dev_private;
 657         struct intel_crt *crt = intel_attached_crt(connector);
 658         struct intel_encoder *intel_encoder = &crt->base;
 659         enum intel_display_power_domain power_domain;
 660         enum drm_connector_status status;
 661         struct intel_load_detect_pipe tmp;
 662         struct drm_modeset_acquire_ctx ctx;
 663
 664         DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
 665                       connector->base.id, connector->name,
 666                       force);
 667
 668         power_domain = intel_display_port_power_domain(intel_encoder);
 669         intel_display_power_get(dev_priv, power_domain);
 670
 671         if (I915_HAS_HOTPLUG(dev)) {
 672                 /* We can not rely on the HPD pin always being correctly wired
 673                  * up, for example many KVM do not pass it through, and so
 674                  * only trust an assertion that the monitor is connected.
 675                  */
 676                 if (intel_crt_detect_hotplug(connector)) {
 677                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 678                         status = connector_status_connected;
 679                         goto out;
 680                 } else
 681                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 682         }
 683
 684         if (intel_crt_detect_ddc(connector)) {
 685                 status = connector_status_connected;
 686                 goto out;
 687         }
 688
 689         /* Load detection is broken on HPD capable machines. Whoever wants a
 690          * broken monitor (without edid) to work behind a broken kvm (that fails
 691          * to have the right resistors for HP detection) needs to fix this up.
 692          * For now just bail out. */
 693         if (I915_HAS_HOTPLUG(dev)) {
 694                 status = connector_status_disconnected;
 695                 goto out;
 696         }
 697
 698         if (!force) {
 699                 status = connector->status;
 700                 goto out;
 701         }
 702
 703         drm_modeset_acquire_init(&ctx, 0);
 704
 705         /* for pre-945g platforms use load detect */
 706         if (intel_get_load_detect_pipe(connector, NULL, &tmp, &ctx)) {
 707                 if (intel_crt_detect_ddc(connector))
 708                         status = connector_status_connected;
 709                 else
 710                         status = intel_crt_load_detect(crt);
 711                 intel_release_load_detect_pipe(connector, &tmp);
 712         } else
 713                 status = connector_status_unknown;
 714
 715         drm_modeset_drop_locks(&ctx);
 716         drm_modeset_acquire_fini(&ctx);
 717
 718 out:
 719         intel_display_power_put(dev_priv, power_domain);
 720         return status;
 721 }
 722
 723 static void intel_crt_destroy(struct drm_connector *connector)
 724 {
 725         drm_connector_cleanup(connector);
 726         kfree(connector);
 727 }
 728
 729 static int intel_crt_get_modes(struct drm_connector *connector)
 730 {
 731         struct drm_device *dev = connector->dev;
 732         struct drm_i915_private *dev_priv = dev->dev_private;
 733         struct intel_crt *crt = intel_attached_crt(connector);
 734         struct intel_encoder *intel_encoder = &crt->base;
 735         enum intel_display_power_domain power_domain;
 736         int ret;
 737         struct i2c_adapter *i2c;
 738
 739         power_domain = intel_display_port_power_domain(intel_encoder);
 740         intel_display_power_get(dev_priv, power_domain);
 741
 742         i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
 743         ret = intel_crt_ddc_get_modes(connector, i2c);
 744         if (ret || !IS_G4X(dev))
 745                 goto out;
 746
 747         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 748         i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
 749         ret = intel_crt_ddc_get_modes(connector, i2c);
 750
 751 out:
 752         intel_display_power_put(dev_priv, power_domain);
 753
 754         return ret;
 755 }
 756
 757 static int intel_crt_set_property(struct drm_connector *connector,
 758                                   struct drm_property *property,
 759                                   uint64_t value)
 760 {
 761         return 0;
 762 }
 763
 764 static void intel_crt_reset(struct drm_connector *connector)
 765 {
 766         struct drm_device *dev = connector->dev;
 767         struct drm_i915_private *dev_priv = dev->dev_private;
 768         struct intel_crt *crt = intel_attached_crt(connector);
 769
 770         if (INTEL_INFO(dev)->gen >= 5) {
 771                 u32 adpa;
 772
 773                 adpa = I915_READ(crt->adpa_reg);
 774                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 775                 adpa |= ADPA_HOTPLUG_BITS;
 776                 I915_WRITE(crt->adpa_reg, adpa);
 777                 POSTING_READ(crt->adpa_reg);
 778
 779                 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
 780                 crt->force_hotplug_required = 1;
 781         }
 782
 783 }
 784
 785 /*
 786  * Routines for controlling stuff on the analog port
 787  */
 788
 789 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 790         .reset = intel_crt_reset,
 791         .dpms = intel_crt_dpms,
 792         .detect = intel_crt_detect,
 793         .fill_modes = drm_helper_probe_single_connector_modes,
 794         .destroy = intel_crt_destroy,
 795         .set_property = intel_crt_set_property,
 796         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 797         .atomic_get_property = intel_connector_atomic_get_property,
 798 };
 799
 800 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 801         .mode_valid = intel_crt_mode_valid,
 802         .get_modes = intel_crt_get_modes,
 803         .best_encoder = intel_best_encoder,
 804 };
 805
 806 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 807         .destroy = intel_encoder_destroy,
 808 };
 809
 810 static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 811 {
 812         DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
 813         return 1;
 814 }
 815
 816 static const struct dmi_system_id intel_no_crt[] = {
 817         {
 818                 .callback = intel_no_crt_dmi_callback,
 819                 .ident = "ACER ZGB",
 820                 .matches = {
 821                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 822                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 823                 },
 824         },
 825         {
 826                 .callback = intel_no_crt_dmi_callback,
 827                 .ident = "DELL XPS 8700",
 828                 .matches = {
 829                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 830                         DMI_MATCH(DMI_PRODUCT_NAME, "XPS 8700"),
 831                 },
 832         },
 833         { }
 834 };
 835
 836 void intel_crt_init(struct drm_device *dev)
 837 {
 838         struct drm_connector *connector;
 839         struct intel_crt *crt;
 840         struct intel_connector *intel_connector;
 841         struct drm_i915_private *dev_priv = dev->dev_private;
 842
 843         /* Skip machines without VGA that falsely report hotplug events */
 844         if (dmi_check_system(intel_no_crt))
 845                 return;
 846
 847         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 848         if (!crt)
 849                 return;
 850
 851         intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
 852         if (!intel_connector) {
 853                 kfree(crt);
 854                 return;
 855         }
 856
 857         connector = &intel_connector->base;
 858         crt->connector = intel_connector;
 859         drm_connector_init(dev, &intel_connector->base,
 860                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 861
 862         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 863                          DRM_MODE_ENCODER_DAC);
 864
 865         intel_connector_attach_encoder(intel_connector, &crt->base);
 866
 867         crt->base.type = INTEL_OUTPUT_ANALOG;
 868         crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 << INTEL_OUTPUT_HDMI);
 869         if (IS_I830(dev))
 870                 crt->base.crtc_mask = (1 << 0);
 871         else
 872                 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 873
 874         if (IS_GEN2(dev))
 875                 connector->interlace_allowed = 0;
 876         else
 877                 connector->interlace_allowed = 1;
 878         connector->doublescan_allowed = 0;
 879
 880         if (HAS_PCH_SPLIT(dev))
 881                 crt->adpa_reg = PCH_ADPA;
 882         else if (IS_VALLEYVIEW(dev))
 883                 crt->adpa_reg = VLV_ADPA;
 884         else
 885                 crt->adpa_reg = ADPA;
 886
 887         crt->base.compute_config = intel_crt_compute_config;
 888         crt->base.disable = intel_disable_crt;
 889         crt->base.enable = intel_enable_crt;
 890         if (I915_HAS_HOTPLUG(dev))
 891                 crt->base.hpd_pin = HPD_CRT;
 892         if (HAS_DDI(dev)) {
 893                 crt->base.get_config = hsw_crt_get_config;
 894                 crt->base.get_hw_state = intel_ddi_get_hw_state;
 895                 crt->base.pre_enable = hsw_crt_pre_enable;
 896                 crt->base.post_disable = hsw_crt_post_disable;
 897         } else {
 898                 crt->base.get_config = intel_crt_get_config;
 899                 crt->base.get_hw_state = intel_crt_get_hw_state;
 900         }
 901         intel_connector->get_hw_state = intel_connector_get_hw_state;
 902         intel_connector->unregister = intel_connector_unregister;
 903
 904         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 905
 906         drm_connector_register(connector);
 907
 908         if (!I915_HAS_HOTPLUG(dev))
 909                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 910
 911         /*
 912          * Configure the automatic hotplug detection stuff
 913          */
 914         crt->force_hotplug_required = 0;
 915
 916         /*
 917          * TODO: find a proper way to discover whether we need to set the the
 918          * polarity and link reversal bits or not, instead of relying on the
 919          * BIOS.
 920          */
 921         if (HAS_PCH_LPT(dev)) {
 922                 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
 923                                  FDI_RX_LINK_REVERSAL_OVERRIDE;
 924
 925                 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
 926         }
 927
 928         intel_crt_reset(connector);
 929 }