drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/dmi.h>
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include "drmP.h"
  31 #include "drm.h"
  32 #include "drm_crtc.h"
  33 #include "drm_crtc_helper.h"
  34 #include "drm_edid.h"
  35 #include "intel_drv.h"
  36 #include "i915_drm.h"
  37 #include "i915_drv.h"
  38
  39 /* Here's the desired hotplug mode */
  40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  41                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  42                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  43                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  44                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  45                            ADPA_CRT_HOTPLUG_ENABLE)
  46
  47 struct intel_crt {
  48         struct intel_encoder base;
  49         bool force_hotplug_required;
  50 };
  51
  52 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  53 {
  54         return container_of(intel_attached_encoder(connector),
  55                             struct intel_crt, base);
  56 }
  57
  58 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  59 {
  60         struct drm_device *dev = encoder->dev;
  61         struct drm_i915_private *dev_priv = dev->dev_private;
  62         u32 temp, reg;
  63
  64         if (HAS_PCH_SPLIT(dev))
  65                 reg = PCH_ADPA;
  66         else
  67                 reg = ADPA;
  68
  69         temp = I915_READ(reg);
  70         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  71         temp &= ~ADPA_DAC_ENABLE;
  72
  73         switch (mode) {
  74         case DRM_MODE_DPMS_ON:
  75                 temp |= ADPA_DAC_ENABLE;
  76                 break;
  77         case DRM_MODE_DPMS_STANDBY:
  78                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  79                 break;
  80         case DRM_MODE_DPMS_SUSPEND:
  81                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  82                 break;
  83         case DRM_MODE_DPMS_OFF:
  84                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  85                 break;
  86         }
  87
  88         I915_WRITE(reg, temp);
  89 }
  90
  91 static int intel_crt_mode_valid(struct drm_connector *connector,
  92                                 struct drm_display_mode *mode)
  93 {
  94         struct drm_device *dev = connector->dev;
  95
  96         int max_clock = 0;
  97         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  98                 return MODE_NO_DBLESCAN;
  99
 100         if (mode->clock < 25000)
 101                 return MODE_CLOCK_LOW;
 102
 103         if (IS_GEN2(dev))
 104                 max_clock = 350000;
 105         else
 106                 max_clock = 400000;
 107         if (mode->clock > max_clock)
 108                 return MODE_CLOCK_HIGH;
 109
 110         return MODE_OK;
 111 }
 112
 113 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 114                                  struct drm_display_mode *mode,
 115                                  struct drm_display_mode *adjusted_mode)
 116 {
 117         return true;
 118 }
 119
 120 static void intel_crt_mode_set(struct drm_encoder *encoder,
 121                                struct drm_display_mode *mode,
 122                                struct drm_display_mode *adjusted_mode)
 123 {
 124
 125         struct drm_device *dev = encoder->dev;
 126         struct drm_crtc *crtc = encoder->crtc;
 127         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 128         struct drm_i915_private *dev_priv = dev->dev_private;
 129         int dpll_md_reg;
 130         u32 adpa, dpll_md;
 131         u32 adpa_reg;
 132
 133         dpll_md_reg = DPLL_MD(intel_crtc->pipe);
 134
 135         if (HAS_PCH_SPLIT(dev))
 136                 adpa_reg = PCH_ADPA;
 137         else
 138                 adpa_reg = ADPA;
 139
 140         /*
 141          * Disable separate mode multiplier used when cloning SDVO to CRT
 142          * XXX this needs to be adjusted when we really are cloning
 143          */
 144         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 145                 dpll_md = I915_READ(dpll_md_reg);
 146                 I915_WRITE(dpll_md_reg,
 147                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 148         }
 149
 150         adpa = ADPA_HOTPLUG_BITS;
 151         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 152                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 153         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 154                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 155
 156         /* For CPT allow 3 pipe config, for others just use A or B */
 157         if (HAS_PCH_CPT(dev))
 158                 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
 159         else if (intel_crtc->pipe == 0)
 160                 adpa |= ADPA_PIPE_A_SELECT;
 161         else
 162                 adpa |= ADPA_PIPE_B_SELECT;
 163
 164         if (!HAS_PCH_SPLIT(dev))
 165                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 166
 167         I915_WRITE(adpa_reg, adpa);
 168 }
 169
 170 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 171 {
 172         struct drm_device *dev = connector->dev;
 173         struct intel_crt *crt = intel_attached_crt(connector);
 174         struct drm_i915_private *dev_priv = dev->dev_private;
 175         u32 adpa;
 176         bool ret;
 177
 178         /* The first time through, trigger an explicit detection cycle */
 179         if (crt->force_hotplug_required) {
 180                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 181                 u32 save_adpa;
 182
 183                 crt->force_hotplug_required = 0;
 184
 185                 save_adpa = adpa = I915_READ(PCH_ADPA);
 186                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 187
 188                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 189                 if (turn_off_dac)
 190                         adpa &= ~ADPA_DAC_ENABLE;
 191
 192                 I915_WRITE(PCH_ADPA, adpa);
 193
 194                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 195                              1000))
 196                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 197
 198                 if (turn_off_dac) {
 199                         I915_WRITE(PCH_ADPA, save_adpa);
 200                         POSTING_READ(PCH_ADPA);
 201                 }
 202         }
 203
 204         /* Check the status to see if both blue and green are on now */
 205         adpa = I915_READ(PCH_ADPA);
 206         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 207                 ret = true;
 208         else
 209                 ret = false;
 210         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 211
 212         return ret;
 213 }
 214
 215 /**
 216  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 217  *
 218  * Not for i915G/i915GM
 219  *
 220  * \return true if CRT is connected.
 221  * \return false if CRT is disconnected.
 222  */
 223 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 224 {
 225         struct drm_device *dev = connector->dev;
 226         struct drm_i915_private *dev_priv = dev->dev_private;
 227         u32 hotplug_en, orig, stat;
 228         bool ret = false;
 229         int i, tries = 0;
 230
 231         if (HAS_PCH_SPLIT(dev))
 232                 return intel_ironlake_crt_detect_hotplug(connector);
 233
 234         /*
 235          * On 4 series desktop, CRT detect sequence need to be done twice
 236          * to get a reliable result.
 237          */
 238
 239         if (IS_G4X(dev) && !IS_GM45(dev))
 240                 tries = 2;
 241         else
 242                 tries = 1;
 243         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 244         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 245
 246         for (i = 0; i < tries ; i++) {
 247                 /* turn on the FORCE_DETECT */
 248                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 249                 /* wait for FORCE_DETECT to go off */
 250                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 251                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 252                              1000))
 253                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 254         }
 255
 256         stat = I915_READ(PORT_HOTPLUG_STAT);
 257         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 258                 ret = true;
 259
 260         /* clear the interrupt we just generated, if any */
 261         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 262
 263         /* and put the bits back */
 264         I915_WRITE(PORT_HOTPLUG_EN, orig);
 265
 266         return ret;
 267 }
 268
 269 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 270 {
 271         struct intel_crt *crt = intel_attached_crt(connector);
 272         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 273
 274         /* CRT should always be at 0, but check anyway */
 275         if (crt->base.type != INTEL_OUTPUT_ANALOG)
 276                 return false;
 277
 278         if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
 279                 struct edid *edid;
 280                 bool is_digital = false;
 281
 282                 edid = drm_get_edid(connector,
 283                         &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 284                 /*
 285                  * This may be a DVI-I connector with a shared DDC
 286                  * link between analog and digital outputs, so we
 287                  * have to check the EDID input spec of the attached device.
 288                  *
 289                  * On the other hand, what should we do if it is a broken EDID?
 290                  */
 291                 if (edid != NULL) {
 292                         is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 293                         connector->display_info.raw_edid = NULL;
 294                         kfree(edid);
 295                 }
 296
 297                 if (!is_digital) {
 298                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 299                         return true;
 300                 } else {
 301                         DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
 302                 }
 303         }
 304
 305         return false;
 306 }
 307
 308 static enum drm_connector_status
 309 intel_crt_load_detect(struct intel_crt *crt)
 310 {
 311         struct drm_device *dev = crt->base.base.dev;
 312         struct drm_i915_private *dev_priv = dev->dev_private;
 313         uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
 314         uint32_t save_bclrpat;
 315         uint32_t save_vtotal;
 316         uint32_t vtotal, vactive;
 317         uint32_t vsample;
 318         uint32_t vblank, vblank_start, vblank_end;
 319         uint32_t dsl;
 320         uint32_t bclrpat_reg;
 321         uint32_t vtotal_reg;
 322         uint32_t vblank_reg;
 323         uint32_t vsync_reg;
 324         uint32_t pipeconf_reg;
 325         uint32_t pipe_dsl_reg;
 326         uint8_t st00;
 327         enum drm_connector_status status;
 328
 329         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 330
 331         bclrpat_reg = BCLRPAT(pipe);
 332         vtotal_reg = VTOTAL(pipe);
 333         vblank_reg = VBLANK(pipe);
 334         vsync_reg = VSYNC(pipe);
 335         pipeconf_reg = PIPECONF(pipe);
 336         pipe_dsl_reg = PIPEDSL(pipe);
 337
 338         save_bclrpat = I915_READ(bclrpat_reg);
 339         save_vtotal = I915_READ(vtotal_reg);
 340         vblank = I915_READ(vblank_reg);
 341
 342         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 343         vactive = (save_vtotal & 0x7ff) + 1;
 344
 345         vblank_start = (vblank & 0xfff) + 1;
 346         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 347
 348         /* Set the border color to purple. */
 349         I915_WRITE(bclrpat_reg, 0x500050);
 350
 351         if (!IS_GEN2(dev)) {
 352                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 353                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 354                 POSTING_READ(pipeconf_reg);
 355                 /* Wait for next Vblank to substitue
 356                  * border color for Color info */
 357                 intel_wait_for_vblank(dev, pipe);
 358                 st00 = I915_READ8(VGA_MSR_WRITE);
 359                 status = ((st00 & (1 << 4)) != 0) ?
 360                         connector_status_connected :
 361                         connector_status_disconnected;
 362
 363                 I915_WRITE(pipeconf_reg, pipeconf);
 364         } else {
 365                 bool restore_vblank = false;
 366                 int count, detect;
 367
 368                 /*
 369                 * If there isn't any border, add some.
 370                 * Yes, this will flicker
 371                 */
 372                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 373                         uint32_t vsync = I915_READ(vsync_reg);
 374                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 375
 376                         vblank_start = vsync_start;
 377                         I915_WRITE(vblank_reg,
 378                                    (vblank_start - 1) |
 379                                    ((vblank_end - 1) << 16));
 380                         restore_vblank = true;
 381                 }
 382                 /* sample in the vertical border, selecting the larger one */
 383                 if (vblank_start - vactive >= vtotal - vblank_end)
 384                         vsample = (vblank_start + vactive) >> 1;
 385                 else
 386                         vsample = (vtotal + vblank_end) >> 1;
 387
 388                 /*
 389                  * Wait for the border to be displayed
 390                  */
 391                 while (I915_READ(pipe_dsl_reg) >= vactive)
 392                         ;
 393                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 394                         ;
 395                 /*
 396                  * Watch ST00 for an entire scanline
 397                  */
 398                 detect = 0;
 399                 count = 0;
 400                 do {
 401                         count++;
 402                         /* Read the ST00 VGA status register */
 403                         st00 = I915_READ8(VGA_MSR_WRITE);
 404                         if (st00 & (1 << 4))
 405                                 detect++;
 406                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 407
 408                 /* restore vblank if necessary */
 409                 if (restore_vblank)
 410                         I915_WRITE(vblank_reg, vblank);
 411                 /*
 412                  * If more than 3/4 of the scanline detected a monitor,
 413                  * then it is assumed to be present. This works even on i830,
 414                  * where there isn't any way to force the border color across
 415                  * the screen
 416                  */
 417                 status = detect * 4 > count * 3 ?
 418                          connector_status_connected :
 419                          connector_status_disconnected;
 420         }
 421
 422         /* Restore previous settings */
 423         I915_WRITE(bclrpat_reg, save_bclrpat);
 424
 425         return status;
 426 }
 427
 428 static enum drm_connector_status
 429 intel_crt_detect(struct drm_connector *connector, bool force)
 430 {
 431         struct drm_device *dev = connector->dev;
 432         struct intel_crt *crt = intel_attached_crt(connector);
 433         enum drm_connector_status status;
 434         struct intel_load_detect_pipe tmp;
 435
 436         if (I915_HAS_HOTPLUG(dev)) {
 437                 if (intel_crt_detect_hotplug(connector)) {
 438                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 439                         return connector_status_connected;
 440                 } else {
 441                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 442                         return connector_status_disconnected;
 443                 }
 444         }
 445
 446         if (intel_crt_detect_ddc(connector))
 447                 return connector_status_connected;
 448
 449         if (!force)
 450                 return connector->status;
 451
 452         /* for pre-945g platforms use load detect */
 453         if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
 454                                        &tmp)) {
 455                 if (intel_crt_detect_ddc(connector))
 456                         status = connector_status_connected;
 457                 else
 458                         status = intel_crt_load_detect(crt);
 459                 intel_release_load_detect_pipe(&crt->base, connector,
 460                                                &tmp);
 461         } else
 462                 status = connector_status_unknown;
 463
 464         return status;
 465 }
 466
 467 static void intel_crt_destroy(struct drm_connector *connector)
 468 {
 469         drm_sysfs_connector_remove(connector);
 470         drm_connector_cleanup(connector);
 471         kfree(connector);
 472 }
 473
 474 static int intel_crt_get_modes(struct drm_connector *connector)
 475 {
 476         struct drm_device *dev = connector->dev;
 477         struct drm_i915_private *dev_priv = dev->dev_private;
 478         int ret;
 479
 480         ret = intel_ddc_get_modes(connector,
 481                                  &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 482         if (ret || !IS_G4X(dev))
 483                 return ret;
 484
 485         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 486         return intel_ddc_get_modes(connector,
 487                                    &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
 488 }
 489
 490 static int intel_crt_set_property(struct drm_connector *connector,
 491                                   struct drm_property *property,
 492                                   uint64_t value)
 493 {
 494         return 0;
 495 }
 496
 497 static void intel_crt_reset(struct drm_connector *connector)
 498 {
 499         struct drm_device *dev = connector->dev;
 500         struct intel_crt *crt = intel_attached_crt(connector);
 501
 502         if (HAS_PCH_SPLIT(dev))
 503                 crt->force_hotplug_required = 1;
 504 }
 505
 506 /*
 507  * Routines for controlling stuff on the analog port
 508  */
 509
 510 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 511         .dpms = intel_crt_dpms,
 512         .mode_fixup = intel_crt_mode_fixup,
 513         .prepare = intel_encoder_prepare,
 514         .commit = intel_encoder_commit,
 515         .mode_set = intel_crt_mode_set,
 516 };
 517
 518 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 519         .reset = intel_crt_reset,
 520         .dpms = drm_helper_connector_dpms,
 521         .detect = intel_crt_detect,
 522         .fill_modes = drm_helper_probe_single_connector_modes,
 523         .destroy = intel_crt_destroy,
 524         .set_property = intel_crt_set_property,
 525 };
 526
 527 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 528         .mode_valid = intel_crt_mode_valid,
 529         .get_modes = intel_crt_get_modes,
 530         .best_encoder = intel_best_encoder,
 531 };
 532
 533 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 534         .destroy = intel_encoder_destroy,
 535 };
 536
 537 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
 538 {
 539         DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident);
 540         return 1;
 541 }
 542
 543 static const struct dmi_system_id intel_no_crt[] = {
 544         {
 545                 .callback = intel_no_crt_dmi_callback,
 546                 .ident = "ACER ZGB",
 547                 .matches = {
 548                         DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
 549                         DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
 550                 },
 551         },
 552         { }
 553 };
 554
 555 void intel_crt_init(struct drm_device *dev)
 556 {
 557         struct drm_connector *connector;
 558         struct intel_crt *crt;
 559         struct intel_connector *intel_connector;
 560         struct drm_i915_private *dev_priv = dev->dev_private;
 561
 562         /* Skip machines without VGA that falsely report hotplug events */
 563         if (dmi_check_system(intel_no_crt))
 564                 return;
 565
 566         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 567         if (!crt)
 568                 return;
 569
 570         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 571         if (!intel_connector) {
 572                 kfree(crt);
 573                 return;
 574         }
 575
 576         connector = &intel_connector->base;
 577         drm_connector_init(dev, &intel_connector->base,
 578                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 579
 580         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 581                          DRM_MODE_ENCODER_DAC);
 582
 583         intel_connector_attach_encoder(intel_connector, &crt->base);
 584
 585         crt->base.type = INTEL_OUTPUT_ANALOG;
 586         crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
 587                                 1 << INTEL_ANALOG_CLONE_BIT |
 588                                 1 << INTEL_SDVO_LVDS_CLONE_BIT);
 589         crt->base.crtc_mask = (1 << 0) | (1 << 1);
 590         if (IS_GEN2(dev))
 591                 connector->interlace_allowed = 0;
 592         else
 593                 connector->interlace_allowed = 1;
 594         connector->doublescan_allowed = 0;
 595
 596         drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
 597         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 598
 599         drm_sysfs_connector_add(connector);
 600
 601         if (I915_HAS_HOTPLUG(dev))
 602                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 603         else
 604                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 605
 606         /*
 607          * Configure the automatic hotplug detection stuff
 608          */
 609         crt->force_hotplug_required = 0;
 610         if (HAS_PCH_SPLIT(dev)) {
 611                 u32 adpa;
 612
 613                 adpa = I915_READ(PCH_ADPA);
 614                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 615                 adpa |= ADPA_HOTPLUG_BITS;
 616                 I915_WRITE(PCH_ADPA, adpa);
 617                 POSTING_READ(PCH_ADPA);
 618
 619                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 620                 crt->force_hotplug_required = 1;
 621         }
 622
 623         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 624 }