2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base
;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector
*connector
;
51 bool force_hotplug_required
;
55 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
57 return container_of(encoder
, struct intel_crt
, base
);
60 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
62 return intel_encoder_to_crt(intel_attached_encoder(connector
));
65 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
68 struct drm_device
*dev
= encoder
->base
.dev
;
69 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
70 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
71 enum intel_display_power_domain power_domain
;
74 power_domain
= intel_display_port_power_domain(encoder
);
75 if (!intel_display_power_enabled(dev_priv
, power_domain
))
78 tmp
= I915_READ(crt
->adpa_reg
);
80 if (!(tmp
& ADPA_DAC_ENABLE
))
84 *pipe
= PORT_TO_PIPE_CPT(tmp
);
86 *pipe
= PORT_TO_PIPE(tmp
);
91 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
93 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
94 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
97 tmp
= I915_READ(crt
->adpa_reg
);
99 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
100 flags
|= DRM_MODE_FLAG_PHSYNC
;
102 flags
|= DRM_MODE_FLAG_NHSYNC
;
104 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
105 flags
|= DRM_MODE_FLAG_PVSYNC
;
107 flags
|= DRM_MODE_FLAG_NVSYNC
;
112 static void intel_crt_get_config(struct intel_encoder
*encoder
,
113 struct intel_crtc_config
*pipe_config
)
115 struct drm_device
*dev
= encoder
->base
.dev
;
118 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
120 dotclock
= pipe_config
->port_clock
;
122 if (HAS_PCH_SPLIT(dev
))
123 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
125 pipe_config
->adjusted_mode
.crtc_clock
= dotclock
;
128 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
129 struct intel_crtc_config
*pipe_config
)
131 intel_ddi_get_config(encoder
, pipe_config
);
133 pipe_config
->adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
134 DRM_MODE_FLAG_NHSYNC
|
135 DRM_MODE_FLAG_PVSYNC
|
136 DRM_MODE_FLAG_NVSYNC
);
137 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
140 /* Note: The caller is required to filter out dpms modes not supported by the
142 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
144 struct drm_device
*dev
= encoder
->base
.dev
;
145 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
146 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
149 temp
= I915_READ(crt
->adpa_reg
);
150 temp
&= ~(ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
151 temp
&= ~ADPA_DAC_ENABLE
;
154 case DRM_MODE_DPMS_ON
:
155 temp
|= ADPA_DAC_ENABLE
;
157 case DRM_MODE_DPMS_STANDBY
:
158 temp
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
160 case DRM_MODE_DPMS_SUSPEND
:
161 temp
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
163 case DRM_MODE_DPMS_OFF
:
164 temp
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
168 I915_WRITE(crt
->adpa_reg
, temp
);
171 static void intel_disable_crt(struct intel_encoder
*encoder
)
173 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
176 static void intel_enable_crt(struct intel_encoder
*encoder
)
178 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
180 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
183 /* Special dpms function to support cloning between dvo/sdvo/crt. */
184 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
186 struct drm_device
*dev
= connector
->dev
;
187 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
188 struct drm_crtc
*crtc
;
191 /* PCH platforms and VLV only support on/off. */
192 if (INTEL_INFO(dev
)->gen
>= 5 && mode
!= DRM_MODE_DPMS_ON
)
193 mode
= DRM_MODE_DPMS_OFF
;
195 if (mode
== connector
->dpms
)
198 old_dpms
= connector
->dpms
;
199 connector
->dpms
= mode
;
201 /* Only need to change hw state when actually enabled */
202 crtc
= encoder
->base
.crtc
;
204 encoder
->connectors_active
= false;
208 /* We need the pipe to run for anything but OFF. */
209 if (mode
== DRM_MODE_DPMS_OFF
)
210 encoder
->connectors_active
= false;
212 encoder
->connectors_active
= true;
214 /* We call connector dpms manually below in case pipe dpms doesn't
215 * change due to cloning. */
216 if (mode
< old_dpms
) {
217 /* From off to on, enable the pipe first. */
218 intel_crtc_update_dpms(crtc
);
220 intel_crt_set_dpms(encoder
, mode
);
222 intel_crt_set_dpms(encoder
, mode
);
224 intel_crtc_update_dpms(crtc
);
227 intel_modeset_check_state(connector
->dev
);
230 static enum drm_mode_status
231 intel_crt_mode_valid(struct drm_connector
*connector
,
232 struct drm_display_mode
*mode
)
234 struct drm_device
*dev
= connector
->dev
;
237 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
238 return MODE_NO_DBLESCAN
;
240 if (mode
->clock
< 25000)
241 return MODE_CLOCK_LOW
;
247 if (mode
->clock
> max_clock
)
248 return MODE_CLOCK_HIGH
;
250 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
251 if (HAS_PCH_LPT(dev
) &&
252 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
253 return MODE_CLOCK_HIGH
;
258 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
259 struct intel_crtc_config
*pipe_config
)
261 struct drm_device
*dev
= encoder
->base
.dev
;
263 if (HAS_PCH_SPLIT(dev
))
264 pipe_config
->has_pch_encoder
= true;
266 /* LPT FDI RX only supports 8bpc. */
267 if (HAS_PCH_LPT(dev
))
268 pipe_config
->pipe_bpp
= 24;
270 /* FDI must always be 2.7 GHz */
272 pipe_config
->port_clock
= 135000 * 2;
277 static void intel_crt_mode_set(struct intel_encoder
*encoder
)
280 struct drm_device
*dev
= encoder
->base
.dev
;
281 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
282 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
283 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
284 struct drm_display_mode
*adjusted_mode
= &crtc
->config
.adjusted_mode
;
287 if (INTEL_INFO(dev
)->gen
>= 5)
288 adpa
= ADPA_HOTPLUG_BITS
;
292 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
293 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
294 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
295 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
297 /* For CPT allow 3 pipe config, for others just use A or B */
298 if (HAS_PCH_LPT(dev
))
299 ; /* Those bits don't exist here */
300 else if (HAS_PCH_CPT(dev
))
301 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
302 else if (crtc
->pipe
== 0)
303 adpa
|= ADPA_PIPE_A_SELECT
;
305 adpa
|= ADPA_PIPE_B_SELECT
;
307 if (!HAS_PCH_SPLIT(dev
))
308 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
310 I915_WRITE(crt
->adpa_reg
, adpa
);
313 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
315 struct drm_device
*dev
= connector
->dev
;
316 struct intel_crt
*crt
= intel_attached_crt(connector
);
317 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
321 /* The first time through, trigger an explicit detection cycle */
322 if (crt
->force_hotplug_required
) {
323 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
326 crt
->force_hotplug_required
= 0;
328 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
329 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
331 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
333 adpa
&= ~ADPA_DAC_ENABLE
;
335 I915_WRITE(crt
->adpa_reg
, adpa
);
337 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
339 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
342 I915_WRITE(crt
->adpa_reg
, save_adpa
);
343 POSTING_READ(crt
->adpa_reg
);
347 /* Check the status to see if both blue and green are on now */
348 adpa
= I915_READ(crt
->adpa_reg
);
349 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
353 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
358 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
360 struct drm_device
*dev
= connector
->dev
;
361 struct intel_crt
*crt
= intel_attached_crt(connector
);
362 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
367 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
368 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
370 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
372 I915_WRITE(crt
->adpa_reg
, adpa
);
374 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
376 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
377 I915_WRITE(crt
->adpa_reg
, save_adpa
);
380 /* Check the status to see if both blue and green are on now */
381 adpa
= I915_READ(crt
->adpa_reg
);
382 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
387 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
393 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
395 * Not for i915G/i915GM
397 * \return true if CRT is connected.
398 * \return false if CRT is disconnected.
400 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
402 struct drm_device
*dev
= connector
->dev
;
403 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
404 u32 hotplug_en
, orig
, stat
;
408 if (HAS_PCH_SPLIT(dev
))
409 return intel_ironlake_crt_detect_hotplug(connector
);
411 if (IS_VALLEYVIEW(dev
))
412 return valleyview_crt_detect_hotplug(connector
);
415 * On 4 series desktop, CRT detect sequence need to be done twice
416 * to get a reliable result.
419 if (IS_G4X(dev
) && !IS_GM45(dev
))
423 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
424 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
426 for (i
= 0; i
< tries
; i
++) {
427 /* turn on the FORCE_DETECT */
428 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
429 /* wait for FORCE_DETECT to go off */
430 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
431 CRT_HOTPLUG_FORCE_DETECT
) == 0,
433 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
436 stat
= I915_READ(PORT_HOTPLUG_STAT
);
437 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
440 /* clear the interrupt we just generated, if any */
441 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
443 /* and put the bits back */
444 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
449 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
450 struct i2c_adapter
*i2c
)
454 edid
= drm_get_edid(connector
, i2c
);
456 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
457 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
458 intel_gmbus_force_bit(i2c
, true);
459 edid
= drm_get_edid(connector
, i2c
);
460 intel_gmbus_force_bit(i2c
, false);
466 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
467 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
468 struct i2c_adapter
*adapter
)
473 edid
= intel_crt_get_edid(connector
, adapter
);
477 ret
= intel_connector_update_modes(connector
, edid
);
483 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
485 struct intel_crt
*crt
= intel_attached_crt(connector
);
486 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
488 struct i2c_adapter
*i2c
;
490 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
492 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
493 edid
= intel_crt_get_edid(connector
, i2c
);
496 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
499 * This may be a DVI-I connector with a shared DDC
500 * link between analog and digital outputs, so we
501 * have to check the EDID input spec of the attached device.
504 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
508 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
510 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
518 static enum drm_connector_status
519 intel_crt_load_detect(struct intel_crt
*crt
)
521 struct drm_device
*dev
= crt
->base
.base
.dev
;
522 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
523 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
524 uint32_t save_bclrpat
;
525 uint32_t save_vtotal
;
526 uint32_t vtotal
, vactive
;
528 uint32_t vblank
, vblank_start
, vblank_end
;
530 uint32_t bclrpat_reg
;
534 uint32_t pipeconf_reg
;
535 uint32_t pipe_dsl_reg
;
537 enum drm_connector_status status
;
539 DRM_DEBUG_KMS("starting load-detect on CRT\n");
541 bclrpat_reg
= BCLRPAT(pipe
);
542 vtotal_reg
= VTOTAL(pipe
);
543 vblank_reg
= VBLANK(pipe
);
544 vsync_reg
= VSYNC(pipe
);
545 pipeconf_reg
= PIPECONF(pipe
);
546 pipe_dsl_reg
= PIPEDSL(pipe
);
548 save_bclrpat
= I915_READ(bclrpat_reg
);
549 save_vtotal
= I915_READ(vtotal_reg
);
550 vblank
= I915_READ(vblank_reg
);
552 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
553 vactive
= (save_vtotal
& 0x7ff) + 1;
555 vblank_start
= (vblank
& 0xfff) + 1;
556 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
558 /* Set the border color to purple. */
559 I915_WRITE(bclrpat_reg
, 0x500050);
562 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
563 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
564 POSTING_READ(pipeconf_reg
);
565 /* Wait for next Vblank to substitue
566 * border color for Color info */
567 intel_wait_for_vblank(dev
, pipe
);
568 st00
= I915_READ8(VGA_MSR_WRITE
);
569 status
= ((st00
& (1 << 4)) != 0) ?
570 connector_status_connected
:
571 connector_status_disconnected
;
573 I915_WRITE(pipeconf_reg
, pipeconf
);
575 bool restore_vblank
= false;
579 * If there isn't any border, add some.
580 * Yes, this will flicker
582 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
583 uint32_t vsync
= I915_READ(vsync_reg
);
584 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
586 vblank_start
= vsync_start
;
587 I915_WRITE(vblank_reg
,
589 ((vblank_end
- 1) << 16));
590 restore_vblank
= true;
592 /* sample in the vertical border, selecting the larger one */
593 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
594 vsample
= (vblank_start
+ vactive
) >> 1;
596 vsample
= (vtotal
+ vblank_end
) >> 1;
599 * Wait for the border to be displayed
601 while (I915_READ(pipe_dsl_reg
) >= vactive
)
603 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
606 * Watch ST00 for an entire scanline
612 /* Read the ST00 VGA status register */
613 st00
= I915_READ8(VGA_MSR_WRITE
);
616 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
618 /* restore vblank if necessary */
620 I915_WRITE(vblank_reg
, vblank
);
622 * If more than 3/4 of the scanline detected a monitor,
623 * then it is assumed to be present. This works even on i830,
624 * where there isn't any way to force the border color across
627 status
= detect
* 4 > count
* 3 ?
628 connector_status_connected
:
629 connector_status_disconnected
;
632 /* Restore previous settings */
633 I915_WRITE(bclrpat_reg
, save_bclrpat
);
638 static enum drm_connector_status
639 intel_crt_detect(struct drm_connector
*connector
, bool force
)
641 struct drm_device
*dev
= connector
->dev
;
642 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
643 struct intel_crt
*crt
= intel_attached_crt(connector
);
644 struct intel_encoder
*intel_encoder
= &crt
->base
;
645 enum intel_display_power_domain power_domain
;
646 enum drm_connector_status status
;
647 struct intel_load_detect_pipe tmp
;
649 intel_runtime_pm_get(dev_priv
);
651 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
652 connector
->base
.id
, drm_get_connector_name(connector
),
655 power_domain
= intel_display_port_power_domain(intel_encoder
);
656 intel_display_power_get(dev_priv
, power_domain
);
658 if (I915_HAS_HOTPLUG(dev
)) {
659 /* We can not rely on the HPD pin always being correctly wired
660 * up, for example many KVM do not pass it through, and so
661 * only trust an assertion that the monitor is connected.
663 if (intel_crt_detect_hotplug(connector
)) {
664 DRM_DEBUG_KMS("CRT detected via hotplug\n");
665 status
= connector_status_connected
;
668 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
671 if (intel_crt_detect_ddc(connector
)) {
672 status
= connector_status_connected
;
676 /* Load detection is broken on HPD capable machines. Whoever wants a
677 * broken monitor (without edid) to work behind a broken kvm (that fails
678 * to have the right resistors for HP detection) needs to fix this up.
679 * For now just bail out. */
680 if (I915_HAS_HOTPLUG(dev
)) {
681 status
= connector_status_disconnected
;
686 status
= connector
->status
;
690 /* for pre-945g platforms use load detect */
691 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
)) {
692 if (intel_crt_detect_ddc(connector
))
693 status
= connector_status_connected
;
695 status
= intel_crt_load_detect(crt
);
696 intel_release_load_detect_pipe(connector
, &tmp
);
698 status
= connector_status_unknown
;
701 intel_display_power_put(dev_priv
, power_domain
);
702 intel_runtime_pm_put(dev_priv
);
707 static void intel_crt_destroy(struct drm_connector
*connector
)
709 drm_connector_cleanup(connector
);
713 static int intel_crt_get_modes(struct drm_connector
*connector
)
715 struct drm_device
*dev
= connector
->dev
;
716 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
717 struct intel_crt
*crt
= intel_attached_crt(connector
);
718 struct intel_encoder
*intel_encoder
= &crt
->base
;
719 enum intel_display_power_domain power_domain
;
721 struct i2c_adapter
*i2c
;
723 power_domain
= intel_display_port_power_domain(intel_encoder
);
724 intel_display_power_get(dev_priv
, power_domain
);
726 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
727 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
728 if (ret
|| !IS_G4X(dev
))
731 /* Try to probe digital port for output in DVI-I -> VGA mode. */
732 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
733 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
736 intel_display_power_put(dev_priv
, power_domain
);
741 static int intel_crt_set_property(struct drm_connector
*connector
,
742 struct drm_property
*property
,
748 static void intel_crt_reset(struct drm_connector
*connector
)
750 struct drm_device
*dev
= connector
->dev
;
751 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
752 struct intel_crt
*crt
= intel_attached_crt(connector
);
754 if (INTEL_INFO(dev
)->gen
>= 5) {
757 adpa
= I915_READ(crt
->adpa_reg
);
758 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
759 adpa
|= ADPA_HOTPLUG_BITS
;
760 I915_WRITE(crt
->adpa_reg
, adpa
);
761 POSTING_READ(crt
->adpa_reg
);
763 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
764 crt
->force_hotplug_required
= 1;
770 * Routines for controlling stuff on the analog port
773 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
774 .reset
= intel_crt_reset
,
775 .dpms
= intel_crt_dpms
,
776 .detect
= intel_crt_detect
,
777 .fill_modes
= drm_helper_probe_single_connector_modes
,
778 .destroy
= intel_crt_destroy
,
779 .set_property
= intel_crt_set_property
,
782 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
783 .mode_valid
= intel_crt_mode_valid
,
784 .get_modes
= intel_crt_get_modes
,
785 .best_encoder
= intel_best_encoder
,
788 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
789 .destroy
= intel_encoder_destroy
,
792 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
794 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
798 static const struct dmi_system_id intel_no_crt
[] = {
800 .callback
= intel_no_crt_dmi_callback
,
803 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
804 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
810 void intel_crt_init(struct drm_device
*dev
)
812 struct drm_connector
*connector
;
813 struct intel_crt
*crt
;
814 struct intel_connector
*intel_connector
;
815 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
817 /* Skip machines without VGA that falsely report hotplug events */
818 if (dmi_check_system(intel_no_crt
))
821 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
825 intel_connector
= kzalloc(sizeof(*intel_connector
), GFP_KERNEL
);
826 if (!intel_connector
) {
831 connector
= &intel_connector
->base
;
832 crt
->connector
= intel_connector
;
833 drm_connector_init(dev
, &intel_connector
->base
,
834 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
836 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
837 DRM_MODE_ENCODER_DAC
);
839 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
841 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
842 crt
->base
.cloneable
= true;
844 crt
->base
.crtc_mask
= (1 << 0);
846 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
849 connector
->interlace_allowed
= 0;
851 connector
->interlace_allowed
= 1;
852 connector
->doublescan_allowed
= 0;
854 if (HAS_PCH_SPLIT(dev
))
855 crt
->adpa_reg
= PCH_ADPA
;
856 else if (IS_VALLEYVIEW(dev
))
857 crt
->adpa_reg
= VLV_ADPA
;
859 crt
->adpa_reg
= ADPA
;
861 crt
->base
.compute_config
= intel_crt_compute_config
;
862 crt
->base
.mode_set
= intel_crt_mode_set
;
863 crt
->base
.disable
= intel_disable_crt
;
864 crt
->base
.enable
= intel_enable_crt
;
865 if (I915_HAS_HOTPLUG(dev
))
866 crt
->base
.hpd_pin
= HPD_CRT
;
868 crt
->base
.get_config
= hsw_crt_get_config
;
869 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
871 crt
->base
.get_config
= intel_crt_get_config
;
872 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
874 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
875 intel_connector
->unregister
= intel_connector_unregister
;
877 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
879 drm_sysfs_connector_add(connector
);
881 if (!I915_HAS_HOTPLUG(dev
))
882 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
885 * Configure the automatic hotplug detection stuff
887 crt
->force_hotplug_required
= 0;
890 * TODO: find a proper way to discover whether we need to set the the
891 * polarity and link reversal bits or not, instead of relying on the
894 if (HAS_PCH_LPT(dev
)) {
895 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
896 FDI_RX_LINK_REVERSAL_OVERRIDE
;
898 dev_priv
->fdi_rx_config
= I915_READ(_FDI_RXA_CTL
) & fdi_config
;
901 intel_crt_reset(connector
);