2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base
;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector
*connector
;
51 bool force_hotplug_required
;
55 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
57 return container_of(encoder
, struct intel_crt
, base
);
60 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
62 return intel_encoder_to_crt(intel_attached_encoder(connector
));
65 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
68 struct drm_device
*dev
= encoder
->base
.dev
;
69 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
70 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
71 enum intel_display_power_domain power_domain
;
74 power_domain
= intel_display_port_power_domain(encoder
);
75 if (!intel_display_power_enabled(dev_priv
, power_domain
))
78 tmp
= I915_READ(crt
->adpa_reg
);
80 if (!(tmp
& ADPA_DAC_ENABLE
))
84 *pipe
= PORT_TO_PIPE_CPT(tmp
);
86 *pipe
= PORT_TO_PIPE(tmp
);
91 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
93 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
94 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
97 tmp
= I915_READ(crt
->adpa_reg
);
99 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
100 flags
|= DRM_MODE_FLAG_PHSYNC
;
102 flags
|= DRM_MODE_FLAG_NHSYNC
;
104 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
105 flags
|= DRM_MODE_FLAG_PVSYNC
;
107 flags
|= DRM_MODE_FLAG_NVSYNC
;
112 static void intel_crt_get_config(struct intel_encoder
*encoder
,
113 struct intel_crtc_config
*pipe_config
)
115 struct drm_device
*dev
= encoder
->base
.dev
;
118 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
120 dotclock
= pipe_config
->port_clock
;
122 if (HAS_PCH_SPLIT(dev
))
123 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
125 pipe_config
->adjusted_mode
.crtc_clock
= dotclock
;
128 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
129 struct intel_crtc_config
*pipe_config
)
131 intel_ddi_get_config(encoder
, pipe_config
);
133 pipe_config
->adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
134 DRM_MODE_FLAG_NHSYNC
|
135 DRM_MODE_FLAG_PVSYNC
|
136 DRM_MODE_FLAG_NVSYNC
);
137 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
140 /* Note: The caller is required to filter out dpms modes not supported by the
142 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
144 struct drm_device
*dev
= encoder
->base
.dev
;
145 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
146 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
147 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
148 struct drm_display_mode
*adjusted_mode
= &crtc
->config
.adjusted_mode
;
151 if (INTEL_INFO(dev
)->gen
>= 5)
152 adpa
= ADPA_HOTPLUG_BITS
;
156 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
157 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
158 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
159 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
161 /* For CPT allow 3 pipe config, for others just use A or B */
162 if (HAS_PCH_LPT(dev
))
163 ; /* Those bits don't exist here */
164 else if (HAS_PCH_CPT(dev
))
165 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
166 else if (crtc
->pipe
== 0)
167 adpa
|= ADPA_PIPE_A_SELECT
;
169 adpa
|= ADPA_PIPE_B_SELECT
;
171 if (!HAS_PCH_SPLIT(dev
))
172 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
175 case DRM_MODE_DPMS_ON
:
176 adpa
|= ADPA_DAC_ENABLE
;
178 case DRM_MODE_DPMS_STANDBY
:
179 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
181 case DRM_MODE_DPMS_SUSPEND
:
182 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
184 case DRM_MODE_DPMS_OFF
:
185 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
189 I915_WRITE(crt
->adpa_reg
, adpa
);
192 static void intel_disable_crt(struct intel_encoder
*encoder
)
194 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
197 static void intel_enable_crt(struct intel_encoder
*encoder
)
199 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
201 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
204 /* Special dpms function to support cloning between dvo/sdvo/crt. */
205 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
207 struct drm_device
*dev
= connector
->dev
;
208 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
209 struct drm_crtc
*crtc
;
212 /* PCH platforms and VLV only support on/off. */
213 if (INTEL_INFO(dev
)->gen
>= 5 && mode
!= DRM_MODE_DPMS_ON
)
214 mode
= DRM_MODE_DPMS_OFF
;
216 if (mode
== connector
->dpms
)
219 old_dpms
= connector
->dpms
;
220 connector
->dpms
= mode
;
222 /* Only need to change hw state when actually enabled */
223 crtc
= encoder
->base
.crtc
;
225 encoder
->connectors_active
= false;
229 /* We need the pipe to run for anything but OFF. */
230 if (mode
== DRM_MODE_DPMS_OFF
)
231 encoder
->connectors_active
= false;
233 encoder
->connectors_active
= true;
235 /* We call connector dpms manually below in case pipe dpms doesn't
236 * change due to cloning. */
237 if (mode
< old_dpms
) {
238 /* From off to on, enable the pipe first. */
239 intel_crtc_update_dpms(crtc
);
241 intel_crt_set_dpms(encoder
, mode
);
243 intel_crt_set_dpms(encoder
, mode
);
245 intel_crtc_update_dpms(crtc
);
248 intel_modeset_check_state(connector
->dev
);
251 static enum drm_mode_status
252 intel_crt_mode_valid(struct drm_connector
*connector
,
253 struct drm_display_mode
*mode
)
255 struct drm_device
*dev
= connector
->dev
;
258 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
259 return MODE_NO_DBLESCAN
;
261 if (mode
->clock
< 25000)
262 return MODE_CLOCK_LOW
;
268 if (mode
->clock
> max_clock
)
269 return MODE_CLOCK_HIGH
;
271 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
272 if (HAS_PCH_LPT(dev
) &&
273 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
274 return MODE_CLOCK_HIGH
;
279 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
280 struct intel_crtc_config
*pipe_config
)
282 struct drm_device
*dev
= encoder
->base
.dev
;
284 if (HAS_PCH_SPLIT(dev
))
285 pipe_config
->has_pch_encoder
= true;
287 /* LPT FDI RX only supports 8bpc. */
288 if (HAS_PCH_LPT(dev
))
289 pipe_config
->pipe_bpp
= 24;
291 /* FDI must always be 2.7 GHz */
293 pipe_config
->port_clock
= 135000 * 2;
298 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
300 struct drm_device
*dev
= connector
->dev
;
301 struct intel_crt
*crt
= intel_attached_crt(connector
);
302 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
306 /* The first time through, trigger an explicit detection cycle */
307 if (crt
->force_hotplug_required
) {
308 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
311 crt
->force_hotplug_required
= 0;
313 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
314 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
316 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
318 adpa
&= ~ADPA_DAC_ENABLE
;
320 I915_WRITE(crt
->adpa_reg
, adpa
);
322 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
324 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
327 I915_WRITE(crt
->adpa_reg
, save_adpa
);
328 POSTING_READ(crt
->adpa_reg
);
332 /* Check the status to see if both blue and green are on now */
333 adpa
= I915_READ(crt
->adpa_reg
);
334 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
338 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
343 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
345 struct drm_device
*dev
= connector
->dev
;
346 struct intel_crt
*crt
= intel_attached_crt(connector
);
347 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
352 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
353 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
355 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
357 I915_WRITE(crt
->adpa_reg
, adpa
);
359 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
361 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
362 I915_WRITE(crt
->adpa_reg
, save_adpa
);
365 /* Check the status to see if both blue and green are on now */
366 adpa
= I915_READ(crt
->adpa_reg
);
367 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
372 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
378 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
380 * Not for i915G/i915GM
382 * \return true if CRT is connected.
383 * \return false if CRT is disconnected.
385 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
387 struct drm_device
*dev
= connector
->dev
;
388 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
389 u32 hotplug_en
, orig
, stat
;
393 if (HAS_PCH_SPLIT(dev
))
394 return intel_ironlake_crt_detect_hotplug(connector
);
396 if (IS_VALLEYVIEW(dev
))
397 return valleyview_crt_detect_hotplug(connector
);
400 * On 4 series desktop, CRT detect sequence need to be done twice
401 * to get a reliable result.
404 if (IS_G4X(dev
) && !IS_GM45(dev
))
408 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
409 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
411 for (i
= 0; i
< tries
; i
++) {
412 /* turn on the FORCE_DETECT */
413 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
414 /* wait for FORCE_DETECT to go off */
415 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
416 CRT_HOTPLUG_FORCE_DETECT
) == 0,
418 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
421 stat
= I915_READ(PORT_HOTPLUG_STAT
);
422 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
425 /* clear the interrupt we just generated, if any */
426 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
428 /* and put the bits back */
429 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
434 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
435 struct i2c_adapter
*i2c
)
439 edid
= drm_get_edid(connector
, i2c
);
441 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
442 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
443 intel_gmbus_force_bit(i2c
, true);
444 edid
= drm_get_edid(connector
, i2c
);
445 intel_gmbus_force_bit(i2c
, false);
451 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
452 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
453 struct i2c_adapter
*adapter
)
458 edid
= intel_crt_get_edid(connector
, adapter
);
462 ret
= intel_connector_update_modes(connector
, edid
);
468 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
470 struct intel_crt
*crt
= intel_attached_crt(connector
);
471 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
473 struct i2c_adapter
*i2c
;
475 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
477 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
478 edid
= intel_crt_get_edid(connector
, i2c
);
481 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
484 * This may be a DVI-I connector with a shared DDC
485 * link between analog and digital outputs, so we
486 * have to check the EDID input spec of the attached device.
489 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
493 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
495 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
503 static enum drm_connector_status
504 intel_crt_load_detect(struct intel_crt
*crt
)
506 struct drm_device
*dev
= crt
->base
.base
.dev
;
507 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
508 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
509 uint32_t save_bclrpat
;
510 uint32_t save_vtotal
;
511 uint32_t vtotal
, vactive
;
513 uint32_t vblank
, vblank_start
, vblank_end
;
515 uint32_t bclrpat_reg
;
519 uint32_t pipeconf_reg
;
520 uint32_t pipe_dsl_reg
;
522 enum drm_connector_status status
;
524 DRM_DEBUG_KMS("starting load-detect on CRT\n");
526 bclrpat_reg
= BCLRPAT(pipe
);
527 vtotal_reg
= VTOTAL(pipe
);
528 vblank_reg
= VBLANK(pipe
);
529 vsync_reg
= VSYNC(pipe
);
530 pipeconf_reg
= PIPECONF(pipe
);
531 pipe_dsl_reg
= PIPEDSL(pipe
);
533 save_bclrpat
= I915_READ(bclrpat_reg
);
534 save_vtotal
= I915_READ(vtotal_reg
);
535 vblank
= I915_READ(vblank_reg
);
537 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
538 vactive
= (save_vtotal
& 0x7ff) + 1;
540 vblank_start
= (vblank
& 0xfff) + 1;
541 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
543 /* Set the border color to purple. */
544 I915_WRITE(bclrpat_reg
, 0x500050);
547 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
548 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
549 POSTING_READ(pipeconf_reg
);
550 /* Wait for next Vblank to substitue
551 * border color for Color info */
552 intel_wait_for_vblank(dev
, pipe
);
553 st00
= I915_READ8(VGA_MSR_WRITE
);
554 status
= ((st00
& (1 << 4)) != 0) ?
555 connector_status_connected
:
556 connector_status_disconnected
;
558 I915_WRITE(pipeconf_reg
, pipeconf
);
560 bool restore_vblank
= false;
564 * If there isn't any border, add some.
565 * Yes, this will flicker
567 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
568 uint32_t vsync
= I915_READ(vsync_reg
);
569 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
571 vblank_start
= vsync_start
;
572 I915_WRITE(vblank_reg
,
574 ((vblank_end
- 1) << 16));
575 restore_vblank
= true;
577 /* sample in the vertical border, selecting the larger one */
578 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
579 vsample
= (vblank_start
+ vactive
) >> 1;
581 vsample
= (vtotal
+ vblank_end
) >> 1;
584 * Wait for the border to be displayed
586 while (I915_READ(pipe_dsl_reg
) >= vactive
)
588 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
591 * Watch ST00 for an entire scanline
597 /* Read the ST00 VGA status register */
598 st00
= I915_READ8(VGA_MSR_WRITE
);
601 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
603 /* restore vblank if necessary */
605 I915_WRITE(vblank_reg
, vblank
);
607 * If more than 3/4 of the scanline detected a monitor,
608 * then it is assumed to be present. This works even on i830,
609 * where there isn't any way to force the border color across
612 status
= detect
* 4 > count
* 3 ?
613 connector_status_connected
:
614 connector_status_disconnected
;
617 /* Restore previous settings */
618 I915_WRITE(bclrpat_reg
, save_bclrpat
);
623 static enum drm_connector_status
624 intel_crt_detect(struct drm_connector
*connector
, bool force
)
626 struct drm_device
*dev
= connector
->dev
;
627 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
628 struct intel_crt
*crt
= intel_attached_crt(connector
);
629 struct intel_encoder
*intel_encoder
= &crt
->base
;
630 enum intel_display_power_domain power_domain
;
631 enum drm_connector_status status
;
632 struct intel_load_detect_pipe tmp
;
633 struct drm_modeset_acquire_ctx ctx
;
635 intel_runtime_pm_get(dev_priv
);
637 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
638 connector
->base
.id
, connector
->name
,
641 power_domain
= intel_display_port_power_domain(intel_encoder
);
642 intel_display_power_get(dev_priv
, power_domain
);
644 if (I915_HAS_HOTPLUG(dev
)) {
645 /* We can not rely on the HPD pin always being correctly wired
646 * up, for example many KVM do not pass it through, and so
647 * only trust an assertion that the monitor is connected.
649 if (intel_crt_detect_hotplug(connector
)) {
650 DRM_DEBUG_KMS("CRT detected via hotplug\n");
651 status
= connector_status_connected
;
654 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
657 if (intel_crt_detect_ddc(connector
)) {
658 status
= connector_status_connected
;
662 /* Load detection is broken on HPD capable machines. Whoever wants a
663 * broken monitor (without edid) to work behind a broken kvm (that fails
664 * to have the right resistors for HP detection) needs to fix this up.
665 * For now just bail out. */
666 if (I915_HAS_HOTPLUG(dev
)) {
667 status
= connector_status_disconnected
;
672 status
= connector
->status
;
676 /* for pre-945g platforms use load detect */
677 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
678 if (intel_crt_detect_ddc(connector
))
679 status
= connector_status_connected
;
681 status
= intel_crt_load_detect(crt
);
682 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
684 status
= connector_status_unknown
;
687 intel_display_power_put(dev_priv
, power_domain
);
688 intel_runtime_pm_put(dev_priv
);
693 static void intel_crt_destroy(struct drm_connector
*connector
)
695 drm_connector_cleanup(connector
);
699 static int intel_crt_get_modes(struct drm_connector
*connector
)
701 struct drm_device
*dev
= connector
->dev
;
702 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
703 struct intel_crt
*crt
= intel_attached_crt(connector
);
704 struct intel_encoder
*intel_encoder
= &crt
->base
;
705 enum intel_display_power_domain power_domain
;
707 struct i2c_adapter
*i2c
;
709 power_domain
= intel_display_port_power_domain(intel_encoder
);
710 intel_display_power_get(dev_priv
, power_domain
);
712 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
713 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
714 if (ret
|| !IS_G4X(dev
))
717 /* Try to probe digital port for output in DVI-I -> VGA mode. */
718 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
719 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
722 intel_display_power_put(dev_priv
, power_domain
);
727 static int intel_crt_set_property(struct drm_connector
*connector
,
728 struct drm_property
*property
,
734 static void intel_crt_reset(struct drm_connector
*connector
)
736 struct drm_device
*dev
= connector
->dev
;
737 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
738 struct intel_crt
*crt
= intel_attached_crt(connector
);
740 if (INTEL_INFO(dev
)->gen
>= 5) {
743 adpa
= I915_READ(crt
->adpa_reg
);
744 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
745 adpa
|= ADPA_HOTPLUG_BITS
;
746 I915_WRITE(crt
->adpa_reg
, adpa
);
747 POSTING_READ(crt
->adpa_reg
);
749 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
750 crt
->force_hotplug_required
= 1;
756 * Routines for controlling stuff on the analog port
759 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
760 .reset
= intel_crt_reset
,
761 .dpms
= intel_crt_dpms
,
762 .detect
= intel_crt_detect
,
763 .fill_modes
= drm_helper_probe_single_connector_modes
,
764 .destroy
= intel_crt_destroy
,
765 .set_property
= intel_crt_set_property
,
768 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
769 .mode_valid
= intel_crt_mode_valid
,
770 .get_modes
= intel_crt_get_modes
,
771 .best_encoder
= intel_best_encoder
,
774 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
775 .destroy
= intel_encoder_destroy
,
778 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
780 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
784 static const struct dmi_system_id intel_no_crt
[] = {
786 .callback
= intel_no_crt_dmi_callback
,
789 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
790 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
794 .callback
= intel_no_crt_dmi_callback
,
795 .ident
= "DELL XPS 8700",
797 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
798 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
804 void intel_crt_init(struct drm_device
*dev
)
806 struct drm_connector
*connector
;
807 struct intel_crt
*crt
;
808 struct intel_connector
*intel_connector
;
809 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
811 /* Skip machines without VGA that falsely report hotplug events */
812 if (dmi_check_system(intel_no_crt
))
815 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
819 intel_connector
= kzalloc(sizeof(*intel_connector
), GFP_KERNEL
);
820 if (!intel_connector
) {
825 connector
= &intel_connector
->base
;
826 crt
->connector
= intel_connector
;
827 drm_connector_init(dev
, &intel_connector
->base
,
828 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
830 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
831 DRM_MODE_ENCODER_DAC
);
833 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
835 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
836 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
838 crt
->base
.crtc_mask
= (1 << 0);
840 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
843 connector
->interlace_allowed
= 0;
845 connector
->interlace_allowed
= 1;
846 connector
->doublescan_allowed
= 0;
848 if (HAS_PCH_SPLIT(dev
))
849 crt
->adpa_reg
= PCH_ADPA
;
850 else if (IS_VALLEYVIEW(dev
))
851 crt
->adpa_reg
= VLV_ADPA
;
853 crt
->adpa_reg
= ADPA
;
855 crt
->base
.compute_config
= intel_crt_compute_config
;
856 crt
->base
.disable
= intel_disable_crt
;
857 crt
->base
.enable
= intel_enable_crt
;
858 if (I915_HAS_HOTPLUG(dev
))
859 crt
->base
.hpd_pin
= HPD_CRT
;
861 crt
->base
.get_config
= hsw_crt_get_config
;
862 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
864 crt
->base
.get_config
= intel_crt_get_config
;
865 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
867 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
868 intel_connector
->unregister
= intel_connector_unregister
;
870 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
872 drm_sysfs_connector_add(connector
);
874 if (!I915_HAS_HOTPLUG(dev
))
875 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
878 * Configure the automatic hotplug detection stuff
880 crt
->force_hotplug_required
= 0;
883 * TODO: find a proper way to discover whether we need to set the the
884 * polarity and link reversal bits or not, instead of relying on the
887 if (HAS_PCH_LPT(dev
)) {
888 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
889 FDI_RX_LINK_REVERSAL_OVERRIDE
;
891 dev_priv
->fdi_rx_config
= I915_READ(_FDI_RXA_CTL
) & fdi_config
;
894 intel_crt_reset(connector
);