drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include <drm/i915_drm.h>
  30 #include "i915_drv.h"
  31 #include <drm/drm_crtc.h>
  32 #include <drm/drm_crtc_helper.h>
  33 #include <drm/drm_fb_helper.h>
  34 #include <drm/drm_dp_helper.h>
  35
  36 #define _wait_for(COND, MS, W) ({ \
  37         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  38         int ret__ = 0;                                                  \
  39         while (!(COND)) {                                               \
  40                 if (time_after(jiffies, timeout__)) {                   \
  41                         ret__ = -ETIMEDOUT;                             \
  42                         break;                                          \
  43                 }                                                       \
  44                 if (W && drm_can_sleep())  {                            \
  45                         msleep(W);                                      \
  46                 } else {                                                \
  47                         cpu_relax();                                    \
  48                 }                                                       \
  49         }                                                               \
  50         ret__;                                                          \
  51 })
  52
  53 #define wait_for_atomic_us(COND, US) ({ \
  54         unsigned long timeout__ = jiffies + usecs_to_jiffies(US);       \
  55         int ret__ = 0;                                                  \
  56         while (!(COND)) {                                               \
  57                 if (time_after(jiffies, timeout__)) {                   \
  58                         ret__ = -ETIMEDOUT;                             \
  59                         break;                                          \
  60                 }                                                       \
  61                 cpu_relax();                                            \
  62         }                                                               \
  63         ret__;                                                          \
  64 })
  65
  66 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  67 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  68
  69 #define KHz(x) (1000*x)
  70 #define MHz(x) KHz(1000*x)
  71
  72 /*
  73  * Display related stuff
  74  */
  75
  76 /* store information about an Ixxx DVO */
  77 /* The i830->i865 use multiple DVOs with multiple i2cs */
  78 /* the i915, i945 have a single sDVO i2c bus - which is different */
  79 #define MAX_OUTPUTS 6
  80 /* maximum connectors per crtcs in the mode set */
  81 #define INTELFB_CONN_LIMIT 4
  82
  83 #define INTEL_I2C_BUS_DVO 1
  84 #define INTEL_I2C_BUS_SDVO 2
  85
  86 /* these are outputs from the chip - integrated only
  87    external chips are via DVO or SDVO output */
  88 #define INTEL_OUTPUT_UNUSED 0
  89 #define INTEL_OUTPUT_ANALOG 1
  90 #define INTEL_OUTPUT_DVO 2
  91 #define INTEL_OUTPUT_SDVO 3
  92 #define INTEL_OUTPUT_LVDS 4
  93 #define INTEL_OUTPUT_TVOUT 5
  94 #define INTEL_OUTPUT_HDMI 6
  95 #define INTEL_OUTPUT_DISPLAYPORT 7
  96 #define INTEL_OUTPUT_EDP 8
  97 #define INTEL_OUTPUT_UNKNOWN 9
  98
  99 #define INTEL_DVO_CHIP_NONE 0
 100 #define INTEL_DVO_CHIP_LVDS 1
 101 #define INTEL_DVO_CHIP_TMDS 2
 102 #define INTEL_DVO_CHIP_TVOUT 4
 103
 104 /* drm_display_mode->private_flags */
 105 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 106 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 107 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 108 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 109  * timings in the mode to prevent the crtc fixup from overwriting them.
 110  * Currently only lvds needs that. */
 111 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 112
 113 static inline void
 114 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 115                                 int multiplier)
 116 {
 117         mode->clock *= multiplier;
 118         mode->private_flags |= multiplier;
 119 }
 120
 121 static inline int
 122 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 123 {
 124         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 125 }
 126
 127 struct intel_framebuffer {
 128         struct drm_framebuffer base;
 129         struct drm_i915_gem_object *obj;
 130 };
 131
 132 struct intel_fbdev {
 133         struct drm_fb_helper helper;
 134         struct intel_framebuffer ifb;
 135         struct list_head fbdev_list;
 136         struct drm_display_mode *our_mode;
 137 };
 138
 139 struct intel_encoder {
 140         struct drm_encoder base;
 141         /*
 142          * The new crtc this encoder will be driven from. Only differs from
 143          * base->crtc while a modeset is in progress.
 144          */
 145         struct intel_crtc *new_crtc;
 146
 147         int type;
 148         bool needs_tv_clock;
 149         /*
 150          * Intel hw has only one MUX where encoders could be clone, hence a
 151          * simple flag is enough to compute the possible_clones mask.
 152          */
 153         bool cloneable;
 154         bool connectors_active;
 155         void (*hot_plug)(struct intel_encoder *);
 156         void (*pre_enable)(struct intel_encoder *);
 157         void (*enable)(struct intel_encoder *);
 158         void (*disable)(struct intel_encoder *);
 159         void (*post_disable)(struct intel_encoder *);
 160         /* Read out the current hw state of this connector, returning true if
 161          * the encoder is active. If the encoder is enabled it also set the pipe
 162          * it is connected to in the pipe parameter. */
 163         bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
 164         int crtc_mask;
 165 };
 166
 167 struct intel_panel {
 168         struct drm_display_mode *fixed_mode;
 169         int fitting_mode;
 170 };
 171
 172 struct intel_connector {
 173         struct drm_connector base;
 174         /*
 175          * The fixed encoder this connector is connected to.
 176          */
 177         struct intel_encoder *encoder;
 178
 179         /*
 180          * The new encoder this connector will be driven. Only differs from
 181          * encoder while a modeset is in progress.
 182          */
 183         struct intel_encoder *new_encoder;
 184
 185         /* Reads out the current hw, returning true if the connector is enabled
 186          * and active (i.e. dpms ON state). */
 187         bool (*get_hw_state)(struct intel_connector *);
 188
 189         /* Panel info for eDP and LVDS */
 190         struct intel_panel panel;
 191
 192         /* Cached EDID for eDP and LVDS. May hold ERR_PTR for invalid EDID. */
 193         struct edid *edid;
 194 };
 195
 196 struct intel_crtc {
 197         struct drm_crtc base;
 198         enum pipe pipe;
 199         enum plane plane;
 200         enum transcoder cpu_transcoder;
 201         u8 lut_r[256], lut_g[256], lut_b[256];
 202         /*
 203          * Whether the crtc and the connected output pipeline is active. Implies
 204          * that crtc->enabled is set, i.e. the current mode configuration has
 205          * some outputs connected to this crtc.
 206          */
 207         bool active;
 208         bool primary_disabled; /* is the crtc obscured by a plane? */
 209         bool lowfreq_avail;
 210         struct intel_overlay *overlay;
 211         struct intel_unpin_work *unpin_work;
 212         int fdi_lanes;
 213
 214         atomic_t unpin_work_count;
 215
 216         /* Display surface base address adjustement for pageflips. Note that on
 217          * gen4+ this only adjusts up to a tile, offsets within a tile are
 218          * handled in the hw itself (with the TILEOFF register). */
 219         unsigned long dspaddr_offset;
 220
 221         struct drm_i915_gem_object *cursor_bo;
 222         uint32_t cursor_addr;
 223         int16_t cursor_x, cursor_y;
 224         int16_t cursor_width, cursor_height;
 225         bool cursor_visible;
 226         unsigned int bpp;
 227
 228         /* We can share PLLs across outputs if the timings match */
 229         struct intel_pch_pll *pch_pll;
 230         uint32_t ddi_pll_sel;
 231 };
 232
 233 struct intel_plane {
 234         struct drm_plane base;
 235         enum pipe pipe;
 236         struct drm_i915_gem_object *obj;
 237         bool can_scale;
 238         int max_downscale;
 239         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 240         void (*update_plane)(struct drm_plane *plane,
 241                              struct drm_framebuffer *fb,
 242                              struct drm_i915_gem_object *obj,
 243                              int crtc_x, int crtc_y,
 244                              unsigned int crtc_w, unsigned int crtc_h,
 245                              uint32_t x, uint32_t y,
 246                              uint32_t src_w, uint32_t src_h);
 247         void (*disable_plane)(struct drm_plane *plane);
 248         int (*update_colorkey)(struct drm_plane *plane,
 249                                struct drm_intel_sprite_colorkey *key);
 250         void (*get_colorkey)(struct drm_plane *plane,
 251                              struct drm_intel_sprite_colorkey *key);
 252 };
 253
 254 struct intel_watermark_params {
 255         unsigned long fifo_size;
 256         unsigned long max_wm;
 257         unsigned long default_wm;
 258         unsigned long guard_size;
 259         unsigned long cacheline_size;
 260 };
 261
 262 struct cxsr_latency {
 263         int is_desktop;
 264         int is_ddr3;
 265         unsigned long fsb_freq;
 266         unsigned long mem_freq;
 267         unsigned long display_sr;
 268         unsigned long display_hpll_disable;
 269         unsigned long cursor_sr;
 270         unsigned long cursor_hpll_disable;
 271 };
 272
 273 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 274 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 275 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 276 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 277 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 278
 279 #define DIP_HEADER_SIZE 5
 280
 281 #define DIP_TYPE_AVI    0x82
 282 #define DIP_VERSION_AVI 0x2
 283 #define DIP_LEN_AVI     13
 284 #define DIP_AVI_PR_1    0
 285 #define DIP_AVI_PR_2    1
 286
 287 #define DIP_TYPE_SPD    0x83
 288 #define DIP_VERSION_SPD 0x1
 289 #define DIP_LEN_SPD     25
 290 #define DIP_SPD_UNKNOWN 0
 291 #define DIP_SPD_DSTB    0x1
 292 #define DIP_SPD_DVDP    0x2
 293 #define DIP_SPD_DVHS    0x3
 294 #define DIP_SPD_HDDVR   0x4
 295 #define DIP_SPD_DVC     0x5
 296 #define DIP_SPD_DSC     0x6
 297 #define DIP_SPD_VCD     0x7
 298 #define DIP_SPD_GAME    0x8
 299 #define DIP_SPD_PC      0x9
 300 #define DIP_SPD_BD      0xa
 301 #define DIP_SPD_SCD     0xb
 302
 303 struct dip_infoframe {
 304         uint8_t type;           /* HB0 */
 305         uint8_t ver;            /* HB1 */
 306         uint8_t len;            /* HB2 - body len, not including checksum */
 307         uint8_t ecc;            /* Header ECC */
 308         uint8_t checksum;       /* PB0 */
 309         union {
 310                 struct {
 311                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 312                         uint8_t Y_A_B_S;
 313                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 314                         uint8_t C_M_R;
 315                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 316                         uint8_t ITC_EC_Q_SC;
 317                         /* PB4 - VIC 6:0 */
 318                         uint8_t VIC;
 319                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 320                         uint8_t YQ_CN_PR;
 321                         /* PB6 to PB13 */
 322                         uint16_t top_bar_end;
 323                         uint16_t bottom_bar_start;
 324                         uint16_t left_bar_end;
 325                         uint16_t right_bar_start;
 326                 } __attribute__ ((packed)) avi;
 327                 struct {
 328                         uint8_t vn[8];
 329                         uint8_t pd[16];
 330                         uint8_t sdi;
 331                 } __attribute__ ((packed)) spd;
 332                 uint8_t payload[27];
 333         } __attribute__ ((packed)) body;
 334 } __attribute__((packed));
 335
 336 struct intel_hdmi {
 337         u32 sdvox_reg;
 338         int ddc_bus;
 339         uint32_t color_range;
 340         bool has_hdmi_sink;
 341         bool has_audio;
 342         enum hdmi_force_audio force_audio;
 343         void (*write_infoframe)(struct drm_encoder *encoder,
 344                                 struct dip_infoframe *frame);
 345         void (*set_infoframes)(struct drm_encoder *encoder,
 346                                struct drm_display_mode *adjusted_mode);
 347 };
 348
 349 #define DP_MAX_DOWNSTREAM_PORTS         0x10
 350 #define DP_LINK_CONFIGURATION_SIZE      9
 351
 352 struct intel_dp {
 353         uint32_t output_reg;
 354         uint32_t DP;
 355         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 356         bool has_audio;
 357         enum hdmi_force_audio force_audio;
 358         uint32_t color_range;
 359         uint8_t link_bw;
 360         uint8_t lane_count;
 361         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 362         uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
 363         struct i2c_adapter adapter;
 364         struct i2c_algo_dp_aux_data algo;
 365         bool is_pch_edp;
 366         uint8_t train_set[4];
 367         int panel_power_up_delay;
 368         int panel_power_down_delay;
 369         int panel_power_cycle_delay;
 370         int backlight_on_delay;
 371         int backlight_off_delay;
 372         struct delayed_work panel_vdd_work;
 373         bool want_panel_vdd;
 374         struct intel_connector *attached_connector;
 375 };
 376
 377 struct intel_digital_port {
 378         struct intel_encoder base;
 379         enum port port;
 380         struct intel_dp dp;
 381         struct intel_hdmi hdmi;
 382 };
 383
 384 static inline struct drm_crtc *
 385 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 386 {
 387         struct drm_i915_private *dev_priv = dev->dev_private;
 388         return dev_priv->pipe_to_crtc_mapping[pipe];
 389 }
 390
 391 static inline struct drm_crtc *
 392 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 393 {
 394         struct drm_i915_private *dev_priv = dev->dev_private;
 395         return dev_priv->plane_to_crtc_mapping[plane];
 396 }
 397
 398 struct intel_unpin_work {
 399         struct work_struct work;
 400         struct drm_crtc *crtc;
 401         struct drm_i915_gem_object *old_fb_obj;
 402         struct drm_i915_gem_object *pending_flip_obj;
 403         struct drm_pending_vblank_event *event;
 404         atomic_t pending;
 405 #define INTEL_FLIP_INACTIVE     0
 406 #define INTEL_FLIP_PENDING      1
 407 #define INTEL_FLIP_COMPLETE     2
 408         bool enable_stall_check;
 409 };
 410
 411 struct intel_fbc_work {
 412         struct delayed_work work;
 413         struct drm_crtc *crtc;
 414         struct drm_framebuffer *fb;
 415         int interval;
 416 };
 417
 418 int intel_pch_rawclk(struct drm_device *dev);
 419
 420 int intel_connector_update_modes(struct drm_connector *connector,
 421                                 struct edid *edid);
 422 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 423
 424 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 425 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 426
 427 extern void intel_crt_init(struct drm_device *dev);
 428 extern void intel_hdmi_init(struct drm_device *dev,
 429                             int sdvox_reg, enum port port);
 430 extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
 431                                       struct intel_connector *intel_connector);
 432 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 433 extern bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
 434                                   const struct drm_display_mode *mode,
 435                                   struct drm_display_mode *adjusted_mode);
 436 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 437 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 438                             bool is_sdvob);
 439 extern void intel_dvo_init(struct drm_device *dev);
 440 extern void intel_tv_init(struct drm_device *dev);
 441 extern void intel_mark_busy(struct drm_device *dev);
 442 extern void intel_mark_idle(struct drm_device *dev);
 443 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
 444 extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj);
 445 extern bool intel_lvds_init(struct drm_device *dev);
 446 extern void intel_dp_init(struct drm_device *dev, int output_reg,
 447                           enum port port);
 448 extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 449                                     struct intel_connector *intel_connector);
 450 void
 451 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 452                  struct drm_display_mode *adjusted_mode);
 453 extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
 454 extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
 455 extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
 456 extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
 457 extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
 458 extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
 459 extern bool intel_dp_mode_fixup(struct drm_encoder *encoder,
 460                                 const struct drm_display_mode *mode,
 461                                 struct drm_display_mode *adjusted_mode);
 462 extern bool intel_dpd_is_edp(struct drm_device *dev);
 463 extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
 464 extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
 465 extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
 466 extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
 467 extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
 468 extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
 469 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 470 extern int intel_edp_target_clock(struct intel_encoder *,
 471                                   struct drm_display_mode *mode);
 472 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 473 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 474 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 475                                       enum plane plane);
 476
 477 /* intel_panel.c */
 478 extern int intel_panel_init(struct intel_panel *panel,
 479                             struct drm_display_mode *fixed_mode);
 480 extern void intel_panel_fini(struct intel_panel *panel);
 481
 482 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 483                                    struct drm_display_mode *adjusted_mode);
 484 extern void intel_pch_panel_fitting(struct drm_device *dev,
 485                                     int fitting_mode,
 486                                     const struct drm_display_mode *mode,
 487                                     struct drm_display_mode *adjusted_mode);
 488 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 489 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 490 extern int intel_panel_setup_backlight(struct drm_connector *connector);
 491 extern void intel_panel_enable_backlight(struct drm_device *dev,
 492                                          enum pipe pipe);
 493 extern void intel_panel_disable_backlight(struct drm_device *dev);
 494 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 495 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 496
 497 struct intel_set_config {
 498         struct drm_encoder **save_connector_encoders;
 499         struct drm_crtc **save_encoder_crtcs;
 500
 501         bool fb_changed;
 502         bool mode_changed;
 503 };
 504
 505 extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
 506                            int x, int y, struct drm_framebuffer *old_fb);
 507 extern void intel_modeset_disable(struct drm_device *dev);
 508 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 509 extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
 510 extern void intel_encoder_noop(struct drm_encoder *encoder);
 511 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 512 extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
 513 extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
 514 extern void intel_connector_dpms(struct drm_connector *, int mode);
 515 extern bool intel_connector_get_hw_state(struct intel_connector *connector);
 516 extern void intel_modeset_check_state(struct drm_device *dev);
 517
 518
 519 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 520 {
 521         return to_intel_connector(connector)->encoder;
 522 }
 523
 524 static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
 525 {
 526         struct intel_digital_port *intel_dig_port =
 527                 container_of(encoder, struct intel_digital_port, base.base);
 528         return &intel_dig_port->dp;
 529 }
 530
 531 static inline struct intel_digital_port *
 532 enc_to_dig_port(struct drm_encoder *encoder)
 533 {
 534         return container_of(encoder, struct intel_digital_port, base.base);
 535 }
 536
 537 static inline struct intel_digital_port *
 538 dp_to_dig_port(struct intel_dp *intel_dp)
 539 {
 540         return container_of(intel_dp, struct intel_digital_port, dp);
 541 }
 542
 543 static inline struct intel_digital_port *
 544 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 545 {
 546         return container_of(intel_hdmi, struct intel_digital_port, hdmi);
 547 }
 548
 549 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 550                                            struct intel_encoder *encoder);
 551 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 552
 553 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 554                                                     struct drm_crtc *crtc);
 555 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 556                                 struct drm_file *file_priv);
 557 extern enum transcoder
 558 intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
 559                              enum pipe pipe);
 560 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 561 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 562 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
 563
 564 struct intel_load_detect_pipe {
 565         struct drm_framebuffer *release_fb;
 566         bool load_detect_temp;
 567         int dpms_mode;
 568 };
 569 extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
 570                                        struct drm_display_mode *mode,
 571                                        struct intel_load_detect_pipe *old);
 572 extern void intel_release_load_detect_pipe(struct drm_connector *connector,
 573                                            struct intel_load_detect_pipe *old);
 574
 575 extern void intelfb_restore(void);
 576 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 577                                     u16 blue, int regno);
 578 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 579                                     u16 *blue, int regno);
 580 extern void intel_enable_clock_gating(struct drm_device *dev);
 581
 582 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 583                                       struct drm_i915_gem_object *obj,
 584                                       struct intel_ring_buffer *pipelined);
 585 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 586
 587 extern int intel_framebuffer_init(struct drm_device *dev,
 588                                   struct intel_framebuffer *ifb,
 589                                   struct drm_mode_fb_cmd2 *mode_cmd,
 590                                   struct drm_i915_gem_object *obj);
 591 extern int intel_fbdev_init(struct drm_device *dev);
 592 extern void intel_fbdev_fini(struct drm_device *dev);
 593 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 594 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 595 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 596 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 597
 598 extern void intel_setup_overlay(struct drm_device *dev);
 599 extern void intel_cleanup_overlay(struct drm_device *dev);
 600 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 601 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 602                                    struct drm_file *file_priv);
 603 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 604                                struct drm_file *file_priv);
 605
 606 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 607 extern void intel_fb_restore_mode(struct drm_device *dev);
 608
 609 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 610                         bool state);
 611 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 612 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 613
 614 extern void intel_init_clock_gating(struct drm_device *dev);
 615 extern void intel_write_eld(struct drm_encoder *encoder,
 616                             struct drm_display_mode *mode);
 617 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 618 extern void intel_prepare_ddi(struct drm_device *dev);
 619 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 620 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 621
 622 /* For use by IVB LP watermark workaround in intel_sprite.c */
 623 extern void intel_update_watermarks(struct drm_device *dev);
 624 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 625                                            uint32_t sprite_width,
 626                                            int pixel_size);
 627 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 628                          struct drm_display_mode *mode);
 629
 630 extern unsigned long intel_gen4_compute_offset_xtiled(int *x, int *y,
 631                                                       unsigned int bpp,
 632                                                       unsigned int pitch);
 633
 634 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 635                                      struct drm_file *file_priv);
 636 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 637                                      struct drm_file *file_priv);
 638
 639 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 640
 641 /* Power-related functions, located in intel_pm.c */
 642 extern void intel_init_pm(struct drm_device *dev);
 643 /* FBC */
 644 extern bool intel_fbc_enabled(struct drm_device *dev);
 645 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 646 extern void intel_update_fbc(struct drm_device *dev);
 647 /* IPS */
 648 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 649 extern void intel_gpu_ips_teardown(void);
 650
 651 extern void intel_init_power_wells(struct drm_device *dev);
 652 extern void intel_enable_gt_powersave(struct drm_device *dev);
 653 extern void intel_disable_gt_powersave(struct drm_device *dev);
 654 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 655 extern void ironlake_teardown_rc6(struct drm_device *dev);
 656
 657 extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 658                                    enum pipe *pipe);
 659 extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
 660 extern void intel_ddi_pll_init(struct drm_device *dev);
 661 extern void intel_ddi_enable_pipe_func(struct drm_crtc *crtc);
 662 extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
 663                                               enum transcoder cpu_transcoder);
 664 extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
 665 extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
 666 extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
 667 extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock);
 668 extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
 669 extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
 670 extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
 671 extern bool
 672 intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
 673 extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
 674
 675 #endif /* __INTEL_DRV_H__ */