drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include "i915_drm.h"
  30 #include "i915_drv.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_fb_helper.h"
  34 #include "drm_dp_helper.h"
  35
  36 #define _wait_for(COND, MS, W) ({ \
  37         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  38         int ret__ = 0;                                                  \
  39         while (!(COND)) {                                               \
  40                 if (time_after(jiffies, timeout__)) {                   \
  41                         ret__ = -ETIMEDOUT;                             \
  42                         break;                                          \
  43                 }                                                       \
  44                 if (W && drm_can_sleep()) msleep(W);    \
  45         }                                                               \
  46         ret__;                                                          \
  47 })
  48
  49 #define wait_for_atomic_us(COND, US) ({ \
  50         unsigned long timeout__ = jiffies + usecs_to_jiffies(US);       \
  51         int ret__ = 0;                                                  \
  52         while (!(COND)) {                                               \
  53                 if (time_after(jiffies, timeout__)) {                   \
  54                         ret__ = -ETIMEDOUT;                             \
  55                         break;                                          \
  56                 }                                                       \
  57                 cpu_relax();                                            \
  58         }                                                               \
  59         ret__;                                                          \
  60 })
  61
  62 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  63 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  64
  65 #define KHz(x) (1000*x)
  66 #define MHz(x) KHz(1000*x)
  67
  68 /*
  69  * Display related stuff
  70  */
  71
  72 /* store information about an Ixxx DVO */
  73 /* The i830->i865 use multiple DVOs with multiple i2cs */
  74 /* the i915, i945 have a single sDVO i2c bus - which is different */
  75 #define MAX_OUTPUTS 6
  76 /* maximum connectors per crtcs in the mode set */
  77 #define INTELFB_CONN_LIMIT 4
  78
  79 #define INTEL_I2C_BUS_DVO 1
  80 #define INTEL_I2C_BUS_SDVO 2
  81
  82 /* these are outputs from the chip - integrated only
  83    external chips are via DVO or SDVO output */
  84 #define INTEL_OUTPUT_UNUSED 0
  85 #define INTEL_OUTPUT_ANALOG 1
  86 #define INTEL_OUTPUT_DVO 2
  87 #define INTEL_OUTPUT_SDVO 3
  88 #define INTEL_OUTPUT_LVDS 4
  89 #define INTEL_OUTPUT_TVOUT 5
  90 #define INTEL_OUTPUT_HDMI 6
  91 #define INTEL_OUTPUT_DISPLAYPORT 7
  92 #define INTEL_OUTPUT_EDP 8
  93
  94 #define INTEL_DVO_CHIP_NONE 0
  95 #define INTEL_DVO_CHIP_LVDS 1
  96 #define INTEL_DVO_CHIP_TMDS 2
  97 #define INTEL_DVO_CHIP_TVOUT 4
  98
  99 /* drm_display_mode->private_flags */
 100 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 101 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 102 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 103 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 104  * timings in the mode to prevent the crtc fixup from overwriting them.
 105  * Currently only lvds needs that. */
 106 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 107
 108 static inline void
 109 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 110                                 int multiplier)
 111 {
 112         mode->clock *= multiplier;
 113         mode->private_flags |= multiplier;
 114 }
 115
 116 static inline int
 117 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 118 {
 119         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 120 }
 121
 122 struct intel_framebuffer {
 123         struct drm_framebuffer base;
 124         struct drm_i915_gem_object *obj;
 125 };
 126
 127 struct intel_fbdev {
 128         struct drm_fb_helper helper;
 129         struct intel_framebuffer ifb;
 130         struct list_head fbdev_list;
 131         struct drm_display_mode *our_mode;
 132 };
 133
 134 struct intel_encoder {
 135         struct drm_encoder base;
 136         /*
 137          * The new crtc this encoder will be driven from. Only differs from
 138          * base->crtc while a modeset is in progress.
 139          */
 140         struct intel_crtc *new_crtc;
 141
 142         int type;
 143         bool needs_tv_clock;
 144         /*
 145          * Intel hw has only one MUX where encoders could be clone, hence a
 146          * simple flag is enough to compute the possible_clones mask.
 147          */
 148         bool cloneable;
 149         bool connectors_active;
 150         void (*hot_plug)(struct intel_encoder *);
 151         void (*enable)(struct intel_encoder *);
 152         void (*disable)(struct intel_encoder *);
 153         /* Read out the current hw state of this connector, returning true if
 154          * the encoder is active. If the encoder is enabled it also set the pipe
 155          * it is connected to in the pipe parameter. */
 156         bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
 157         int crtc_mask;
 158 };
 159
 160 struct intel_connector {
 161         struct drm_connector base;
 162         /*
 163          * The fixed encoder this connector is connected to.
 164          */
 165         struct intel_encoder *encoder;
 166
 167         /*
 168          * The new encoder this connector will be driven. Only differs from
 169          * encoder while a modeset is in progress.
 170          */
 171         struct intel_encoder *new_encoder;
 172
 173         /* Reads out the current hw, returning true if the connector is enabled
 174          * and active (i.e. dpms ON state). */
 175         bool (*get_hw_state)(struct intel_connector *);
 176 };
 177
 178 struct intel_crtc {
 179         struct drm_crtc base;
 180         enum pipe pipe;
 181         enum plane plane;
 182         u8 lut_r[256], lut_g[256], lut_b[256];
 183         /*
 184          * Whether the crtc and the connected output pipeline is active. Implies
 185          * that crtc->enabled is set, i.e. the current mode configuration has
 186          * some outputs connected to this crtc.
 187          *
 188          * Atm crtc->enabled is unconditionally updated _before_ the hw state is
 189          * changed, hence we can only check this when enabling the crtc.
 190          */
 191         bool active;
 192         bool primary_disabled; /* is the crtc obscured by a plane? */
 193         bool lowfreq_avail;
 194         struct intel_overlay *overlay;
 195         struct intel_unpin_work *unpin_work;
 196         int fdi_lanes;
 197
 198         /* Display surface base address adjustement for pageflips. Note that on
 199          * gen4+ this only adjusts up to a tile, offsets within a tile are
 200          * handled in the hw itself (with the TILEOFF register). */
 201         unsigned long dspaddr_offset;
 202
 203         struct drm_i915_gem_object *cursor_bo;
 204         uint32_t cursor_addr;
 205         int16_t cursor_x, cursor_y;
 206         int16_t cursor_width, cursor_height;
 207         bool cursor_visible;
 208         unsigned int bpp;
 209
 210         /* We can share PLLs across outputs if the timings match */
 211         struct intel_pch_pll *pch_pll;
 212 };
 213
 214 struct intel_plane {
 215         struct drm_plane base;
 216         enum pipe pipe;
 217         struct drm_i915_gem_object *obj;
 218         int max_downscale;
 219         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 220         void (*update_plane)(struct drm_plane *plane,
 221                              struct drm_framebuffer *fb,
 222                              struct drm_i915_gem_object *obj,
 223                              int crtc_x, int crtc_y,
 224                              unsigned int crtc_w, unsigned int crtc_h,
 225                              uint32_t x, uint32_t y,
 226                              uint32_t src_w, uint32_t src_h);
 227         void (*disable_plane)(struct drm_plane *plane);
 228         int (*update_colorkey)(struct drm_plane *plane,
 229                                struct drm_intel_sprite_colorkey *key);
 230         void (*get_colorkey)(struct drm_plane *plane,
 231                              struct drm_intel_sprite_colorkey *key);
 232 };
 233
 234 struct intel_watermark_params {
 235         unsigned long fifo_size;
 236         unsigned long max_wm;
 237         unsigned long default_wm;
 238         unsigned long guard_size;
 239         unsigned long cacheline_size;
 240 };
 241
 242 struct cxsr_latency {
 243         int is_desktop;
 244         int is_ddr3;
 245         unsigned long fsb_freq;
 246         unsigned long mem_freq;
 247         unsigned long display_sr;
 248         unsigned long display_hpll_disable;
 249         unsigned long cursor_sr;
 250         unsigned long cursor_hpll_disable;
 251 };
 252
 253 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 254 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 255 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 256 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 257 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 258
 259 #define DIP_HEADER_SIZE 5
 260
 261 #define DIP_TYPE_AVI    0x82
 262 #define DIP_VERSION_AVI 0x2
 263 #define DIP_LEN_AVI     13
 264 #define DIP_AVI_PR_1    0
 265 #define DIP_AVI_PR_2    1
 266
 267 #define DIP_TYPE_SPD    0x83
 268 #define DIP_VERSION_SPD 0x1
 269 #define DIP_LEN_SPD     25
 270 #define DIP_SPD_UNKNOWN 0
 271 #define DIP_SPD_DSTB    0x1
 272 #define DIP_SPD_DVDP    0x2
 273 #define DIP_SPD_DVHS    0x3
 274 #define DIP_SPD_HDDVR   0x4
 275 #define DIP_SPD_DVC     0x5
 276 #define DIP_SPD_DSC     0x6
 277 #define DIP_SPD_VCD     0x7
 278 #define DIP_SPD_GAME    0x8
 279 #define DIP_SPD_PC      0x9
 280 #define DIP_SPD_BD      0xa
 281 #define DIP_SPD_SCD     0xb
 282
 283 struct dip_infoframe {
 284         uint8_t type;           /* HB0 */
 285         uint8_t ver;            /* HB1 */
 286         uint8_t len;            /* HB2 - body len, not including checksum */
 287         uint8_t ecc;            /* Header ECC */
 288         uint8_t checksum;       /* PB0 */
 289         union {
 290                 struct {
 291                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 292                         uint8_t Y_A_B_S;
 293                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 294                         uint8_t C_M_R;
 295                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 296                         uint8_t ITC_EC_Q_SC;
 297                         /* PB4 - VIC 6:0 */
 298                         uint8_t VIC;
 299                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 300                         uint8_t YQ_CN_PR;
 301                         /* PB6 to PB13 */
 302                         uint16_t top_bar_end;
 303                         uint16_t bottom_bar_start;
 304                         uint16_t left_bar_end;
 305                         uint16_t right_bar_start;
 306                 } __attribute__ ((packed)) avi;
 307                 struct {
 308                         uint8_t vn[8];
 309                         uint8_t pd[16];
 310                         uint8_t sdi;
 311                 } __attribute__ ((packed)) spd;
 312                 uint8_t payload[27];
 313         } __attribute__ ((packed)) body;
 314 } __attribute__((packed));
 315
 316 struct intel_hdmi {
 317         struct intel_encoder base;
 318         u32 sdvox_reg;
 319         int ddc_bus;
 320         int ddi_port;
 321         uint32_t color_range;
 322         bool has_hdmi_sink;
 323         bool has_audio;
 324         enum hdmi_force_audio force_audio;
 325         void (*write_infoframe)(struct drm_encoder *encoder,
 326                                 struct dip_infoframe *frame);
 327         void (*set_infoframes)(struct drm_encoder *encoder,
 328                                struct drm_display_mode *adjusted_mode);
 329 };
 330
 331 #define DP_RECEIVER_CAP_SIZE            0xf
 332 #define DP_LINK_CONFIGURATION_SIZE      9
 333
 334 struct intel_dp {
 335         struct intel_encoder base;
 336         uint32_t output_reg;
 337         uint32_t DP;
 338         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 339         bool has_audio;
 340         enum hdmi_force_audio force_audio;
 341         enum port port;
 342         uint32_t color_range;
 343         uint8_t link_bw;
 344         uint8_t lane_count;
 345         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 346         struct i2c_adapter adapter;
 347         struct i2c_algo_dp_aux_data algo;
 348         bool is_pch_edp;
 349         uint8_t train_set[4];
 350         int panel_power_up_delay;
 351         int panel_power_down_delay;
 352         int panel_power_cycle_delay;
 353         int backlight_on_delay;
 354         int backlight_off_delay;
 355         struct drm_display_mode *panel_fixed_mode;  /* for eDP */
 356         struct delayed_work panel_vdd_work;
 357         bool want_panel_vdd;
 358         struct edid *edid; /* cached EDID for eDP */
 359         int edid_mode_count;
 360 };
 361
 362 static inline struct drm_crtc *
 363 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 364 {
 365         struct drm_i915_private *dev_priv = dev->dev_private;
 366         return dev_priv->pipe_to_crtc_mapping[pipe];
 367 }
 368
 369 static inline struct drm_crtc *
 370 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 371 {
 372         struct drm_i915_private *dev_priv = dev->dev_private;
 373         return dev_priv->plane_to_crtc_mapping[plane];
 374 }
 375
 376 struct intel_unpin_work {
 377         struct work_struct work;
 378         struct drm_device *dev;
 379         struct drm_i915_gem_object *old_fb_obj;
 380         struct drm_i915_gem_object *pending_flip_obj;
 381         struct drm_pending_vblank_event *event;
 382         int pending;
 383         bool enable_stall_check;
 384 };
 385
 386 struct intel_fbc_work {
 387         struct delayed_work work;
 388         struct drm_crtc *crtc;
 389         struct drm_framebuffer *fb;
 390         int interval;
 391 };
 392
 393 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 394
 395 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 396 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 397
 398 extern void intel_crt_init(struct drm_device *dev);
 399 extern void intel_hdmi_init(struct drm_device *dev,
 400                             int sdvox_reg, enum port port);
 401 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 402 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 403 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 404                             bool is_sdvob);
 405 extern void intel_dvo_init(struct drm_device *dev);
 406 extern void intel_tv_init(struct drm_device *dev);
 407 extern void intel_mark_busy(struct drm_device *dev);
 408 extern void intel_mark_idle(struct drm_device *dev);
 409 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
 410 extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj);
 411 extern bool intel_lvds_init(struct drm_device *dev);
 412 extern void intel_dp_init(struct drm_device *dev, int output_reg,
 413                           enum port port);
 414 void
 415 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 416                  struct drm_display_mode *adjusted_mode);
 417 extern bool intel_dpd_is_edp(struct drm_device *dev);
 418 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 419 extern int intel_edp_target_clock(struct intel_encoder *,
 420                                   struct drm_display_mode *mode);
 421 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 422 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 423 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 424                                       enum plane plane);
 425
 426 /* intel_panel.c */
 427 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 428                                    struct drm_display_mode *adjusted_mode);
 429 extern void intel_pch_panel_fitting(struct drm_device *dev,
 430                                     int fitting_mode,
 431                                     const struct drm_display_mode *mode,
 432                                     struct drm_display_mode *adjusted_mode);
 433 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 434 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 435 extern int intel_panel_setup_backlight(struct drm_device *dev);
 436 extern void intel_panel_enable_backlight(struct drm_device *dev,
 437                                          enum pipe pipe);
 438 extern void intel_panel_disable_backlight(struct drm_device *dev);
 439 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 440 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 441
 442 struct intel_set_config {
 443         struct drm_encoder **save_connector_encoders;
 444         struct drm_crtc **save_encoder_crtcs;
 445         struct drm_crtc *save_crtcs;
 446
 447         bool fb_changed;
 448         bool mode_changed;
 449 };
 450
 451 extern bool intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
 452                            int x, int y, struct drm_framebuffer *old_fb);
 453 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 454 extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
 455 extern void intel_encoder_disable(struct drm_encoder *encoder);
 456 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 457 extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
 458 extern void intel_connector_dpms(struct drm_connector *, int mode);
 459 extern bool intel_connector_get_hw_state(struct intel_connector *connector);
 460 extern void intel_connector_check_state(struct intel_connector *);
 461
 462 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 463 {
 464         return to_intel_connector(connector)->encoder;
 465 }
 466
 467 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 468                                            struct intel_encoder *encoder);
 469 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 470
 471 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 472                                                     struct drm_crtc *crtc);
 473 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 474                                 struct drm_file *file_priv);
 475 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 476 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 477
 478 struct intel_load_detect_pipe {
 479         struct drm_framebuffer *release_fb;
 480         bool load_detect_temp;
 481         int dpms_mode;
 482 };
 483 extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
 484                                        struct drm_display_mode *mode,
 485                                        struct intel_load_detect_pipe *old);
 486 extern void intel_release_load_detect_pipe(struct drm_connector *connector,
 487                                            struct intel_load_detect_pipe *old);
 488
 489 extern void intelfb_restore(void);
 490 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 491                                     u16 blue, int regno);
 492 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 493                                     u16 *blue, int regno);
 494 extern void intel_enable_clock_gating(struct drm_device *dev);
 495
 496 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 497                                       struct drm_i915_gem_object *obj,
 498                                       struct intel_ring_buffer *pipelined);
 499 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 500
 501 extern int intel_framebuffer_init(struct drm_device *dev,
 502                                   struct intel_framebuffer *ifb,
 503                                   struct drm_mode_fb_cmd2 *mode_cmd,
 504                                   struct drm_i915_gem_object *obj);
 505 extern int intel_fbdev_init(struct drm_device *dev);
 506 extern void intel_fbdev_fini(struct drm_device *dev);
 507 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 508 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 509 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 510 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 511
 512 extern void intel_setup_overlay(struct drm_device *dev);
 513 extern void intel_cleanup_overlay(struct drm_device *dev);
 514 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 515 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 516                                    struct drm_file *file_priv);
 517 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 518                                struct drm_file *file_priv);
 519
 520 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 521 extern void intel_fb_restore_mode(struct drm_device *dev);
 522
 523 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 524                         bool state);
 525 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 526 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 527
 528 extern void intel_init_clock_gating(struct drm_device *dev);
 529 extern void intel_write_eld(struct drm_encoder *encoder,
 530                             struct drm_display_mode *mode);
 531 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 532 extern void intel_prepare_ddi(struct drm_device *dev);
 533 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 534 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 535
 536 /* For use by IVB LP watermark workaround in intel_sprite.c */
 537 extern void intel_update_watermarks(struct drm_device *dev);
 538 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 539                                            uint32_t sprite_width,
 540                                            int pixel_size);
 541 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 542                          struct drm_display_mode *mode);
 543
 544 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 545                                      struct drm_file *file_priv);
 546 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 547                                      struct drm_file *file_priv);
 548
 549 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 550
 551 /* Power-related functions, located in intel_pm.c */
 552 extern void intel_init_pm(struct drm_device *dev);
 553 /* FBC */
 554 extern bool intel_fbc_enabled(struct drm_device *dev);
 555 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 556 extern void intel_update_fbc(struct drm_device *dev);
 557 /* IPS */
 558 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 559 extern void intel_gpu_ips_teardown(void);
 560
 561 extern void intel_init_power_wells(struct drm_device *dev);
 562 extern void intel_enable_gt_powersave(struct drm_device *dev);
 563 extern void intel_disable_gt_powersave(struct drm_device *dev);
 564 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 565 extern void ironlake_teardown_rc6(struct drm_device *dev);
 566
 567 extern void intel_enable_ddi(struct intel_encoder *encoder);
 568 extern void intel_disable_ddi(struct intel_encoder *encoder);
 569 extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
 570                                    enum pipe *pipe);
 571 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
 572                                 struct drm_display_mode *mode,
 573                                 struct drm_display_mode *adjusted_mode);
 574
 575 #endif /* __INTEL_DRV_H__ */