drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include "i915_drm.h"
  30 #include "i915_drv.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_fb_helper.h"
  34 #include "drm_dp_helper.h"
  35
  36 #define _wait_for(COND, MS, W) ({ \
  37         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  38         int ret__ = 0;                                                  \
  39         while (!(COND)) {                                               \
  40                 if (time_after(jiffies, timeout__)) {                   \
  41                         ret__ = -ETIMEDOUT;                             \
  42                         break;                                          \
  43                 }                                                       \
  44                 if (W && drm_can_sleep()) msleep(W);    \
  45         }                                                               \
  46         ret__;                                                          \
  47 })
  48
  49 #define wait_for_atomic_us(COND, US) ({ \
  50         unsigned long timeout__ = jiffies + usecs_to_jiffies(US);       \
  51         int ret__ = 0;                                                  \
  52         while (!(COND)) {                                               \
  53                 if (time_after(jiffies, timeout__)) {                   \
  54                         ret__ = -ETIMEDOUT;                             \
  55                         break;                                          \
  56                 }                                                       \
  57                 cpu_relax();                                            \
  58         }                                                               \
  59         ret__;                                                          \
  60 })
  61
  62 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  63 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  64
  65 #define KHz(x) (1000*x)
  66 #define MHz(x) KHz(1000*x)
  67
  68 /*
  69  * Display related stuff
  70  */
  71
  72 /* store information about an Ixxx DVO */
  73 /* The i830->i865 use multiple DVOs with multiple i2cs */
  74 /* the i915, i945 have a single sDVO i2c bus - which is different */
  75 #define MAX_OUTPUTS 6
  76 /* maximum connectors per crtcs in the mode set */
  77 #define INTELFB_CONN_LIMIT 4
  78
  79 #define INTEL_I2C_BUS_DVO 1
  80 #define INTEL_I2C_BUS_SDVO 2
  81
  82 /* these are outputs from the chip - integrated only
  83    external chips are via DVO or SDVO output */
  84 #define INTEL_OUTPUT_UNUSED 0
  85 #define INTEL_OUTPUT_ANALOG 1
  86 #define INTEL_OUTPUT_DVO 2
  87 #define INTEL_OUTPUT_SDVO 3
  88 #define INTEL_OUTPUT_LVDS 4
  89 #define INTEL_OUTPUT_TVOUT 5
  90 #define INTEL_OUTPUT_HDMI 6
  91 #define INTEL_OUTPUT_DISPLAYPORT 7
  92 #define INTEL_OUTPUT_EDP 8
  93
  94 #define INTEL_DVO_CHIP_NONE 0
  95 #define INTEL_DVO_CHIP_LVDS 1
  96 #define INTEL_DVO_CHIP_TMDS 2
  97 #define INTEL_DVO_CHIP_TVOUT 4
  98
  99 /* drm_display_mode->private_flags */
 100 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 101 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 102 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 103 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 104  * timings in the mode to prevent the crtc fixup from overwriting them.
 105  * Currently only lvds needs that. */
 106 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 107
 108 static inline void
 109 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 110                                 int multiplier)
 111 {
 112         mode->clock *= multiplier;
 113         mode->private_flags |= multiplier;
 114 }
 115
 116 static inline int
 117 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 118 {
 119         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 120 }
 121
 122 struct intel_framebuffer {
 123         struct drm_framebuffer base;
 124         struct drm_i915_gem_object *obj;
 125 };
 126
 127 struct intel_fbdev {
 128         struct drm_fb_helper helper;
 129         struct intel_framebuffer ifb;
 130         struct list_head fbdev_list;
 131         struct drm_display_mode *our_mode;
 132 };
 133
 134 struct intel_encoder {
 135         struct drm_encoder base;
 136         int type;
 137         bool needs_tv_clock;
 138         /*
 139          * Intel hw has only one MUX where encoders could be clone, hence a
 140          * simple flag is enough to compute the possible_clones mask.
 141          */
 142         bool cloneable;
 143         void (*hot_plug)(struct intel_encoder *);
 144         int crtc_mask;
 145 };
 146
 147 struct intel_connector {
 148         struct drm_connector base;
 149         struct intel_encoder *encoder;
 150 };
 151
 152 struct intel_crtc {
 153         struct drm_crtc base;
 154         enum pipe pipe;
 155         enum plane plane;
 156         u8 lut_r[256], lut_g[256], lut_b[256];
 157         int dpms_mode;
 158         bool active; /* is the crtc on? independent of the dpms mode */
 159         bool primary_disabled; /* is the crtc obscured by a plane? */
 160         bool lowfreq_avail;
 161         struct intel_overlay *overlay;
 162         struct intel_unpin_work *unpin_work;
 163         int fdi_lanes;
 164
 165         /* Display surface base address adjustement for pageflips. Note that on
 166          * gen4+ this only adjusts up to a tile, offsets within a tile are
 167          * handled in the hw itself (with the TILEOFF register). */
 168         unsigned long dspaddr_offset;
 169
 170         struct drm_i915_gem_object *cursor_bo;
 171         uint32_t cursor_addr;
 172         int16_t cursor_x, cursor_y;
 173         int16_t cursor_width, cursor_height;
 174         bool cursor_visible;
 175         unsigned int bpp;
 176
 177         /* We can share PLLs across outputs if the timings match */
 178         struct intel_pch_pll *pch_pll;
 179 };
 180
 181 struct intel_plane {
 182         struct drm_plane base;
 183         enum pipe pipe;
 184         struct drm_i915_gem_object *obj;
 185         int max_downscale;
 186         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 187         void (*update_plane)(struct drm_plane *plane,
 188                              struct drm_framebuffer *fb,
 189                              struct drm_i915_gem_object *obj,
 190                              int crtc_x, int crtc_y,
 191                              unsigned int crtc_w, unsigned int crtc_h,
 192                              uint32_t x, uint32_t y,
 193                              uint32_t src_w, uint32_t src_h);
 194         void (*disable_plane)(struct drm_plane *plane);
 195         int (*update_colorkey)(struct drm_plane *plane,
 196                                struct drm_intel_sprite_colorkey *key);
 197         void (*get_colorkey)(struct drm_plane *plane,
 198                              struct drm_intel_sprite_colorkey *key);
 199 };
 200
 201 struct intel_watermark_params {
 202         unsigned long fifo_size;
 203         unsigned long max_wm;
 204         unsigned long default_wm;
 205         unsigned long guard_size;
 206         unsigned long cacheline_size;
 207 };
 208
 209 struct cxsr_latency {
 210         int is_desktop;
 211         int is_ddr3;
 212         unsigned long fsb_freq;
 213         unsigned long mem_freq;
 214         unsigned long display_sr;
 215         unsigned long display_hpll_disable;
 216         unsigned long cursor_sr;
 217         unsigned long cursor_hpll_disable;
 218 };
 219
 220 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 221 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 222 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 223 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 224 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 225
 226 #define DIP_HEADER_SIZE 5
 227
 228 #define DIP_TYPE_AVI    0x82
 229 #define DIP_VERSION_AVI 0x2
 230 #define DIP_LEN_AVI     13
 231 #define DIP_AVI_PR_1    0
 232 #define DIP_AVI_PR_2    1
 233
 234 #define DIP_TYPE_SPD    0x83
 235 #define DIP_VERSION_SPD 0x1
 236 #define DIP_LEN_SPD     25
 237 #define DIP_SPD_UNKNOWN 0
 238 #define DIP_SPD_DSTB    0x1
 239 #define DIP_SPD_DVDP    0x2
 240 #define DIP_SPD_DVHS    0x3
 241 #define DIP_SPD_HDDVR   0x4
 242 #define DIP_SPD_DVC     0x5
 243 #define DIP_SPD_DSC     0x6
 244 #define DIP_SPD_VCD     0x7
 245 #define DIP_SPD_GAME    0x8
 246 #define DIP_SPD_PC      0x9
 247 #define DIP_SPD_BD      0xa
 248 #define DIP_SPD_SCD     0xb
 249
 250 struct dip_infoframe {
 251         uint8_t type;           /* HB0 */
 252         uint8_t ver;            /* HB1 */
 253         uint8_t len;            /* HB2 - body len, not including checksum */
 254         uint8_t ecc;            /* Header ECC */
 255         uint8_t checksum;       /* PB0 */
 256         union {
 257                 struct {
 258                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 259                         uint8_t Y_A_B_S;
 260                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 261                         uint8_t C_M_R;
 262                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 263                         uint8_t ITC_EC_Q_SC;
 264                         /* PB4 - VIC 6:0 */
 265                         uint8_t VIC;
 266                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 267                         uint8_t YQ_CN_PR;
 268                         /* PB6 to PB13 */
 269                         uint16_t top_bar_end;
 270                         uint16_t bottom_bar_start;
 271                         uint16_t left_bar_end;
 272                         uint16_t right_bar_start;
 273                 } __attribute__ ((packed)) avi;
 274                 struct {
 275                         uint8_t vn[8];
 276                         uint8_t pd[16];
 277                         uint8_t sdi;
 278                 } __attribute__ ((packed)) spd;
 279                 uint8_t payload[27];
 280         } __attribute__ ((packed)) body;
 281 } __attribute__((packed));
 282
 283 struct intel_hdmi {
 284         struct intel_encoder base;
 285         u32 sdvox_reg;
 286         int ddc_bus;
 287         int ddi_port;
 288         uint32_t color_range;
 289         bool has_hdmi_sink;
 290         bool has_audio;
 291         enum hdmi_force_audio force_audio;
 292         void (*write_infoframe)(struct drm_encoder *encoder,
 293                                 struct dip_infoframe *frame);
 294         void (*set_infoframes)(struct drm_encoder *encoder,
 295                                struct drm_display_mode *adjusted_mode);
 296 };
 297
 298 #define DP_RECEIVER_CAP_SIZE            0xf
 299 #define DP_LINK_CONFIGURATION_SIZE      9
 300
 301 struct intel_dp {
 302         struct intel_encoder base;
 303         uint32_t output_reg;
 304         uint32_t DP;
 305         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 306         bool has_audio;
 307         enum hdmi_force_audio force_audio;
 308         enum port port;
 309         uint32_t color_range;
 310         int dpms_mode;
 311         uint8_t link_bw;
 312         uint8_t lane_count;
 313         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 314         struct i2c_adapter adapter;
 315         struct i2c_algo_dp_aux_data algo;
 316         bool is_pch_edp;
 317         uint8_t train_set[4];
 318         int panel_power_up_delay;
 319         int panel_power_down_delay;
 320         int panel_power_cycle_delay;
 321         int backlight_on_delay;
 322         int backlight_off_delay;
 323         struct drm_display_mode *panel_fixed_mode;  /* for eDP */
 324         struct delayed_work panel_vdd_work;
 325         bool want_panel_vdd;
 326         struct edid *edid; /* cached EDID for eDP */
 327         int edid_mode_count;
 328 };
 329
 330 static inline struct drm_crtc *
 331 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 332 {
 333         struct drm_i915_private *dev_priv = dev->dev_private;
 334         return dev_priv->pipe_to_crtc_mapping[pipe];
 335 }
 336
 337 static inline struct drm_crtc *
 338 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 339 {
 340         struct drm_i915_private *dev_priv = dev->dev_private;
 341         return dev_priv->plane_to_crtc_mapping[plane];
 342 }
 343
 344 struct intel_unpin_work {
 345         struct work_struct work;
 346         struct drm_device *dev;
 347         struct drm_i915_gem_object *old_fb_obj;
 348         struct drm_i915_gem_object *pending_flip_obj;
 349         struct drm_pending_vblank_event *event;
 350         int pending;
 351         bool enable_stall_check;
 352 };
 353
 354 struct intel_fbc_work {
 355         struct delayed_work work;
 356         struct drm_crtc *crtc;
 357         struct drm_framebuffer *fb;
 358         int interval;
 359 };
 360
 361 int intel_connector_update_modes(struct drm_connector *connector,
 362                                 struct edid *edid);
 363 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 364
 365 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 366 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 367
 368 extern void intel_crt_init(struct drm_device *dev);
 369 extern void intel_hdmi_init(struct drm_device *dev,
 370                             int sdvox_reg, enum port port);
 371 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 372 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 373 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 374                             bool is_sdvob);
 375 extern void intel_dvo_init(struct drm_device *dev);
 376 extern void intel_tv_init(struct drm_device *dev);
 377 extern void intel_mark_busy(struct drm_device *dev);
 378 extern void intel_mark_idle(struct drm_device *dev);
 379 extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
 380 extern void intel_mark_fb_idle(struct drm_i915_gem_object *obj);
 381 extern bool intel_lvds_init(struct drm_device *dev);
 382 extern void intel_dp_init(struct drm_device *dev, int output_reg,
 383                           enum port port);
 384 void
 385 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 386                  struct drm_display_mode *adjusted_mode);
 387 extern bool intel_dpd_is_edp(struct drm_device *dev);
 388 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 389 extern int intel_edp_target_clock(struct intel_encoder *,
 390                                   struct drm_display_mode *mode);
 391 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 392 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 393 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 394                                       enum plane plane);
 395
 396 /* intel_panel.c */
 397 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 398                                    struct drm_display_mode *adjusted_mode);
 399 extern void intel_pch_panel_fitting(struct drm_device *dev,
 400                                     int fitting_mode,
 401                                     const struct drm_display_mode *mode,
 402                                     struct drm_display_mode *adjusted_mode);
 403 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 404 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 405 extern int intel_panel_setup_backlight(struct drm_device *dev);
 406 extern void intel_panel_enable_backlight(struct drm_device *dev,
 407                                          enum pipe pipe);
 408 extern void intel_panel_disable_backlight(struct drm_device *dev);
 409 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 410 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 411
 412 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 413 extern void intel_encoder_prepare(struct drm_encoder *encoder);
 414 extern void intel_encoder_commit(struct drm_encoder *encoder);
 415 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 416
 417 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 418 {
 419         return to_intel_connector(connector)->encoder;
 420 }
 421
 422 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 423                                            struct intel_encoder *encoder);
 424 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 425
 426 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 427                                                     struct drm_crtc *crtc);
 428 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 429                                 struct drm_file *file_priv);
 430 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 431 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 432
 433 struct intel_load_detect_pipe {
 434         struct drm_framebuffer *release_fb;
 435         bool load_detect_temp;
 436         int dpms_mode;
 437 };
 438 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
 439                                        struct drm_connector *connector,
 440                                        struct drm_display_mode *mode,
 441                                        struct intel_load_detect_pipe *old);
 442 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
 443                                            struct drm_connector *connector,
 444                                            struct intel_load_detect_pipe *old);
 445
 446 extern void intelfb_restore(void);
 447 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 448                                     u16 blue, int regno);
 449 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 450                                     u16 *blue, int regno);
 451 extern void intel_enable_clock_gating(struct drm_device *dev);
 452
 453 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 454                                       struct drm_i915_gem_object *obj,
 455                                       struct intel_ring_buffer *pipelined);
 456 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 457
 458 extern int intel_framebuffer_init(struct drm_device *dev,
 459                                   struct intel_framebuffer *ifb,
 460                                   struct drm_mode_fb_cmd2 *mode_cmd,
 461                                   struct drm_i915_gem_object *obj);
 462 extern int intel_fbdev_init(struct drm_device *dev);
 463 extern void intel_fbdev_fini(struct drm_device *dev);
 464 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 465 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 466 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 467 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 468
 469 extern void intel_setup_overlay(struct drm_device *dev);
 470 extern void intel_cleanup_overlay(struct drm_device *dev);
 471 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 472 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 473                                    struct drm_file *file_priv);
 474 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 475                                struct drm_file *file_priv);
 476
 477 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 478 extern void intel_fb_restore_mode(struct drm_device *dev);
 479
 480 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 481                         bool state);
 482 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 483 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 484
 485 extern void intel_init_clock_gating(struct drm_device *dev);
 486 extern void intel_write_eld(struct drm_encoder *encoder,
 487                             struct drm_display_mode *mode);
 488 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 489 extern void intel_prepare_ddi(struct drm_device *dev);
 490 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 491 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 492
 493 /* For use by IVB LP watermark workaround in intel_sprite.c */
 494 extern void intel_update_watermarks(struct drm_device *dev);
 495 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 496                                            uint32_t sprite_width,
 497                                            int pixel_size);
 498 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 499                          struct drm_display_mode *mode);
 500
 501 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 502                                      struct drm_file *file_priv);
 503 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 504                                      struct drm_file *file_priv);
 505
 506 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 507
 508 /* Power-related functions, located in intel_pm.c */
 509 extern void intel_init_pm(struct drm_device *dev);
 510 /* FBC */
 511 extern bool intel_fbc_enabled(struct drm_device *dev);
 512 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 513 extern void intel_update_fbc(struct drm_device *dev);
 514 /* IPS */
 515 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 516 extern void intel_gpu_ips_teardown(void);
 517
 518 extern void intel_init_power_wells(struct drm_device *dev);
 519 extern void intel_enable_gt_powersave(struct drm_device *dev);
 520 extern void intel_disable_gt_powersave(struct drm_device *dev);
 521 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 522 extern void ironlake_teardown_rc6(struct drm_device *dev);
 523
 524 extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
 525 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
 526                                 struct drm_display_mode *mode,
 527                                 struct drm_display_mode *adjusted_mode);
 528
 529 #endif /* __INTEL_DRV_H__ */