Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_dvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
33 #include "i915_drv.h"
34 #include "dvo.h"
35
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
40
41 static const struct intel_dvo_device intel_dvo_devices[] = {
42 {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
48 },
49 {
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
55 },
56 {
57 .type = INTEL_DVO_CHIP_TMDS,
58 .name = "ch7xxx",
59 .dvo_reg = DVOC,
60 .slave_addr = 0x75, /* For some ch7010 */
61 .dev_ops = &ch7xxx_ops,
62 },
63 {
64 .type = INTEL_DVO_CHIP_LVDS,
65 .name = "ivch",
66 .dvo_reg = DVOA,
67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
68 .dev_ops = &ivch_ops,
69 },
70 {
71 .type = INTEL_DVO_CHIP_TMDS,
72 .name = "tfp410",
73 .dvo_reg = DVOC,
74 .slave_addr = TFP410_ADDR,
75 .dev_ops = &tfp410_ops,
76 },
77 {
78 .type = INTEL_DVO_CHIP_LVDS,
79 .name = "ch7017",
80 .dvo_reg = DVOC,
81 .slave_addr = 0x75,
82 .gpio = GMBUS_PORT_DPB,
83 .dev_ops = &ch7017_ops,
84 },
85 {
86 .type = INTEL_DVO_CHIP_TMDS,
87 .name = "ns2501",
88 .dvo_reg = DVOC,
89 .slave_addr = NS2501_ADDR,
90 .dev_ops = &ns2501_ops,
91 }
92 };
93
94 struct intel_dvo {
95 struct intel_encoder base;
96
97 struct intel_dvo_device dev;
98
99 struct drm_display_mode *panel_fixed_mode;
100 bool panel_wants_dither;
101 };
102
103 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
104 {
105 return container_of(encoder, struct intel_dvo, base);
106 }
107
108 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
109 {
110 return enc_to_dvo(intel_attached_encoder(connector));
111 }
112
113 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
114 {
115 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
116
117 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
118 }
119
120 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
121 enum pipe *pipe)
122 {
123 struct drm_device *dev = encoder->base.dev;
124 struct drm_i915_private *dev_priv = dev->dev_private;
125 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
126 u32 tmp;
127
128 tmp = I915_READ(intel_dvo->dev.dvo_reg);
129
130 if (!(tmp & DVO_ENABLE))
131 return false;
132
133 *pipe = PORT_TO_PIPE(tmp);
134
135 return true;
136 }
137
138 static void intel_dvo_get_config(struct intel_encoder *encoder,
139 struct intel_crtc_config *pipe_config)
140 {
141 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
142 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
143 u32 tmp, flags = 0;
144
145 tmp = I915_READ(intel_dvo->dev.dvo_reg);
146 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
147 flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 flags |= DRM_MODE_FLAG_NHSYNC;
150 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
151 flags |= DRM_MODE_FLAG_PVSYNC;
152 else
153 flags |= DRM_MODE_FLAG_NVSYNC;
154
155 pipe_config->adjusted_mode.flags |= flags;
156 }
157
158 static void intel_disable_dvo(struct intel_encoder *encoder)
159 {
160 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
161 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
162 u32 dvo_reg = intel_dvo->dev.dvo_reg;
163 u32 temp = I915_READ(dvo_reg);
164
165 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
166 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
167 I915_READ(dvo_reg);
168 }
169
170 static void intel_enable_dvo(struct intel_encoder *encoder)
171 {
172 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
173 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
174 u32 dvo_reg = intel_dvo->dev.dvo_reg;
175 u32 temp = I915_READ(dvo_reg);
176
177 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
178 I915_READ(dvo_reg);
179 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
180 }
181
182 /* Special dpms function to support cloning between dvo/sdvo/crt. */
183 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
184 {
185 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
186 struct drm_crtc *crtc;
187
188 /* dvo supports only 2 dpms states. */
189 if (mode != DRM_MODE_DPMS_ON)
190 mode = DRM_MODE_DPMS_OFF;
191
192 if (mode == connector->dpms)
193 return;
194
195 connector->dpms = mode;
196
197 /* Only need to change hw state when actually enabled */
198 crtc = intel_dvo->base.base.crtc;
199 if (!crtc) {
200 intel_dvo->base.connectors_active = false;
201 return;
202 }
203
204 /* We call connector dpms manually below in case pipe dpms doesn't
205 * change due to cloning. */
206 if (mode == DRM_MODE_DPMS_ON) {
207 intel_dvo->base.connectors_active = true;
208
209 intel_crtc_update_dpms(crtc);
210
211 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
212 } else {
213 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
214
215 intel_dvo->base.connectors_active = false;
216
217 intel_crtc_update_dpms(crtc);
218 }
219
220 intel_modeset_check_state(connector->dev);
221 }
222
223 static int intel_dvo_mode_valid(struct drm_connector *connector,
224 struct drm_display_mode *mode)
225 {
226 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
227
228 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
229 return MODE_NO_DBLESCAN;
230
231 /* XXX: Validate clock range */
232
233 if (intel_dvo->panel_fixed_mode) {
234 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
235 return MODE_PANEL;
236 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
237 return MODE_PANEL;
238 }
239
240 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
241 }
242
243 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
244 struct intel_crtc_config *pipe_config)
245 {
246 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
247 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
248
249 /* If we have timings from the BIOS for the panel, put them in
250 * to the adjusted mode. The CRTC will be set up for this mode,
251 * with the panel scaling set up to source from the H/VDisplay
252 * of the original mode.
253 */
254 if (intel_dvo->panel_fixed_mode != NULL) {
255 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
256 C(hdisplay);
257 C(hsync_start);
258 C(hsync_end);
259 C(htotal);
260 C(vdisplay);
261 C(vsync_start);
262 C(vsync_end);
263 C(vtotal);
264 C(clock);
265 #undef C
266 }
267
268 if (intel_dvo->dev.dev_ops->mode_fixup)
269 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
270 &pipe_config->requested_mode,
271 adjusted_mode);
272
273 return true;
274 }
275
276 static void intel_dvo_mode_set(struct intel_encoder *encoder)
277 {
278 struct drm_device *dev = encoder->base.dev;
279 struct drm_i915_private *dev_priv = dev->dev_private;
280 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
281 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
282 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
283 int pipe = crtc->pipe;
284 u32 dvo_val;
285 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
286
287 switch (dvo_reg) {
288 case DVOA:
289 default:
290 dvo_srcdim_reg = DVOA_SRCDIM;
291 break;
292 case DVOB:
293 dvo_srcdim_reg = DVOB_SRCDIM;
294 break;
295 case DVOC:
296 dvo_srcdim_reg = DVOC_SRCDIM;
297 break;
298 }
299
300 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
301 &crtc->config.requested_mode,
302 adjusted_mode);
303
304 /* Save the data order, since I don't know what it should be set to. */
305 dvo_val = I915_READ(dvo_reg) &
306 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
307 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
308 DVO_BLANK_ACTIVE_HIGH;
309
310 if (pipe == 1)
311 dvo_val |= DVO_PIPE_B_SELECT;
312 dvo_val |= DVO_PIPE_STALL;
313 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
314 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
315 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
316 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
317
318 /*I915_WRITE(DVOB_SRCDIM,
319 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
320 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
321 I915_WRITE(dvo_srcdim_reg,
322 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
323 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
324 /*I915_WRITE(DVOB, dvo_val);*/
325 I915_WRITE(dvo_reg, dvo_val);
326 }
327
328 /**
329 * Detect the output connection on our DVO device.
330 *
331 * Unimplemented.
332 */
333 static enum drm_connector_status
334 intel_dvo_detect(struct drm_connector *connector, bool force)
335 {
336 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
337 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
338 connector->base.id, drm_get_connector_name(connector));
339 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
340 }
341
342 static int intel_dvo_get_modes(struct drm_connector *connector)
343 {
344 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
345 struct drm_i915_private *dev_priv = connector->dev->dev_private;
346
347 /* We should probably have an i2c driver get_modes function for those
348 * devices which will have a fixed set of modes determined by the chip
349 * (TV-out, for example), but for now with just TMDS and LVDS,
350 * that's not the case.
351 */
352 intel_ddc_get_modes(connector,
353 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
354 if (!list_empty(&connector->probed_modes))
355 return 1;
356
357 if (intel_dvo->panel_fixed_mode != NULL) {
358 struct drm_display_mode *mode;
359 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
360 if (mode) {
361 drm_mode_probed_add(connector, mode);
362 return 1;
363 }
364 }
365
366 return 0;
367 }
368
369 static void intel_dvo_destroy(struct drm_connector *connector)
370 {
371 drm_sysfs_connector_remove(connector);
372 drm_connector_cleanup(connector);
373 kfree(connector);
374 }
375
376 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
377 .dpms = intel_dvo_dpms,
378 .detect = intel_dvo_detect,
379 .destroy = intel_dvo_destroy,
380 .fill_modes = drm_helper_probe_single_connector_modes,
381 };
382
383 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
384 .mode_valid = intel_dvo_mode_valid,
385 .get_modes = intel_dvo_get_modes,
386 .best_encoder = intel_best_encoder,
387 };
388
389 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
390 {
391 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
392
393 if (intel_dvo->dev.dev_ops->destroy)
394 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
395
396 kfree(intel_dvo->panel_fixed_mode);
397
398 intel_encoder_destroy(encoder);
399 }
400
401 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
402 .destroy = intel_dvo_enc_destroy,
403 };
404
405 /**
406 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
407 *
408 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
409 * chip being on DVOB/C and having multiple pipes.
410 */
411 static struct drm_display_mode *
412 intel_dvo_get_current_mode(struct drm_connector *connector)
413 {
414 struct drm_device *dev = connector->dev;
415 struct drm_i915_private *dev_priv = dev->dev_private;
416 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
417 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
418 struct drm_display_mode *mode = NULL;
419
420 /* If the DVO port is active, that'll be the LVDS, so we can pull out
421 * its timings to get how the BIOS set up the panel.
422 */
423 if (dvo_val & DVO_ENABLE) {
424 struct drm_crtc *crtc;
425 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
426
427 crtc = intel_get_crtc_for_pipe(dev, pipe);
428 if (crtc) {
429 mode = intel_crtc_mode_get(dev, crtc);
430 if (mode) {
431 mode->type |= DRM_MODE_TYPE_PREFERRED;
432 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
433 mode->flags |= DRM_MODE_FLAG_PHSYNC;
434 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
435 mode->flags |= DRM_MODE_FLAG_PVSYNC;
436 }
437 }
438 }
439
440 return mode;
441 }
442
443 void intel_dvo_init(struct drm_device *dev)
444 {
445 struct drm_i915_private *dev_priv = dev->dev_private;
446 struct intel_encoder *intel_encoder;
447 struct intel_dvo *intel_dvo;
448 struct intel_connector *intel_connector;
449 int i;
450 int encoder_type = DRM_MODE_ENCODER_NONE;
451
452 intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
453 if (!intel_dvo)
454 return;
455
456 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
457 if (!intel_connector) {
458 kfree(intel_dvo);
459 return;
460 }
461
462 intel_encoder = &intel_dvo->base;
463 drm_encoder_init(dev, &intel_encoder->base,
464 &intel_dvo_enc_funcs, encoder_type);
465
466 intel_encoder->disable = intel_disable_dvo;
467 intel_encoder->enable = intel_enable_dvo;
468 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
469 intel_encoder->get_config = intel_dvo_get_config;
470 intel_encoder->compute_config = intel_dvo_compute_config;
471 intel_encoder->mode_set = intel_dvo_mode_set;
472 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
473
474 /* Now, try to find a controller */
475 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
476 struct drm_connector *connector = &intel_connector->base;
477 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
478 struct i2c_adapter *i2c;
479 int gpio;
480 bool dvoinit;
481
482 /* Allow the I2C driver info to specify the GPIO to be used in
483 * special cases, but otherwise default to what's defined
484 * in the spec.
485 */
486 if (intel_gmbus_is_port_valid(dvo->gpio))
487 gpio = dvo->gpio;
488 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
489 gpio = GMBUS_PORT_SSC;
490 else
491 gpio = GMBUS_PORT_DPB;
492
493 /* Set up the I2C bus necessary for the chip we're probing.
494 * It appears that everything is on GPIOE except for panels
495 * on i830 laptops, which are on GPIOB (DVOA).
496 */
497 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
498
499 intel_dvo->dev = *dvo;
500
501 /* GMBUS NAK handling seems to be unstable, hence let the
502 * transmitter detection run in bit banging mode for now.
503 */
504 intel_gmbus_force_bit(i2c, true);
505
506 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
507
508 intel_gmbus_force_bit(i2c, false);
509
510 if (!dvoinit)
511 continue;
512
513 intel_encoder->type = INTEL_OUTPUT_DVO;
514 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
515 switch (dvo->type) {
516 case INTEL_DVO_CHIP_TMDS:
517 intel_encoder->cloneable = true;
518 drm_connector_init(dev, connector,
519 &intel_dvo_connector_funcs,
520 DRM_MODE_CONNECTOR_DVII);
521 encoder_type = DRM_MODE_ENCODER_TMDS;
522 break;
523 case INTEL_DVO_CHIP_LVDS:
524 intel_encoder->cloneable = false;
525 drm_connector_init(dev, connector,
526 &intel_dvo_connector_funcs,
527 DRM_MODE_CONNECTOR_LVDS);
528 encoder_type = DRM_MODE_ENCODER_LVDS;
529 break;
530 }
531
532 drm_connector_helper_add(connector,
533 &intel_dvo_connector_helper_funcs);
534 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
535 connector->interlace_allowed = false;
536 connector->doublescan_allowed = false;
537
538 intel_connector_attach_encoder(intel_connector, intel_encoder);
539 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
540 /* For our LVDS chipsets, we should hopefully be able
541 * to dig the fixed panel mode out of the BIOS data.
542 * However, it's in a different format from the BIOS
543 * data on chipsets with integrated LVDS (stored in AIM
544 * headers, likely), so for now, just get the current
545 * mode being output through DVO.
546 */
547 intel_dvo->panel_fixed_mode =
548 intel_dvo_get_current_mode(connector);
549 intel_dvo->panel_wants_dither = true;
550 }
551
552 drm_sysfs_connector_add(connector);
553 return;
554 }
555
556 drm_encoder_cleanup(&intel_encoder->base);
557 kfree(intel_dvo);
558 kfree(intel_connector);
559 }
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