drivers/gpu/drm/i915/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "drm_crtc.h"
  32 #include "intel_drv.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35 #include "dvo.h"
  36
  37 #define SIL164_ADDR     0x38
  38 #define CH7xxx_ADDR     0x76
  39 #define TFP410_ADDR     0x38
  40
  41 static const struct intel_dvo_device intel_dvo_devices[] = {
  42         {
  43                 .type = INTEL_DVO_CHIP_TMDS,
  44                 .name = "sil164",
  45                 .dvo_reg = DVOC,
  46                 .slave_addr = SIL164_ADDR,
  47                 .dev_ops = &sil164_ops,
  48         },
  49         {
  50                 .type = INTEL_DVO_CHIP_TMDS,
  51                 .name = "ch7xxx",
  52                 .dvo_reg = DVOC,
  53                 .slave_addr = CH7xxx_ADDR,
  54                 .dev_ops = &ch7xxx_ops,
  55         },
  56         {
  57                 .type = INTEL_DVO_CHIP_LVDS,
  58                 .name = "ivch",
  59                 .dvo_reg = DVOA,
  60                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  61                 .dev_ops = &ivch_ops,
  62         },
  63         {
  64                 .type = INTEL_DVO_CHIP_TMDS,
  65                 .name = "tfp410",
  66                 .dvo_reg = DVOC,
  67                 .slave_addr = TFP410_ADDR,
  68                 .dev_ops = &tfp410_ops,
  69         },
  70         {
  71                 .type = INTEL_DVO_CHIP_LVDS,
  72                 .name = "ch7017",
  73                 .dvo_reg = DVOC,
  74                 .slave_addr = 0x75,
  75                 .gpio = GPIOE,
  76                 .dev_ops = &ch7017_ops,
  77         }
  78 };
  79
  80 struct intel_dvo {
  81         struct intel_encoder base;
  82
  83         struct intel_dvo_device dev;
  84
  85         struct drm_display_mode *panel_fixed_mode;
  86         bool panel_wants_dither;
  87 };
  88
  89 static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
  90 {
  91         return container_of(enc_to_intel_encoder(encoder), struct intel_dvo, base);
  92 }
  93
  94 static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
  95 {
  96         struct drm_i915_private *dev_priv = encoder->dev->dev_private;
  97         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
  98         u32 dvo_reg = intel_dvo->dev.dvo_reg;
  99         u32 temp = I915_READ(dvo_reg);
 100
 101         if (mode == DRM_MODE_DPMS_ON) {
 102                 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 103                 I915_READ(dvo_reg);
 104                 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
 105         } else {
 106                 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
 107                 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 108                 I915_READ(dvo_reg);
 109         }
 110 }
 111
 112 static int intel_dvo_mode_valid(struct drm_connector *connector,
 113                                 struct drm_display_mode *mode)
 114 {
 115         struct drm_encoder *encoder = intel_attached_encoder(connector);
 116         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 117
 118         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 119                 return MODE_NO_DBLESCAN;
 120
 121         /* XXX: Validate clock range */
 122
 123         if (intel_dvo->panel_fixed_mode) {
 124                 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
 125                         return MODE_PANEL;
 126                 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
 127                         return MODE_PANEL;
 128         }
 129
 130         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 131 }
 132
 133 static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
 134                                  struct drm_display_mode *mode,
 135                                  struct drm_display_mode *adjusted_mode)
 136 {
 137         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 138
 139         /* If we have timings from the BIOS for the panel, put them in
 140          * to the adjusted mode.  The CRTC will be set up for this mode,
 141          * with the panel scaling set up to source from the H/VDisplay
 142          * of the original mode.
 143          */
 144         if (intel_dvo->panel_fixed_mode != NULL) {
 145 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
 146                 C(hdisplay);
 147                 C(hsync_start);
 148                 C(hsync_end);
 149                 C(htotal);
 150                 C(vdisplay);
 151                 C(vsync_start);
 152                 C(vsync_end);
 153                 C(vtotal);
 154                 C(clock);
 155                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 156 #undef C
 157         }
 158
 159         if (intel_dvo->dev.dev_ops->mode_fixup)
 160                 return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
 161
 162         return true;
 163 }
 164
 165 static void intel_dvo_mode_set(struct drm_encoder *encoder,
 166                                struct drm_display_mode *mode,
 167                                struct drm_display_mode *adjusted_mode)
 168 {
 169         struct drm_device *dev = encoder->dev;
 170         struct drm_i915_private *dev_priv = dev->dev_private;
 171         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 172         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 173         int pipe = intel_crtc->pipe;
 174         u32 dvo_val;
 175         u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
 176         int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
 177
 178         switch (dvo_reg) {
 179         case DVOA:
 180         default:
 181                 dvo_srcdim_reg = DVOA_SRCDIM;
 182                 break;
 183         case DVOB:
 184                 dvo_srcdim_reg = DVOB_SRCDIM;
 185                 break;
 186         case DVOC:
 187                 dvo_srcdim_reg = DVOC_SRCDIM;
 188                 break;
 189         }
 190
 191         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
 192
 193         /* Save the data order, since I don't know what it should be set to. */
 194         dvo_val = I915_READ(dvo_reg) &
 195                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 196         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 197                    DVO_BLANK_ACTIVE_HIGH;
 198
 199         if (pipe == 1)
 200                 dvo_val |= DVO_PIPE_B_SELECT;
 201         dvo_val |= DVO_PIPE_STALL;
 202         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 203                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 204         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 205                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 206
 207         I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
 208
 209         /*I915_WRITE(DVOB_SRCDIM,
 210           (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 211           (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 212         I915_WRITE(dvo_srcdim_reg,
 213                    (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 214                    (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 215         /*I915_WRITE(DVOB, dvo_val);*/
 216         I915_WRITE(dvo_reg, dvo_val);
 217 }
 218
 219 /**
 220  * Detect the output connection on our DVO device.
 221  *
 222  * Unimplemented.
 223  */
 224 static enum drm_connector_status
 225 intel_dvo_detect(struct drm_connector *connector, bool force)
 226 {
 227         struct drm_encoder *encoder = intel_attached_encoder(connector);
 228         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 229
 230         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 231 }
 232
 233 static int intel_dvo_get_modes(struct drm_connector *connector)
 234 {
 235         struct drm_encoder *encoder = intel_attached_encoder(connector);
 236         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 237
 238         /* We should probably have an i2c driver get_modes function for those
 239          * devices which will have a fixed set of modes determined by the chip
 240          * (TV-out, for example), but for now with just TMDS and LVDS,
 241          * that's not the case.
 242          */
 243         intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus);
 244         if (!list_empty(&connector->probed_modes))
 245                 return 1;
 246
 247         if (intel_dvo->panel_fixed_mode != NULL) {
 248                 struct drm_display_mode *mode;
 249                 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
 250                 if (mode) {
 251                         drm_mode_probed_add(connector, mode);
 252                         return 1;
 253                 }
 254         }
 255
 256         return 0;
 257 }
 258
 259 static void intel_dvo_destroy(struct drm_connector *connector)
 260 {
 261         drm_sysfs_connector_remove(connector);
 262         drm_connector_cleanup(connector);
 263         kfree(connector);
 264 }
 265
 266 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
 267         .dpms = intel_dvo_dpms,
 268         .mode_fixup = intel_dvo_mode_fixup,
 269         .prepare = intel_encoder_prepare,
 270         .mode_set = intel_dvo_mode_set,
 271         .commit = intel_encoder_commit,
 272 };
 273
 274 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 275         .dpms = drm_helper_connector_dpms,
 276         .detect = intel_dvo_detect,
 277         .destroy = intel_dvo_destroy,
 278         .fill_modes = drm_helper_probe_single_connector_modes,
 279 };
 280
 281 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 282         .mode_valid = intel_dvo_mode_valid,
 283         .get_modes = intel_dvo_get_modes,
 284         .best_encoder = intel_attached_encoder,
 285 };
 286
 287 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 288 {
 289         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 290
 291         if (intel_dvo->dev.dev_ops->destroy)
 292                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 293
 294         kfree(intel_dvo->panel_fixed_mode);
 295
 296         intel_encoder_destroy(encoder);
 297 }
 298
 299 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 300         .destroy = intel_dvo_enc_destroy,
 301 };
 302
 303 /**
 304  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 305  *
 306  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 307  * chip being on DVOB/C and having multiple pipes.
 308  */
 309 static struct drm_display_mode *
 310 intel_dvo_get_current_mode(struct drm_connector *connector)
 311 {
 312         struct drm_device *dev = connector->dev;
 313         struct drm_i915_private *dev_priv = dev->dev_private;
 314         struct drm_encoder *encoder = intel_attached_encoder(connector);
 315         struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
 316         uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
 317         struct drm_display_mode *mode = NULL;
 318
 319         /* If the DVO port is active, that'll be the LVDS, so we can pull out
 320          * its timings to get how the BIOS set up the panel.
 321          */
 322         if (dvo_val & DVO_ENABLE) {
 323                 struct drm_crtc *crtc;
 324                 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 325
 326                 crtc = intel_get_crtc_from_pipe(dev, pipe);
 327                 if (crtc) {
 328                         mode = intel_crtc_mode_get(dev, crtc);
 329                         if (mode) {
 330                                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 331                                 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
 332                                         mode->flags |= DRM_MODE_FLAG_PHSYNC;
 333                                 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
 334                                         mode->flags |= DRM_MODE_FLAG_PVSYNC;
 335                         }
 336                 }
 337         }
 338
 339         return mode;
 340 }
 341
 342 void intel_dvo_init(struct drm_device *dev)
 343 {
 344         struct intel_encoder *intel_encoder;
 345         struct intel_dvo *intel_dvo;
 346         struct intel_connector *intel_connector;
 347         struct i2c_adapter *i2cbus = NULL;
 348         int ret = 0;
 349         int i;
 350         int encoder_type = DRM_MODE_ENCODER_NONE;
 351
 352         intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
 353         if (!intel_dvo)
 354                 return;
 355
 356         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 357         if (!intel_connector) {
 358                 kfree(intel_dvo);
 359                 return;
 360         }
 361
 362         intel_encoder = &intel_dvo->base;
 363
 364         /* Set up the DDC bus */
 365         intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
 366         if (!intel_encoder->ddc_bus)
 367                 goto free_intel;
 368
 369         /* Now, try to find a controller */
 370         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 371                 struct drm_connector *connector = &intel_connector->base;
 372                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 373                 int gpio;
 374
 375                 /* Allow the I2C driver info to specify the GPIO to be used in
 376                  * special cases, but otherwise default to what's defined
 377                  * in the spec.
 378                  */
 379                 if (dvo->gpio != 0)
 380                         gpio = dvo->gpio;
 381                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 382                         gpio = GPIOB;
 383                 else
 384                         gpio = GPIOE;
 385
 386                 /* Set up the I2C bus necessary for the chip we're probing.
 387                  * It appears that everything is on GPIOE except for panels
 388                  * on i830 laptops, which are on GPIOB (DVOA).
 389                  */
 390                 if (i2cbus != NULL)
 391                         intel_i2c_destroy(i2cbus);
 392                 if (!(i2cbus = intel_i2c_create(dev, gpio,
 393                         gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
 394                         continue;
 395                 }
 396
 397                 intel_dvo->dev = *dvo;
 398                 ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus);
 399                 if (!ret)
 400                         continue;
 401
 402                 intel_encoder->type = INTEL_OUTPUT_DVO;
 403                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 404                 switch (dvo->type) {
 405                 case INTEL_DVO_CHIP_TMDS:
 406                         intel_encoder->clone_mask =
 407                                 (1 << INTEL_DVO_TMDS_CLONE_BIT) |
 408                                 (1 << INTEL_ANALOG_CLONE_BIT);
 409                         drm_connector_init(dev, connector,
 410                                            &intel_dvo_connector_funcs,
 411                                            DRM_MODE_CONNECTOR_DVII);
 412                         encoder_type = DRM_MODE_ENCODER_TMDS;
 413                         break;
 414                 case INTEL_DVO_CHIP_LVDS:
 415                         intel_encoder->clone_mask =
 416                                 (1 << INTEL_DVO_LVDS_CLONE_BIT);
 417                         drm_connector_init(dev, connector,
 418                                            &intel_dvo_connector_funcs,
 419                                            DRM_MODE_CONNECTOR_LVDS);
 420                         encoder_type = DRM_MODE_ENCODER_LVDS;
 421                         break;
 422                 }
 423
 424                 drm_connector_helper_add(connector,
 425                                          &intel_dvo_connector_helper_funcs);
 426                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 427                 connector->interlace_allowed = false;
 428                 connector->doublescan_allowed = false;
 429
 430                 drm_encoder_init(dev, &intel_encoder->enc,
 431                                  &intel_dvo_enc_funcs, encoder_type);
 432                 drm_encoder_helper_add(&intel_encoder->enc,
 433                                        &intel_dvo_helper_funcs);
 434
 435                 drm_mode_connector_attach_encoder(&intel_connector->base,
 436                                                   &intel_encoder->enc);
 437                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 438                         /* For our LVDS chipsets, we should hopefully be able
 439                          * to dig the fixed panel mode out of the BIOS data.
 440                          * However, it's in a different format from the BIOS
 441                          * data on chipsets with integrated LVDS (stored in AIM
 442                          * headers, likely), so for now, just get the current
 443                          * mode being output through DVO.
 444                          */
 445                         intel_dvo->panel_fixed_mode =
 446                                 intel_dvo_get_current_mode(connector);
 447                         intel_dvo->panel_wants_dither = true;
 448                 }
 449
 450                 drm_sysfs_connector_add(connector);
 451                 return;
 452         }
 453
 454         intel_i2c_destroy(intel_encoder->ddc_bus);
 455         /* Didn't find a chip, so tear down. */
 456         if (i2cbus != NULL)
 457                 intel_i2c_destroy(i2cbus);
 458 free_intel:
 459         kfree(intel_dvo);
 460         kfree(intel_connector);
 461 }