2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices
[] = {
43 .type
= INTEL_DVO_CHIP_TMDS
,
46 .slave_addr
= SIL164_ADDR
,
47 .dev_ops
= &sil164_ops
,
50 .type
= INTEL_DVO_CHIP_TMDS
,
53 .slave_addr
= CH7xxx_ADDR
,
54 .dev_ops
= &ch7xxx_ops
,
57 .type
= INTEL_DVO_CHIP_TMDS
,
60 .slave_addr
= 0x75, /* For some ch7010 */
61 .dev_ops
= &ch7xxx_ops
,
64 .type
= INTEL_DVO_CHIP_LVDS
,
67 .slave_addr
= 0x02, /* Might also be 0x44, 0x84, 0xc4 */
71 .type
= INTEL_DVO_CHIP_TMDS
,
74 .slave_addr
= TFP410_ADDR
,
75 .dev_ops
= &tfp410_ops
,
78 .type
= INTEL_DVO_CHIP_LVDS
,
82 .gpio
= GMBUS_PORT_DPB
,
83 .dev_ops
= &ch7017_ops
,
86 .type
= INTEL_DVO_CHIP_TMDS
,
89 .slave_addr
= NS2501_ADDR
,
90 .dev_ops
= &ns2501_ops
,
95 struct intel_encoder base
;
97 struct intel_dvo_device dev
;
99 struct drm_display_mode
*panel_fixed_mode
;
100 bool panel_wants_dither
;
103 static struct intel_dvo
*enc_to_dvo(struct intel_encoder
*encoder
)
105 return container_of(encoder
, struct intel_dvo
, base
);
108 static struct intel_dvo
*intel_attached_dvo(struct drm_connector
*connector
)
110 return enc_to_dvo(intel_attached_encoder(connector
));
113 static bool intel_dvo_connector_get_hw_state(struct intel_connector
*connector
)
115 struct intel_dvo
*intel_dvo
= intel_attached_dvo(&connector
->base
);
117 return intel_dvo
->dev
.dev_ops
->get_hw_state(&intel_dvo
->dev
);
120 static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder
,
123 struct drm_device
*dev
= encoder
->base
.dev
;
124 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
125 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
128 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
130 if (!(tmp
& DVO_ENABLE
))
133 *pipe
= PORT_TO_PIPE(tmp
);
138 static void intel_dvo_get_config(struct intel_encoder
*encoder
,
139 struct intel_crtc_config
*pipe_config
)
141 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
142 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
145 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
146 if (tmp
& DVO_HSYNC_ACTIVE_HIGH
)
147 flags
|= DRM_MODE_FLAG_PHSYNC
;
149 flags
|= DRM_MODE_FLAG_NHSYNC
;
150 if (tmp
& DVO_VSYNC_ACTIVE_HIGH
)
151 flags
|= DRM_MODE_FLAG_PVSYNC
;
153 flags
|= DRM_MODE_FLAG_NVSYNC
;
155 pipe_config
->adjusted_mode
.flags
|= flags
;
158 static void intel_disable_dvo(struct intel_encoder
*encoder
)
160 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
161 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
162 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
;
163 u32 temp
= I915_READ(dvo_reg
);
165 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
166 I915_WRITE(dvo_reg
, temp
& ~DVO_ENABLE
);
170 static void intel_enable_dvo(struct intel_encoder
*encoder
)
172 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
173 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
174 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
;
175 u32 temp
= I915_READ(dvo_reg
);
177 I915_WRITE(dvo_reg
, temp
| DVO_ENABLE
);
179 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
182 /* Special dpms function to support cloning between dvo/sdvo/crt. */
183 static void intel_dvo_dpms(struct drm_connector
*connector
, int mode
)
185 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
186 struct drm_crtc
*crtc
;
188 /* dvo supports only 2 dpms states. */
189 if (mode
!= DRM_MODE_DPMS_ON
)
190 mode
= DRM_MODE_DPMS_OFF
;
192 if (mode
== connector
->dpms
)
195 connector
->dpms
= mode
;
197 /* Only need to change hw state when actually enabled */
198 crtc
= intel_dvo
->base
.base
.crtc
;
200 intel_dvo
->base
.connectors_active
= false;
204 /* We call connector dpms manually below in case pipe dpms doesn't
205 * change due to cloning. */
206 if (mode
== DRM_MODE_DPMS_ON
) {
207 intel_dvo
->base
.connectors_active
= true;
209 intel_crtc_update_dpms(crtc
);
211 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
213 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
215 intel_dvo
->base
.connectors_active
= false;
217 intel_crtc_update_dpms(crtc
);
220 intel_modeset_check_state(connector
->dev
);
223 static int intel_dvo_mode_valid(struct drm_connector
*connector
,
224 struct drm_display_mode
*mode
)
226 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
228 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
229 return MODE_NO_DBLESCAN
;
231 /* XXX: Validate clock range */
233 if (intel_dvo
->panel_fixed_mode
) {
234 if (mode
->hdisplay
> intel_dvo
->panel_fixed_mode
->hdisplay
)
236 if (mode
->vdisplay
> intel_dvo
->panel_fixed_mode
->vdisplay
)
240 return intel_dvo
->dev
.dev_ops
->mode_valid(&intel_dvo
->dev
, mode
);
243 static bool intel_dvo_compute_config(struct intel_encoder
*encoder
,
244 struct intel_crtc_config
*pipe_config
)
246 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
247 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
249 /* If we have timings from the BIOS for the panel, put them in
250 * to the adjusted mode. The CRTC will be set up for this mode,
251 * with the panel scaling set up to source from the H/VDisplay
252 * of the original mode.
254 if (intel_dvo
->panel_fixed_mode
!= NULL
) {
255 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
267 drm_mode_set_crtcinfo(adjusted_mode
, 0);
270 if (intel_dvo
->dev
.dev_ops
->mode_fixup
)
271 return intel_dvo
->dev
.dev_ops
->mode_fixup(&intel_dvo
->dev
,
272 &pipe_config
->requested_mode
,
278 static void intel_dvo_mode_set(struct intel_encoder
*encoder
)
280 struct drm_device
*dev
= encoder
->base
.dev
;
281 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
282 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
283 struct drm_display_mode
*adjusted_mode
= &crtc
->config
.adjusted_mode
;
284 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
285 int pipe
= crtc
->pipe
;
287 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
, dvo_srcdim_reg
;
292 dvo_srcdim_reg
= DVOA_SRCDIM
;
295 dvo_srcdim_reg
= DVOB_SRCDIM
;
298 dvo_srcdim_reg
= DVOC_SRCDIM
;
302 intel_dvo
->dev
.dev_ops
->mode_set(&intel_dvo
->dev
,
303 &crtc
->config
.requested_mode
,
306 /* Save the data order, since I don't know what it should be set to. */
307 dvo_val
= I915_READ(dvo_reg
) &
308 (DVO_PRESERVE_MASK
| DVO_DATA_ORDER_GBRG
);
309 dvo_val
|= DVO_DATA_ORDER_FP
| DVO_BORDER_ENABLE
|
310 DVO_BLANK_ACTIVE_HIGH
;
313 dvo_val
|= DVO_PIPE_B_SELECT
;
314 dvo_val
|= DVO_PIPE_STALL
;
315 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
316 dvo_val
|= DVO_HSYNC_ACTIVE_HIGH
;
317 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
318 dvo_val
|= DVO_VSYNC_ACTIVE_HIGH
;
320 /*I915_WRITE(DVOB_SRCDIM,
321 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
322 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
323 I915_WRITE(dvo_srcdim_reg
,
324 (adjusted_mode
->hdisplay
<< DVO_SRCDIM_HORIZONTAL_SHIFT
) |
325 (adjusted_mode
->vdisplay
<< DVO_SRCDIM_VERTICAL_SHIFT
));
326 /*I915_WRITE(DVOB, dvo_val);*/
327 I915_WRITE(dvo_reg
, dvo_val
);
331 * Detect the output connection on our DVO device.
335 static enum drm_connector_status
336 intel_dvo_detect(struct drm_connector
*connector
, bool force
)
338 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
339 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
340 connector
->base
.id
, drm_get_connector_name(connector
));
341 return intel_dvo
->dev
.dev_ops
->detect(&intel_dvo
->dev
);
344 static int intel_dvo_get_modes(struct drm_connector
*connector
)
346 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
347 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
349 /* We should probably have an i2c driver get_modes function for those
350 * devices which will have a fixed set of modes determined by the chip
351 * (TV-out, for example), but for now with just TMDS and LVDS,
352 * that's not the case.
354 intel_ddc_get_modes(connector
,
355 intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPC
));
356 if (!list_empty(&connector
->probed_modes
))
359 if (intel_dvo
->panel_fixed_mode
!= NULL
) {
360 struct drm_display_mode
*mode
;
361 mode
= drm_mode_duplicate(connector
->dev
, intel_dvo
->panel_fixed_mode
);
363 drm_mode_probed_add(connector
, mode
);
371 static void intel_dvo_destroy(struct drm_connector
*connector
)
373 drm_sysfs_connector_remove(connector
);
374 drm_connector_cleanup(connector
);
378 static const struct drm_connector_funcs intel_dvo_connector_funcs
= {
379 .dpms
= intel_dvo_dpms
,
380 .detect
= intel_dvo_detect
,
381 .destroy
= intel_dvo_destroy
,
382 .fill_modes
= drm_helper_probe_single_connector_modes
,
385 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
= {
386 .mode_valid
= intel_dvo_mode_valid
,
387 .get_modes
= intel_dvo_get_modes
,
388 .best_encoder
= intel_best_encoder
,
391 static void intel_dvo_enc_destroy(struct drm_encoder
*encoder
)
393 struct intel_dvo
*intel_dvo
= enc_to_dvo(to_intel_encoder(encoder
));
395 if (intel_dvo
->dev
.dev_ops
->destroy
)
396 intel_dvo
->dev
.dev_ops
->destroy(&intel_dvo
->dev
);
398 kfree(intel_dvo
->panel_fixed_mode
);
400 intel_encoder_destroy(encoder
);
403 static const struct drm_encoder_funcs intel_dvo_enc_funcs
= {
404 .destroy
= intel_dvo_enc_destroy
,
408 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
410 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
411 * chip being on DVOB/C and having multiple pipes.
413 static struct drm_display_mode
*
414 intel_dvo_get_current_mode(struct drm_connector
*connector
)
416 struct drm_device
*dev
= connector
->dev
;
417 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
418 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
419 uint32_t dvo_val
= I915_READ(intel_dvo
->dev
.dvo_reg
);
420 struct drm_display_mode
*mode
= NULL
;
422 /* If the DVO port is active, that'll be the LVDS, so we can pull out
423 * its timings to get how the BIOS set up the panel.
425 if (dvo_val
& DVO_ENABLE
) {
426 struct drm_crtc
*crtc
;
427 int pipe
= (dvo_val
& DVO_PIPE_B_SELECT
) ? 1 : 0;
429 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
431 mode
= intel_crtc_mode_get(dev
, crtc
);
433 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
434 if (dvo_val
& DVO_HSYNC_ACTIVE_HIGH
)
435 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
436 if (dvo_val
& DVO_VSYNC_ACTIVE_HIGH
)
437 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
445 void intel_dvo_init(struct drm_device
*dev
)
447 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
448 struct intel_encoder
*intel_encoder
;
449 struct intel_dvo
*intel_dvo
;
450 struct intel_connector
*intel_connector
;
452 int encoder_type
= DRM_MODE_ENCODER_NONE
;
454 intel_dvo
= kzalloc(sizeof(struct intel_dvo
), GFP_KERNEL
);
458 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
459 if (!intel_connector
) {
464 intel_encoder
= &intel_dvo
->base
;
465 drm_encoder_init(dev
, &intel_encoder
->base
,
466 &intel_dvo_enc_funcs
, encoder_type
);
468 intel_encoder
->disable
= intel_disable_dvo
;
469 intel_encoder
->enable
= intel_enable_dvo
;
470 intel_encoder
->get_hw_state
= intel_dvo_get_hw_state
;
471 intel_encoder
->get_config
= intel_dvo_get_config
;
472 intel_encoder
->compute_config
= intel_dvo_compute_config
;
473 intel_encoder
->mode_set
= intel_dvo_mode_set
;
474 intel_connector
->get_hw_state
= intel_dvo_connector_get_hw_state
;
476 /* Now, try to find a controller */
477 for (i
= 0; i
< ARRAY_SIZE(intel_dvo_devices
); i
++) {
478 struct drm_connector
*connector
= &intel_connector
->base
;
479 const struct intel_dvo_device
*dvo
= &intel_dvo_devices
[i
];
480 struct i2c_adapter
*i2c
;
484 /* Allow the I2C driver info to specify the GPIO to be used in
485 * special cases, but otherwise default to what's defined
488 if (intel_gmbus_is_port_valid(dvo
->gpio
))
490 else if (dvo
->type
== INTEL_DVO_CHIP_LVDS
)
491 gpio
= GMBUS_PORT_SSC
;
493 gpio
= GMBUS_PORT_DPB
;
495 /* Set up the I2C bus necessary for the chip we're probing.
496 * It appears that everything is on GPIOE except for panels
497 * on i830 laptops, which are on GPIOB (DVOA).
499 i2c
= intel_gmbus_get_adapter(dev_priv
, gpio
);
501 intel_dvo
->dev
= *dvo
;
503 /* GMBUS NAK handling seems to be unstable, hence let the
504 * transmitter detection run in bit banging mode for now.
506 intel_gmbus_force_bit(i2c
, true);
508 dvoinit
= dvo
->dev_ops
->init(&intel_dvo
->dev
, i2c
);
510 intel_gmbus_force_bit(i2c
, false);
515 intel_encoder
->type
= INTEL_OUTPUT_DVO
;
516 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
518 case INTEL_DVO_CHIP_TMDS
:
519 intel_encoder
->cloneable
= true;
520 drm_connector_init(dev
, connector
,
521 &intel_dvo_connector_funcs
,
522 DRM_MODE_CONNECTOR_DVII
);
523 encoder_type
= DRM_MODE_ENCODER_TMDS
;
525 case INTEL_DVO_CHIP_LVDS
:
526 intel_encoder
->cloneable
= false;
527 drm_connector_init(dev
, connector
,
528 &intel_dvo_connector_funcs
,
529 DRM_MODE_CONNECTOR_LVDS
);
530 encoder_type
= DRM_MODE_ENCODER_LVDS
;
534 drm_connector_helper_add(connector
,
535 &intel_dvo_connector_helper_funcs
);
536 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
537 connector
->interlace_allowed
= false;
538 connector
->doublescan_allowed
= false;
540 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
541 if (dvo
->type
== INTEL_DVO_CHIP_LVDS
) {
542 /* For our LVDS chipsets, we should hopefully be able
543 * to dig the fixed panel mode out of the BIOS data.
544 * However, it's in a different format from the BIOS
545 * data on chipsets with integrated LVDS (stored in AIM
546 * headers, likely), so for now, just get the current
547 * mode being output through DVO.
549 intel_dvo
->panel_fixed_mode
=
550 intel_dvo_get_current_mode(connector
);
551 intel_dvo
->panel_wants_dither
= true;
554 drm_sysfs_connector_add(connector
);
558 drm_encoder_cleanup(&intel_encoder
->base
);
560 kfree(intel_connector
);