2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices
[] = {
43 .type
= INTEL_DVO_CHIP_TMDS
,
46 .slave_addr
= SIL164_ADDR
,
47 .dev_ops
= &sil164_ops
,
50 .type
= INTEL_DVO_CHIP_TMDS
,
53 .slave_addr
= CH7xxx_ADDR
,
54 .dev_ops
= &ch7xxx_ops
,
57 .type
= INTEL_DVO_CHIP_TMDS
,
60 .slave_addr
= 0x75, /* For some ch7010 */
61 .dev_ops
= &ch7xxx_ops
,
64 .type
= INTEL_DVO_CHIP_LVDS
,
67 .slave_addr
= 0x02, /* Might also be 0x44, 0x84, 0xc4 */
71 .type
= INTEL_DVO_CHIP_TMDS
,
74 .slave_addr
= TFP410_ADDR
,
75 .dev_ops
= &tfp410_ops
,
78 .type
= INTEL_DVO_CHIP_LVDS
,
82 .gpio
= GMBUS_PORT_DPB
,
83 .dev_ops
= &ch7017_ops
,
86 .type
= INTEL_DVO_CHIP_TMDS
,
89 .slave_addr
= NS2501_ADDR
,
90 .dev_ops
= &ns2501_ops
,
95 struct intel_encoder base
;
97 struct intel_dvo_device dev
;
99 struct drm_display_mode
*panel_fixed_mode
;
100 bool panel_wants_dither
;
103 static struct intel_dvo
*enc_to_intel_dvo(struct drm_encoder
*encoder
)
105 return container_of(encoder
, struct intel_dvo
, base
.base
);
108 static struct intel_dvo
*intel_attached_dvo(struct drm_connector
*connector
)
110 return container_of(intel_attached_encoder(connector
),
111 struct intel_dvo
, base
);
114 static bool intel_dvo_connector_get_hw_state(struct intel_connector
*connector
)
116 struct intel_dvo
*intel_dvo
= intel_attached_dvo(&connector
->base
);
118 return intel_dvo
->dev
.dev_ops
->get_hw_state(&intel_dvo
->dev
);
121 static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder
,
124 struct drm_device
*dev
= encoder
->base
.dev
;
125 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
126 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(&encoder
->base
);
129 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
131 if (!(tmp
& DVO_ENABLE
))
134 *pipe
= PORT_TO_PIPE(tmp
);
139 static void intel_dvo_get_config(struct intel_encoder
*encoder
,
140 struct intel_crtc_config
*pipe_config
)
142 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
143 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(&encoder
->base
);
146 tmp
= I915_READ(intel_dvo
->dev
.dvo_reg
);
147 if (tmp
& DVO_HSYNC_ACTIVE_HIGH
)
148 flags
|= DRM_MODE_FLAG_PHSYNC
;
150 flags
|= DRM_MODE_FLAG_NHSYNC
;
151 if (tmp
& DVO_VSYNC_ACTIVE_HIGH
)
152 flags
|= DRM_MODE_FLAG_PVSYNC
;
154 flags
|= DRM_MODE_FLAG_NVSYNC
;
156 pipe_config
->adjusted_mode
.flags
|= flags
;
159 static void intel_disable_dvo(struct intel_encoder
*encoder
)
161 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
162 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(&encoder
->base
);
163 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
;
164 u32 temp
= I915_READ(dvo_reg
);
166 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
167 I915_WRITE(dvo_reg
, temp
& ~DVO_ENABLE
);
171 static void intel_enable_dvo(struct intel_encoder
*encoder
)
173 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
174 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(&encoder
->base
);
175 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
;
176 u32 temp
= I915_READ(dvo_reg
);
178 I915_WRITE(dvo_reg
, temp
| DVO_ENABLE
);
180 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
183 /* Special dpms function to support cloning between dvo/sdvo/crt. */
184 static void intel_dvo_dpms(struct drm_connector
*connector
, int mode
)
186 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
187 struct drm_crtc
*crtc
;
189 /* dvo supports only 2 dpms states. */
190 if (mode
!= DRM_MODE_DPMS_ON
)
191 mode
= DRM_MODE_DPMS_OFF
;
193 if (mode
== connector
->dpms
)
196 connector
->dpms
= mode
;
198 /* Only need to change hw state when actually enabled */
199 crtc
= intel_dvo
->base
.base
.crtc
;
201 intel_dvo
->base
.connectors_active
= false;
205 /* We call connector dpms manually below in case pipe dpms doesn't
206 * change due to cloning. */
207 if (mode
== DRM_MODE_DPMS_ON
) {
208 intel_dvo
->base
.connectors_active
= true;
210 intel_crtc_update_dpms(crtc
);
212 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
214 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
216 intel_dvo
->base
.connectors_active
= false;
218 intel_crtc_update_dpms(crtc
);
221 intel_modeset_check_state(connector
->dev
);
224 static int intel_dvo_mode_valid(struct drm_connector
*connector
,
225 struct drm_display_mode
*mode
)
227 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
229 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
230 return MODE_NO_DBLESCAN
;
232 /* XXX: Validate clock range */
234 if (intel_dvo
->panel_fixed_mode
) {
235 if (mode
->hdisplay
> intel_dvo
->panel_fixed_mode
->hdisplay
)
237 if (mode
->vdisplay
> intel_dvo
->panel_fixed_mode
->vdisplay
)
241 return intel_dvo
->dev
.dev_ops
->mode_valid(&intel_dvo
->dev
, mode
);
244 static bool intel_dvo_mode_fixup(struct drm_encoder
*encoder
,
245 const struct drm_display_mode
*mode
,
246 struct drm_display_mode
*adjusted_mode
)
248 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(encoder
);
250 /* If we have timings from the BIOS for the panel, put them in
251 * to the adjusted mode. The CRTC will be set up for this mode,
252 * with the panel scaling set up to source from the H/VDisplay
253 * of the original mode.
255 if (intel_dvo
->panel_fixed_mode
!= NULL
) {
256 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
269 if (intel_dvo
->dev
.dev_ops
->mode_fixup
)
270 return intel_dvo
->dev
.dev_ops
->mode_fixup(&intel_dvo
->dev
, mode
, adjusted_mode
);
275 static void intel_dvo_mode_set(struct drm_encoder
*encoder
,
276 struct drm_display_mode
*mode
,
277 struct drm_display_mode
*adjusted_mode
)
279 struct drm_device
*dev
= encoder
->dev
;
280 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
281 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->crtc
);
282 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(encoder
);
283 int pipe
= intel_crtc
->pipe
;
285 u32 dvo_reg
= intel_dvo
->dev
.dvo_reg
, dvo_srcdim_reg
;
286 int dpll_reg
= DPLL(pipe
);
291 dvo_srcdim_reg
= DVOA_SRCDIM
;
294 dvo_srcdim_reg
= DVOB_SRCDIM
;
297 dvo_srcdim_reg
= DVOC_SRCDIM
;
301 intel_dvo
->dev
.dev_ops
->mode_set(&intel_dvo
->dev
, mode
, adjusted_mode
);
303 /* Save the data order, since I don't know what it should be set to. */
304 dvo_val
= I915_READ(dvo_reg
) &
305 (DVO_PRESERVE_MASK
| DVO_DATA_ORDER_GBRG
);
306 dvo_val
|= DVO_DATA_ORDER_FP
| DVO_BORDER_ENABLE
|
307 DVO_BLANK_ACTIVE_HIGH
;
310 dvo_val
|= DVO_PIPE_B_SELECT
;
311 dvo_val
|= DVO_PIPE_STALL
;
312 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
313 dvo_val
|= DVO_HSYNC_ACTIVE_HIGH
;
314 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
315 dvo_val
|= DVO_VSYNC_ACTIVE_HIGH
;
317 I915_WRITE(dpll_reg
, I915_READ(dpll_reg
) | DPLL_DVO_HIGH_SPEED
);
319 /*I915_WRITE(DVOB_SRCDIM,
320 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
321 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
322 I915_WRITE(dvo_srcdim_reg
,
323 (adjusted_mode
->hdisplay
<< DVO_SRCDIM_HORIZONTAL_SHIFT
) |
324 (adjusted_mode
->vdisplay
<< DVO_SRCDIM_VERTICAL_SHIFT
));
325 /*I915_WRITE(DVOB, dvo_val);*/
326 I915_WRITE(dvo_reg
, dvo_val
);
330 * Detect the output connection on our DVO device.
334 static enum drm_connector_status
335 intel_dvo_detect(struct drm_connector
*connector
, bool force
)
337 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
338 return intel_dvo
->dev
.dev_ops
->detect(&intel_dvo
->dev
);
341 static int intel_dvo_get_modes(struct drm_connector
*connector
)
343 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
344 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
346 /* We should probably have an i2c driver get_modes function for those
347 * devices which will have a fixed set of modes determined by the chip
348 * (TV-out, for example), but for now with just TMDS and LVDS,
349 * that's not the case.
351 intel_ddc_get_modes(connector
,
352 intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPC
));
353 if (!list_empty(&connector
->probed_modes
))
356 if (intel_dvo
->panel_fixed_mode
!= NULL
) {
357 struct drm_display_mode
*mode
;
358 mode
= drm_mode_duplicate(connector
->dev
, intel_dvo
->panel_fixed_mode
);
360 drm_mode_probed_add(connector
, mode
);
368 static void intel_dvo_destroy(struct drm_connector
*connector
)
370 drm_sysfs_connector_remove(connector
);
371 drm_connector_cleanup(connector
);
375 static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs
= {
376 .mode_fixup
= intel_dvo_mode_fixup
,
377 .mode_set
= intel_dvo_mode_set
,
380 static const struct drm_connector_funcs intel_dvo_connector_funcs
= {
381 .dpms
= intel_dvo_dpms
,
382 .detect
= intel_dvo_detect
,
383 .destroy
= intel_dvo_destroy
,
384 .fill_modes
= drm_helper_probe_single_connector_modes
,
387 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
= {
388 .mode_valid
= intel_dvo_mode_valid
,
389 .get_modes
= intel_dvo_get_modes
,
390 .best_encoder
= intel_best_encoder
,
393 static void intel_dvo_enc_destroy(struct drm_encoder
*encoder
)
395 struct intel_dvo
*intel_dvo
= enc_to_intel_dvo(encoder
);
397 if (intel_dvo
->dev
.dev_ops
->destroy
)
398 intel_dvo
->dev
.dev_ops
->destroy(&intel_dvo
->dev
);
400 kfree(intel_dvo
->panel_fixed_mode
);
402 intel_encoder_destroy(encoder
);
405 static const struct drm_encoder_funcs intel_dvo_enc_funcs
= {
406 .destroy
= intel_dvo_enc_destroy
,
410 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
412 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
413 * chip being on DVOB/C and having multiple pipes.
415 static struct drm_display_mode
*
416 intel_dvo_get_current_mode(struct drm_connector
*connector
)
418 struct drm_device
*dev
= connector
->dev
;
419 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
420 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
421 uint32_t dvo_val
= I915_READ(intel_dvo
->dev
.dvo_reg
);
422 struct drm_display_mode
*mode
= NULL
;
424 /* If the DVO port is active, that'll be the LVDS, so we can pull out
425 * its timings to get how the BIOS set up the panel.
427 if (dvo_val
& DVO_ENABLE
) {
428 struct drm_crtc
*crtc
;
429 int pipe
= (dvo_val
& DVO_PIPE_B_SELECT
) ? 1 : 0;
431 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
433 mode
= intel_crtc_mode_get(dev
, crtc
);
435 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
436 if (dvo_val
& DVO_HSYNC_ACTIVE_HIGH
)
437 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
438 if (dvo_val
& DVO_VSYNC_ACTIVE_HIGH
)
439 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
447 void intel_dvo_init(struct drm_device
*dev
)
449 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
450 struct intel_encoder
*intel_encoder
;
451 struct intel_dvo
*intel_dvo
;
452 struct intel_connector
*intel_connector
;
454 int encoder_type
= DRM_MODE_ENCODER_NONE
;
456 intel_dvo
= kzalloc(sizeof(struct intel_dvo
), GFP_KERNEL
);
460 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
461 if (!intel_connector
) {
466 intel_encoder
= &intel_dvo
->base
;
467 drm_encoder_init(dev
, &intel_encoder
->base
,
468 &intel_dvo_enc_funcs
, encoder_type
);
470 intel_encoder
->disable
= intel_disable_dvo
;
471 intel_encoder
->enable
= intel_enable_dvo
;
472 intel_encoder
->get_hw_state
= intel_dvo_get_hw_state
;
473 intel_encoder
->get_config
= intel_dvo_get_config
;
474 intel_connector
->get_hw_state
= intel_dvo_connector_get_hw_state
;
476 /* Now, try to find a controller */
477 for (i
= 0; i
< ARRAY_SIZE(intel_dvo_devices
); i
++) {
478 struct drm_connector
*connector
= &intel_connector
->base
;
479 const struct intel_dvo_device
*dvo
= &intel_dvo_devices
[i
];
480 struct i2c_adapter
*i2c
;
484 /* Allow the I2C driver info to specify the GPIO to be used in
485 * special cases, but otherwise default to what's defined
488 if (intel_gmbus_is_port_valid(dvo
->gpio
))
490 else if (dvo
->type
== INTEL_DVO_CHIP_LVDS
)
491 gpio
= GMBUS_PORT_SSC
;
493 gpio
= GMBUS_PORT_DPB
;
495 /* Set up the I2C bus necessary for the chip we're probing.
496 * It appears that everything is on GPIOE except for panels
497 * on i830 laptops, which are on GPIOB (DVOA).
499 i2c
= intel_gmbus_get_adapter(dev_priv
, gpio
);
501 intel_dvo
->dev
= *dvo
;
503 /* GMBUS NAK handling seems to be unstable, hence let the
504 * transmitter detection run in bit banging mode for now.
506 intel_gmbus_force_bit(i2c
, true);
508 dvoinit
= dvo
->dev_ops
->init(&intel_dvo
->dev
, i2c
);
510 intel_gmbus_force_bit(i2c
, false);
515 intel_encoder
->type
= INTEL_OUTPUT_DVO
;
516 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
518 case INTEL_DVO_CHIP_TMDS
:
519 intel_encoder
->cloneable
= true;
520 drm_connector_init(dev
, connector
,
521 &intel_dvo_connector_funcs
,
522 DRM_MODE_CONNECTOR_DVII
);
523 encoder_type
= DRM_MODE_ENCODER_TMDS
;
525 case INTEL_DVO_CHIP_LVDS
:
526 intel_encoder
->cloneable
= false;
527 drm_connector_init(dev
, connector
,
528 &intel_dvo_connector_funcs
,
529 DRM_MODE_CONNECTOR_LVDS
);
530 encoder_type
= DRM_MODE_ENCODER_LVDS
;
534 drm_connector_helper_add(connector
,
535 &intel_dvo_connector_helper_funcs
);
536 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
537 connector
->interlace_allowed
= false;
538 connector
->doublescan_allowed
= false;
540 drm_encoder_helper_add(&intel_encoder
->base
,
541 &intel_dvo_helper_funcs
);
543 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
544 if (dvo
->type
== INTEL_DVO_CHIP_LVDS
) {
545 /* For our LVDS chipsets, we should hopefully be able
546 * to dig the fixed panel mode out of the BIOS data.
547 * However, it's in a different format from the BIOS
548 * data on chipsets with integrated LVDS (stored in AIM
549 * headers, likely), so for now, just get the current
550 * mode being output through DVO.
552 intel_dvo
->panel_fixed_mode
=
553 intel_dvo_get_current_mode(connector
);
554 intel_dvo
->panel_wants_dither
= true;
557 drm_sysfs_connector_add(connector
);
561 drm_encoder_cleanup(&intel_encoder
->base
);
563 kfree(intel_connector
);