drivers/gpu/drm/i915/intel_dvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  */
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include <drm/drmP.h>
  30 #include <drm/drm_atomic_helper.h>
  31 #include <drm/drm_crtc.h>
  32 #include "intel_drv.h"
  33 #include <drm/i915_drm.h>
  34 #include "i915_drv.h"
  35 #include "dvo.h"
  36
  37 #define SIL164_ADDR     0x38
  38 #define CH7xxx_ADDR     0x76
  39 #define TFP410_ADDR     0x38
  40 #define NS2501_ADDR     0x38
  41
  42 static const struct intel_dvo_device intel_dvo_devices[] = {
  43         {
  44                 .type = INTEL_DVO_CHIP_TMDS,
  45                 .name = "sil164",
  46                 .dvo_reg = DVOC,
  47                 .slave_addr = SIL164_ADDR,
  48                 .dev_ops = &sil164_ops,
  49         },
  50         {
  51                 .type = INTEL_DVO_CHIP_TMDS,
  52                 .name = "ch7xxx",
  53                 .dvo_reg = DVOC,
  54                 .slave_addr = CH7xxx_ADDR,
  55                 .dev_ops = &ch7xxx_ops,
  56         },
  57         {
  58                 .type = INTEL_DVO_CHIP_TMDS,
  59                 .name = "ch7xxx",
  60                 .dvo_reg = DVOC,
  61                 .slave_addr = 0x75, /* For some ch7010 */
  62                 .dev_ops = &ch7xxx_ops,
  63         },
  64         {
  65                 .type = INTEL_DVO_CHIP_LVDS,
  66                 .name = "ivch",
  67                 .dvo_reg = DVOA,
  68                 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  69                 .dev_ops = &ivch_ops,
  70         },
  71         {
  72                 .type = INTEL_DVO_CHIP_TMDS,
  73                 .name = "tfp410",
  74                 .dvo_reg = DVOC,
  75                 .slave_addr = TFP410_ADDR,
  76                 .dev_ops = &tfp410_ops,
  77         },
  78         {
  79                 .type = INTEL_DVO_CHIP_LVDS,
  80                 .name = "ch7017",
  81                 .dvo_reg = DVOC,
  82                 .slave_addr = 0x75,
  83                 .gpio = GMBUS_PIN_DPB,
  84                 .dev_ops = &ch7017_ops,
  85         },
  86         {
  87                 .type = INTEL_DVO_CHIP_TMDS,
  88                 .name = "ns2501",
  89                 .dvo_reg = DVOB,
  90                 .slave_addr = NS2501_ADDR,
  91                 .dev_ops = &ns2501_ops,
  92        }
  93 };
  94
  95 struct intel_dvo {
  96         struct intel_encoder base;
  97
  98         struct intel_dvo_device dev;
  99
 100         struct drm_display_mode *panel_fixed_mode;
 101         bool panel_wants_dither;
 102 };
 103
 104 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
 105 {
 106         return container_of(encoder, struct intel_dvo, base);
 107 }
 108
 109 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
 110 {
 111         return enc_to_dvo(intel_attached_encoder(connector));
 112 }
 113
 114 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
 115 {
 116         struct drm_device *dev = connector->base.dev;
 117         struct drm_i915_private *dev_priv = dev->dev_private;
 118         struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
 119         u32 tmp;
 120
 121         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 122
 123         if (!(tmp & DVO_ENABLE))
 124                 return false;
 125
 126         return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
 127 }
 128
 129 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
 130                                    enum pipe *pipe)
 131 {
 132         struct drm_device *dev = encoder->base.dev;
 133         struct drm_i915_private *dev_priv = dev->dev_private;
 134         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 135         u32 tmp;
 136
 137         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 138
 139         if (!(tmp & DVO_ENABLE))
 140                 return false;
 141
 142         *pipe = PORT_TO_PIPE(tmp);
 143
 144         return true;
 145 }
 146
 147 static void intel_dvo_get_config(struct intel_encoder *encoder,
 148                                  struct intel_crtc_state *pipe_config)
 149 {
 150         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 151         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 152         u32 tmp, flags = 0;
 153
 154         tmp = I915_READ(intel_dvo->dev.dvo_reg);
 155         if (tmp & DVO_HSYNC_ACTIVE_HIGH)
 156                 flags |= DRM_MODE_FLAG_PHSYNC;
 157         else
 158                 flags |= DRM_MODE_FLAG_NHSYNC;
 159         if (tmp & DVO_VSYNC_ACTIVE_HIGH)
 160                 flags |= DRM_MODE_FLAG_PVSYNC;
 161         else
 162                 flags |= DRM_MODE_FLAG_NVSYNC;
 163
 164         pipe_config->base.adjusted_mode.flags |= flags;
 165
 166         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 167 }
 168
 169 static void intel_disable_dvo(struct intel_encoder *encoder)
 170 {
 171         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 172         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 173         u32 dvo_reg = intel_dvo->dev.dvo_reg;
 174         u32 temp = I915_READ(dvo_reg);
 175
 176         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
 177         I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
 178         I915_READ(dvo_reg);
 179 }
 180
 181 static void intel_enable_dvo(struct intel_encoder *encoder)
 182 {
 183         struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
 184         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 185         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 186         u32 dvo_reg = intel_dvo->dev.dvo_reg;
 187         u32 temp = I915_READ(dvo_reg);
 188
 189         intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
 190                                          &crtc->config->base.mode,
 191                                          &crtc->config->base.adjusted_mode);
 192
 193         I915_WRITE(dvo_reg, temp | DVO_ENABLE);
 194         I915_READ(dvo_reg);
 195
 196         intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
 197 }
 198
 199 static enum drm_mode_status
 200 intel_dvo_mode_valid(struct drm_connector *connector,
 201                      struct drm_display_mode *mode)
 202 {
 203         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 204         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 205         int target_clock = mode->clock;
 206
 207         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 208                 return MODE_NO_DBLESCAN;
 209
 210         /* XXX: Validate clock range */
 211
 212         if (intel_dvo->panel_fixed_mode) {
 213                 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
 214                         return MODE_PANEL;
 215                 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
 216                         return MODE_PANEL;
 217
 218                 target_clock = intel_dvo->panel_fixed_mode->clock;
 219         }
 220
 221         if (target_clock > max_dotclk)
 222                 return MODE_CLOCK_HIGH;
 223
 224         return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
 225 }
 226
 227 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
 228                                      struct intel_crtc_state *pipe_config)
 229 {
 230         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 231         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 232
 233         /* If we have timings from the BIOS for the panel, put them in
 234          * to the adjusted mode.  The CRTC will be set up for this mode,
 235          * with the panel scaling set up to source from the H/VDisplay
 236          * of the original mode.
 237          */
 238         if (intel_dvo->panel_fixed_mode != NULL) {
 239 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
 240                 C(hdisplay);
 241                 C(hsync_start);
 242                 C(hsync_end);
 243                 C(htotal);
 244                 C(vdisplay);
 245                 C(vsync_start);
 246                 C(vsync_end);
 247                 C(vtotal);
 248                 C(clock);
 249 #undef C
 250
 251                 drm_mode_set_crtcinfo(adjusted_mode, 0);
 252         }
 253
 254         return true;
 255 }
 256
 257 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
 258 {
 259         struct drm_device *dev = encoder->base.dev;
 260         struct drm_i915_private *dev_priv = dev->dev_private;
 261         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 262         struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 263         struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
 264         int pipe = crtc->pipe;
 265         u32 dvo_val;
 266         u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
 267
 268         switch (dvo_reg) {
 269         case DVOA:
 270         default:
 271                 dvo_srcdim_reg = DVOA_SRCDIM;
 272                 break;
 273         case DVOB:
 274                 dvo_srcdim_reg = DVOB_SRCDIM;
 275                 break;
 276         case DVOC:
 277                 dvo_srcdim_reg = DVOC_SRCDIM;
 278                 break;
 279         }
 280
 281         /* Save the data order, since I don't know what it should be set to. */
 282         dvo_val = I915_READ(dvo_reg) &
 283                   (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
 284         dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
 285                    DVO_BLANK_ACTIVE_HIGH;
 286
 287         if (pipe == 1)
 288                 dvo_val |= DVO_PIPE_B_SELECT;
 289         dvo_val |= DVO_PIPE_STALL;
 290         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 291                 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
 292         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 293                 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
 294
 295         /*I915_WRITE(DVOB_SRCDIM,
 296           (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 297           (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
 298         I915_WRITE(dvo_srcdim_reg,
 299                    (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
 300                    (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
 301         /*I915_WRITE(DVOB, dvo_val);*/
 302         I915_WRITE(dvo_reg, dvo_val);
 303 }
 304
 305 /**
 306  * Detect the output connection on our DVO device.
 307  *
 308  * Unimplemented.
 309  */
 310 static enum drm_connector_status
 311 intel_dvo_detect(struct drm_connector *connector, bool force)
 312 {
 313         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 314         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 315                       connector->base.id, connector->name);
 316         return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
 317 }
 318
 319 static int intel_dvo_get_modes(struct drm_connector *connector)
 320 {
 321         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 322         struct drm_i915_private *dev_priv = connector->dev->dev_private;
 323
 324         /* We should probably have an i2c driver get_modes function for those
 325          * devices which will have a fixed set of modes determined by the chip
 326          * (TV-out, for example), but for now with just TMDS and LVDS,
 327          * that's not the case.
 328          */
 329         intel_ddc_get_modes(connector,
 330                             intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
 331         if (!list_empty(&connector->probed_modes))
 332                 return 1;
 333
 334         if (intel_dvo->panel_fixed_mode != NULL) {
 335                 struct drm_display_mode *mode;
 336                 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
 337                 if (mode) {
 338                         drm_mode_probed_add(connector, mode);
 339                         return 1;
 340                 }
 341         }
 342
 343         return 0;
 344 }
 345
 346 static void intel_dvo_destroy(struct drm_connector *connector)
 347 {
 348         drm_connector_cleanup(connector);
 349         kfree(connector);
 350 }
 351
 352 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
 353         .dpms = drm_atomic_helper_connector_dpms,
 354         .detect = intel_dvo_detect,
 355         .destroy = intel_dvo_destroy,
 356         .fill_modes = drm_helper_probe_single_connector_modes,
 357         .atomic_get_property = intel_connector_atomic_get_property,
 358         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 359         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 360 };
 361
 362 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
 363         .mode_valid = intel_dvo_mode_valid,
 364         .get_modes = intel_dvo_get_modes,
 365         .best_encoder = intel_best_encoder,
 366 };
 367
 368 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
 369 {
 370         struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
 371
 372         if (intel_dvo->dev.dev_ops->destroy)
 373                 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
 374
 375         kfree(intel_dvo->panel_fixed_mode);
 376
 377         intel_encoder_destroy(encoder);
 378 }
 379
 380 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
 381         .destroy = intel_dvo_enc_destroy,
 382 };
 383
 384 /**
 385  * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 386  *
 387  * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 388  * chip being on DVOB/C and having multiple pipes.
 389  */
 390 static struct drm_display_mode *
 391 intel_dvo_get_current_mode(struct drm_connector *connector)
 392 {
 393         struct drm_device *dev = connector->dev;
 394         struct drm_i915_private *dev_priv = dev->dev_private;
 395         struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
 396         uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
 397         struct drm_display_mode *mode = NULL;
 398
 399         /* If the DVO port is active, that'll be the LVDS, so we can pull out
 400          * its timings to get how the BIOS set up the panel.
 401          */
 402         if (dvo_val & DVO_ENABLE) {
 403                 struct drm_crtc *crtc;
 404                 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
 405
 406                 crtc = intel_get_crtc_for_pipe(dev, pipe);
 407                 if (crtc) {
 408                         mode = intel_crtc_mode_get(dev, crtc);
 409                         if (mode) {
 410                                 mode->type |= DRM_MODE_TYPE_PREFERRED;
 411                                 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
 412                                         mode->flags |= DRM_MODE_FLAG_PHSYNC;
 413                                 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
 414                                         mode->flags |= DRM_MODE_FLAG_PVSYNC;
 415                         }
 416                 }
 417         }
 418
 419         return mode;
 420 }
 421
 422 void intel_dvo_init(struct drm_device *dev)
 423 {
 424         struct drm_i915_private *dev_priv = dev->dev_private;
 425         struct intel_encoder *intel_encoder;
 426         struct intel_dvo *intel_dvo;
 427         struct intel_connector *intel_connector;
 428         int i;
 429         int encoder_type = DRM_MODE_ENCODER_NONE;
 430
 431         intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
 432         if (!intel_dvo)
 433                 return;
 434
 435         intel_connector = intel_connector_alloc();
 436         if (!intel_connector) {
 437                 kfree(intel_dvo);
 438                 return;
 439         }
 440
 441         intel_encoder = &intel_dvo->base;
 442         drm_encoder_init(dev, &intel_encoder->base,
 443                          &intel_dvo_enc_funcs, encoder_type);
 444
 445         intel_encoder->disable = intel_disable_dvo;
 446         intel_encoder->enable = intel_enable_dvo;
 447         intel_encoder->get_hw_state = intel_dvo_get_hw_state;
 448         intel_encoder->get_config = intel_dvo_get_config;
 449         intel_encoder->compute_config = intel_dvo_compute_config;
 450         intel_encoder->pre_enable = intel_dvo_pre_enable;
 451         intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
 452         intel_connector->unregister = intel_connector_unregister;
 453
 454         /* Now, try to find a controller */
 455         for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
 456                 struct drm_connector *connector = &intel_connector->base;
 457                 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
 458                 struct i2c_adapter *i2c;
 459                 int gpio;
 460                 bool dvoinit;
 461                 enum pipe pipe;
 462                 uint32_t dpll[I915_MAX_PIPES];
 463
 464                 /* Allow the I2C driver info to specify the GPIO to be used in
 465                  * special cases, but otherwise default to what's defined
 466                  * in the spec.
 467                  */
 468                 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
 469                         gpio = dvo->gpio;
 470                 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
 471                         gpio = GMBUS_PIN_SSC;
 472                 else
 473                         gpio = GMBUS_PIN_DPB;
 474
 475                 /* Set up the I2C bus necessary for the chip we're probing.
 476                  * It appears that everything is on GPIOE except for panels
 477                  * on i830 laptops, which are on GPIOB (DVOA).
 478                  */
 479                 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
 480
 481                 intel_dvo->dev = *dvo;
 482
 483                 /* GMBUS NAK handling seems to be unstable, hence let the
 484                  * transmitter detection run in bit banging mode for now.
 485                  */
 486                 intel_gmbus_force_bit(i2c, true);
 487
 488                 /* ns2501 requires the DVO 2x clock before it will
 489                  * respond to i2c accesses, so make sure we have
 490                  * have the clock enabled before we attempt to
 491                  * initialize the device.
 492                  */
 493                 for_each_pipe(dev_priv, pipe) {
 494                         dpll[pipe] = I915_READ(DPLL(pipe));
 495                         I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
 496                 }
 497
 498                 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
 499
 500                 /* restore the DVO 2x clock state to original */
 501                 for_each_pipe(dev_priv, pipe) {
 502                         I915_WRITE(DPLL(pipe), dpll[pipe]);
 503                 }
 504
 505                 intel_gmbus_force_bit(i2c, false);
 506
 507                 if (!dvoinit)
 508                         continue;
 509
 510                 intel_encoder->type = INTEL_OUTPUT_DVO;
 511                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 512                 switch (dvo->type) {
 513                 case INTEL_DVO_CHIP_TMDS:
 514                         intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
 515                                 (1 << INTEL_OUTPUT_DVO);
 516                         drm_connector_init(dev, connector,
 517                                            &intel_dvo_connector_funcs,
 518                                            DRM_MODE_CONNECTOR_DVII);
 519                         encoder_type = DRM_MODE_ENCODER_TMDS;
 520                         break;
 521                 case INTEL_DVO_CHIP_LVDS:
 522                         intel_encoder->cloneable = 0;
 523                         drm_connector_init(dev, connector,
 524                                            &intel_dvo_connector_funcs,
 525                                            DRM_MODE_CONNECTOR_LVDS);
 526                         encoder_type = DRM_MODE_ENCODER_LVDS;
 527                         break;
 528                 }
 529
 530                 drm_connector_helper_add(connector,
 531                                          &intel_dvo_connector_helper_funcs);
 532                 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 533                 connector->interlace_allowed = false;
 534                 connector->doublescan_allowed = false;
 535
 536                 intel_connector_attach_encoder(intel_connector, intel_encoder);
 537                 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
 538                         /* For our LVDS chipsets, we should hopefully be able
 539                          * to dig the fixed panel mode out of the BIOS data.
 540                          * However, it's in a different format from the BIOS
 541                          * data on chipsets with integrated LVDS (stored in AIM
 542                          * headers, likely), so for now, just get the current
 543                          * mode being output through DVO.
 544                          */
 545                         intel_dvo->panel_fixed_mode =
 546                                 intel_dvo_get_current_mode(connector);
 547                         intel_dvo->panel_wants_dither = true;
 548                 }
 549
 550                 drm_connector_register(connector);
 551                 return;
 552         }
 553
 554         drm_encoder_cleanup(&intel_encoder->base);
 555         kfree(intel_dvo);
 556         kfree(intel_connector);
 557 }