2 * Copyright © 2014 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Ben Widawsky <ben@bwidawsk.net>
25 * Michel Thierry <michel.thierry@intel.com>
26 * Thomas Daniel <thomas.daniel@intel.com>
27 * Oscar Mateo <oscar.mateo@intel.com>
32 * GEN8 brings an expansion of the HW contexts: "Logical Ring Contexts".
33 * These expanded contexts enable a number of new abilities, especially
34 * "Execlists" (also implemented in this file).
36 * Execlists are the new method by which, on gen8+ hardware, workloads are
37 * submitted for execution (as opposed to the legacy, ringbuffer-based, method).
41 #include <drm/i915_drm.h>
44 #define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
45 #define GEN8_LR_CONTEXT_OTHER_SIZE (2 * PAGE_SIZE)
47 #define GEN8_LR_CONTEXT_ALIGN 4096
49 int intel_sanitize_enable_execlists(struct drm_device
*dev
, int enable_execlists
)
51 WARN_ON(i915
.enable_ppgtt
== -1);
53 if (enable_execlists
== 0)
56 if (HAS_LOGICAL_RING_CONTEXTS(dev
) && USES_PPGTT(dev
))
62 void intel_lr_context_free(struct intel_context
*ctx
)
66 for (i
= 0; i
< I915_NUM_RINGS
; i
++) {
67 struct drm_i915_gem_object
*ctx_obj
= ctx
->engine
[i
].state
;
69 i915_gem_object_ggtt_unpin(ctx_obj
);
70 drm_gem_object_unreference(&ctx_obj
->base
);
75 static uint32_t get_lr_context_size(struct intel_engine_cs
*ring
)
79 WARN_ON(INTEL_INFO(ring
->dev
)->gen
!= 8);
83 ret
= GEN8_LR_CONTEXT_RENDER_SIZE
;
89 ret
= GEN8_LR_CONTEXT_OTHER_SIZE
;
96 int intel_lr_context_deferred_create(struct intel_context
*ctx
,
97 struct intel_engine_cs
*ring
)
99 struct drm_device
*dev
= ring
->dev
;
100 struct drm_i915_gem_object
*ctx_obj
;
101 uint32_t context_size
;
104 WARN_ON(ctx
->legacy_hw_ctx
.rcs_state
!= NULL
);
106 context_size
= round_up(get_lr_context_size(ring
), 4096);
108 ctx_obj
= i915_gem_alloc_context_obj(dev
, context_size
);
109 if (IS_ERR(ctx_obj
)) {
110 ret
= PTR_ERR(ctx_obj
);
111 DRM_DEBUG_DRIVER("Alloc LRC backing obj failed: %d\n", ret
);
115 ret
= i915_gem_obj_ggtt_pin(ctx_obj
, GEN8_LR_CONTEXT_ALIGN
, 0);
117 DRM_DEBUG_DRIVER("Pin LRC backing obj failed: %d\n", ret
);
118 drm_gem_object_unreference(&ctx_obj
->base
);
122 ctx
->engine
[ring
->id
].state
= ctx_obj
;