drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         bool is_dual_link;
  53         u32 reg;
  54
  55         struct intel_lvds_connector *attached_connector;
  56 };
  57
  58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  59 {
  60         return container_of(encoder, struct intel_lvds_encoder, base.base);
  61 }
  62
  63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  64 {
  65         return container_of(connector, struct intel_lvds_connector, base.base);
  66 }
  67
  68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  69                                     enum pipe *pipe)
  70 {
  71         struct drm_device *dev = encoder->base.dev;
  72         struct drm_i915_private *dev_priv = dev->dev_private;
  73         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  74         u32 tmp;
  75
  76         tmp = I915_READ(lvds_encoder->reg);
  77
  78         if (!(tmp & LVDS_PORT_EN))
  79                 return false;
  80
  81         if (HAS_PCH_CPT(dev))
  82                 *pipe = PORT_TO_PIPE_CPT(tmp);
  83         else
  84                 *pipe = PORT_TO_PIPE(tmp);
  85
  86         return true;
  87 }
  88
  89 static void intel_lvds_get_config(struct intel_encoder *encoder,
  90                                   struct intel_crtc_config *pipe_config)
  91 {
  92         struct drm_device *dev = encoder->base.dev;
  93         struct drm_i915_private *dev_priv = dev->dev_private;
  94         u32 lvds_reg, tmp, flags = 0;
  95
  96         if (HAS_PCH_SPLIT(dev))
  97                 lvds_reg = PCH_LVDS;
  98         else
  99                 lvds_reg = LVDS;
 100
 101         tmp = I915_READ(lvds_reg);
 102         if (tmp & LVDS_HSYNC_POLARITY)
 103                 flags |= DRM_MODE_FLAG_NHSYNC;
 104         else
 105                 flags |= DRM_MODE_FLAG_PHSYNC;
 106         if (tmp & LVDS_VSYNC_POLARITY)
 107                 flags |= DRM_MODE_FLAG_NVSYNC;
 108         else
 109                 flags |= DRM_MODE_FLAG_PVSYNC;
 110
 111         pipe_config->adjusted_mode.flags |= flags;
 112 }
 113
 114 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
 115  * This is an exception to the general rule that mode_set doesn't turn
 116  * things on.
 117  */
 118 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
 119 {
 120         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 121         struct drm_device *dev = encoder->base.dev;
 122         struct drm_i915_private *dev_priv = dev->dev_private;
 123         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 124         struct drm_display_mode *fixed_mode =
 125                 lvds_encoder->attached_connector->base.panel.fixed_mode;
 126         int pipe = intel_crtc->pipe;
 127         u32 temp;
 128
 129         temp = I915_READ(lvds_encoder->reg);
 130         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 131
 132         if (HAS_PCH_CPT(dev)) {
 133                 temp &= ~PORT_TRANS_SEL_MASK;
 134                 temp |= PORT_TRANS_SEL_CPT(pipe);
 135         } else {
 136                 if (pipe == 1) {
 137                         temp |= LVDS_PIPEB_SELECT;
 138                 } else {
 139                         temp &= ~LVDS_PIPEB_SELECT;
 140                 }
 141         }
 142
 143         /* set the corresponsding LVDS_BORDER bit */
 144         temp &= ~LVDS_BORDER_ENABLE;
 145         temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
 146         /* Set the B0-B3 data pairs corresponding to whether we're going to
 147          * set the DPLLs for dual-channel mode or not.
 148          */
 149         if (lvds_encoder->is_dual_link)
 150                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 151         else
 152                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 153
 154         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 155          * appropriately here, but we need to look more thoroughly into how
 156          * panels behave in the two modes.
 157          */
 158
 159         /* Set the dithering flag on LVDS as needed, note that there is no
 160          * special lvds dither control bit on pch-split platforms, dithering is
 161          * only controlled through the PIPECONF reg. */
 162         if (INTEL_INFO(dev)->gen == 4) {
 163                 /* Bspec wording suggests that LVDS port dithering only exists
 164                  * for 18bpp panels. */
 165                 if (intel_crtc->config.dither &&
 166                     intel_crtc->config.pipe_bpp == 18)
 167                         temp |= LVDS_ENABLE_DITHER;
 168                 else
 169                         temp &= ~LVDS_ENABLE_DITHER;
 170         }
 171         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 172         if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
 173                 temp |= LVDS_HSYNC_POLARITY;
 174         if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
 175                 temp |= LVDS_VSYNC_POLARITY;
 176
 177         I915_WRITE(lvds_encoder->reg, temp);
 178 }
 179
 180 /**
 181  * Sets the power state for the panel.
 182  */
 183 static void intel_enable_lvds(struct intel_encoder *encoder)
 184 {
 185         struct drm_device *dev = encoder->base.dev;
 186         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 187         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 188         struct drm_i915_private *dev_priv = dev->dev_private;
 189         u32 ctl_reg, stat_reg;
 190
 191         if (HAS_PCH_SPLIT(dev)) {
 192                 ctl_reg = PCH_PP_CONTROL;
 193                 stat_reg = PCH_PP_STATUS;
 194         } else {
 195                 ctl_reg = PP_CONTROL;
 196                 stat_reg = PP_STATUS;
 197         }
 198
 199         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 200
 201         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 202         POSTING_READ(lvds_encoder->reg);
 203         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 204                 DRM_ERROR("timed out waiting for panel to power on\n");
 205
 206         intel_panel_enable_backlight(dev, intel_crtc->pipe);
 207 }
 208
 209 static void intel_disable_lvds(struct intel_encoder *encoder)
 210 {
 211         struct drm_device *dev = encoder->base.dev;
 212         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 213         struct drm_i915_private *dev_priv = dev->dev_private;
 214         u32 ctl_reg, stat_reg;
 215
 216         if (HAS_PCH_SPLIT(dev)) {
 217                 ctl_reg = PCH_PP_CONTROL;
 218                 stat_reg = PCH_PP_STATUS;
 219         } else {
 220                 ctl_reg = PP_CONTROL;
 221                 stat_reg = PP_STATUS;
 222         }
 223
 224         intel_panel_disable_backlight(dev);
 225
 226         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 227         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 228                 DRM_ERROR("timed out waiting for panel to power off\n");
 229
 230         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 231         POSTING_READ(lvds_encoder->reg);
 232 }
 233
 234 static int intel_lvds_mode_valid(struct drm_connector *connector,
 235                                  struct drm_display_mode *mode)
 236 {
 237         struct intel_connector *intel_connector = to_intel_connector(connector);
 238         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 239
 240         if (mode->hdisplay > fixed_mode->hdisplay)
 241                 return MODE_PANEL;
 242         if (mode->vdisplay > fixed_mode->vdisplay)
 243                 return MODE_PANEL;
 244
 245         return MODE_OK;
 246 }
 247
 248 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 249                                       struct intel_crtc_config *pipe_config)
 250 {
 251         struct drm_device *dev = intel_encoder->base.dev;
 252         struct drm_i915_private *dev_priv = dev->dev_private;
 253         struct intel_lvds_encoder *lvds_encoder =
 254                 to_lvds_encoder(&intel_encoder->base);
 255         struct intel_connector *intel_connector =
 256                 &lvds_encoder->attached_connector->base;
 257         struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 258         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 259         unsigned int lvds_bpp;
 260
 261         /* Should never happen!! */
 262         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 263                 DRM_ERROR("Can't support LVDS on pipe A\n");
 264                 return false;
 265         }
 266
 267         if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
 268             LVDS_A3_POWER_UP)
 269                 lvds_bpp = 8*3;
 270         else
 271                 lvds_bpp = 6*3;
 272
 273         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 274                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 275                               pipe_config->pipe_bpp, lvds_bpp);
 276                 pipe_config->pipe_bpp = lvds_bpp;
 277         }
 278
 279         /*
 280          * We have timings from the BIOS for the panel, put them in
 281          * to the adjusted mode.  The CRTC will be set up for this mode,
 282          * with the panel scaling set up to source from the H/VDisplay
 283          * of the original mode.
 284          */
 285         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 286                                adjusted_mode);
 287
 288         if (HAS_PCH_SPLIT(dev)) {
 289                 pipe_config->has_pch_encoder = true;
 290
 291                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 292                                         intel_connector->panel.fitting_mode);
 293                 return true;
 294         } else {
 295                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 296                                          intel_connector->panel.fitting_mode);
 297         }
 298
 299         drm_mode_set_crtcinfo(adjusted_mode, 0);
 300         pipe_config->timings_set = true;
 301
 302         /*
 303          * XXX: It would be nice to support lower refresh rates on the
 304          * panels to reduce power consumption, and perhaps match the
 305          * user's requested refresh rate.
 306          */
 307
 308         return true;
 309 }
 310
 311 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 312                                 struct drm_display_mode *mode,
 313                                 struct drm_display_mode *adjusted_mode)
 314 {
 315         /*
 316          * The LVDS pin pair will already have been turned on in the
 317          * intel_crtc_mode_set since it has a large impact on the DPLL
 318          * settings.
 319          */
 320 }
 321
 322 /**
 323  * Detect the LVDS connection.
 324  *
 325  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 326  * connected and closed means disconnected.  We also send hotplug events as
 327  * needed, using lid status notification from the input layer.
 328  */
 329 static enum drm_connector_status
 330 intel_lvds_detect(struct drm_connector *connector, bool force)
 331 {
 332         struct drm_device *dev = connector->dev;
 333         enum drm_connector_status status;
 334
 335         status = intel_panel_detect(dev);
 336         if (status != connector_status_unknown)
 337                 return status;
 338
 339         return connector_status_connected;
 340 }
 341
 342 /**
 343  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 344  */
 345 static int intel_lvds_get_modes(struct drm_connector *connector)
 346 {
 347         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 348         struct drm_device *dev = connector->dev;
 349         struct drm_display_mode *mode;
 350
 351         /* use cached edid if we have one */
 352         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 353                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 354
 355         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 356         if (mode == NULL)
 357                 return 0;
 358
 359         drm_mode_probed_add(connector, mode);
 360         return 1;
 361 }
 362
 363 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 364 {
 365         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 366         return 1;
 367 }
 368
 369 /* The GPU hangs up on these systems if modeset is performed on LID open */
 370 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 371         {
 372                 .callback = intel_no_modeset_on_lid_dmi_callback,
 373                 .ident = "Toshiba Tecra A11",
 374                 .matches = {
 375                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 376                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 377                 },
 378         },
 379
 380         { }     /* terminating entry */
 381 };
 382
 383 /*
 384  * Lid events. Note the use of 'modeset':
 385  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 386  *    and set it to MODESET_DONE on open
 387  *  - we use it as a "only once" bit (ie we ignore
 388  *    duplicate events where it was already properly set)
 389  *  - the suspend/resume paths will set it to
 390  *    MODESET_SUSPENDED and ignore the lid open event,
 391  *    because they restore the mode ("lid open").
 392  */
 393 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 394                             void *unused)
 395 {
 396         struct intel_lvds_connector *lvds_connector =
 397                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 398         struct drm_connector *connector = &lvds_connector->base.base;
 399         struct drm_device *dev = connector->dev;
 400         struct drm_i915_private *dev_priv = dev->dev_private;
 401
 402         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 403                 return NOTIFY_OK;
 404
 405         mutex_lock(&dev_priv->modeset_restore_lock);
 406         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 407                 goto exit;
 408         /*
 409          * check and update the status of LVDS connector after receiving
 410          * the LID nofication event.
 411          */
 412         connector->status = connector->funcs->detect(connector, false);
 413
 414         /* Don't force modeset on machines where it causes a GPU lockup */
 415         if (dmi_check_system(intel_no_modeset_on_lid))
 416                 goto exit;
 417         if (!acpi_lid_open()) {
 418                 /* do modeset on next lid open event */
 419                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 420                 goto exit;
 421         }
 422
 423         if (dev_priv->modeset_restore == MODESET_DONE)
 424                 goto exit;
 425
 426         drm_modeset_lock_all(dev);
 427         intel_modeset_setup_hw_state(dev, true);
 428         drm_modeset_unlock_all(dev);
 429
 430         dev_priv->modeset_restore = MODESET_DONE;
 431
 432 exit:
 433         mutex_unlock(&dev_priv->modeset_restore_lock);
 434         return NOTIFY_OK;
 435 }
 436
 437 /**
 438  * intel_lvds_destroy - unregister and free LVDS structures
 439  * @connector: connector to free
 440  *
 441  * Unregister the DDC bus for this connector then free the driver private
 442  * structure.
 443  */
 444 static void intel_lvds_destroy(struct drm_connector *connector)
 445 {
 446         struct intel_lvds_connector *lvds_connector =
 447                 to_lvds_connector(connector);
 448
 449         if (lvds_connector->lid_notifier.notifier_call)
 450                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 451
 452         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 453                 kfree(lvds_connector->base.edid);
 454
 455         intel_panel_fini(&lvds_connector->base.panel);
 456
 457         drm_sysfs_connector_remove(connector);
 458         drm_connector_cleanup(connector);
 459         kfree(connector);
 460 }
 461
 462 static int intel_lvds_set_property(struct drm_connector *connector,
 463                                    struct drm_property *property,
 464                                    uint64_t value)
 465 {
 466         struct intel_connector *intel_connector = to_intel_connector(connector);
 467         struct drm_device *dev = connector->dev;
 468
 469         if (property == dev->mode_config.scaling_mode_property) {
 470                 struct drm_crtc *crtc;
 471
 472                 if (value == DRM_MODE_SCALE_NONE) {
 473                         DRM_DEBUG_KMS("no scaling not supported\n");
 474                         return -EINVAL;
 475                 }
 476
 477                 if (intel_connector->panel.fitting_mode == value) {
 478                         /* the LVDS scaling property is not changed */
 479                         return 0;
 480                 }
 481                 intel_connector->panel.fitting_mode = value;
 482
 483                 crtc = intel_attached_encoder(connector)->base.crtc;
 484                 if (crtc && crtc->enabled) {
 485                         /*
 486                          * If the CRTC is enabled, the display will be changed
 487                          * according to the new panel fitting mode.
 488                          */
 489                         intel_crtc_restore_mode(crtc);
 490                 }
 491         }
 492
 493         return 0;
 494 }
 495
 496 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 497         .mode_set = intel_lvds_mode_set,
 498 };
 499
 500 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 501         .get_modes = intel_lvds_get_modes,
 502         .mode_valid = intel_lvds_mode_valid,
 503         .best_encoder = intel_best_encoder,
 504 };
 505
 506 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 507         .dpms = intel_connector_dpms,
 508         .detect = intel_lvds_detect,
 509         .fill_modes = drm_helper_probe_single_connector_modes,
 510         .set_property = intel_lvds_set_property,
 511         .destroy = intel_lvds_destroy,
 512 };
 513
 514 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 515         .destroy = intel_encoder_destroy,
 516 };
 517
 518 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 519 {
 520         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 521         return 1;
 522 }
 523
 524 /* These systems claim to have LVDS, but really don't */
 525 static const struct dmi_system_id intel_no_lvds[] = {
 526         {
 527                 .callback = intel_no_lvds_dmi_callback,
 528                 .ident = "Apple Mac Mini (Core series)",
 529                 .matches = {
 530                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 531                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 532                 },
 533         },
 534         {
 535                 .callback = intel_no_lvds_dmi_callback,
 536                 .ident = "Apple Mac Mini (Core 2 series)",
 537                 .matches = {
 538                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 539                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 540                 },
 541         },
 542         {
 543                 .callback = intel_no_lvds_dmi_callback,
 544                 .ident = "MSI IM-945GSE-A",
 545                 .matches = {
 546                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 547                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 548                 },
 549         },
 550         {
 551                 .callback = intel_no_lvds_dmi_callback,
 552                 .ident = "Dell Studio Hybrid",
 553                 .matches = {
 554                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 555                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 556                 },
 557         },
 558         {
 559                 .callback = intel_no_lvds_dmi_callback,
 560                 .ident = "Dell OptiPlex FX170",
 561                 .matches = {
 562                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 563                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 564                 },
 565         },
 566         {
 567                 .callback = intel_no_lvds_dmi_callback,
 568                 .ident = "AOpen Mini PC",
 569                 .matches = {
 570                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 571                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 572                 },
 573         },
 574         {
 575                 .callback = intel_no_lvds_dmi_callback,
 576                 .ident = "AOpen Mini PC MP915",
 577                 .matches = {
 578                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 579                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 580                 },
 581         },
 582         {
 583                 .callback = intel_no_lvds_dmi_callback,
 584                 .ident = "AOpen i915GMm-HFS",
 585                 .matches = {
 586                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 587                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 588                 },
 589         },
 590         {
 591                 .callback = intel_no_lvds_dmi_callback,
 592                 .ident = "AOpen i45GMx-I",
 593                 .matches = {
 594                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 595                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 596                 },
 597         },
 598         {
 599                 .callback = intel_no_lvds_dmi_callback,
 600                 .ident = "Aopen i945GTt-VFA",
 601                 .matches = {
 602                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 603                 },
 604         },
 605         {
 606                 .callback = intel_no_lvds_dmi_callback,
 607                 .ident = "Clientron U800",
 608                 .matches = {
 609                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 610                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 611                 },
 612         },
 613         {
 614                 .callback = intel_no_lvds_dmi_callback,
 615                 .ident = "Clientron E830",
 616                 .matches = {
 617                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 618                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 619                 },
 620         },
 621         {
 622                 .callback = intel_no_lvds_dmi_callback,
 623                 .ident = "Asus EeeBox PC EB1007",
 624                 .matches = {
 625                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 626                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 627                 },
 628         },
 629         {
 630                 .callback = intel_no_lvds_dmi_callback,
 631                 .ident = "Asus AT5NM10T-I",
 632                 .matches = {
 633                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 634                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 635                 },
 636         },
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "Hewlett-Packard HP t5740",
 640                 .matches = {
 641                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 642                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "Hewlett-Packard t5745",
 648                 .matches = {
 649                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 650                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "Hewlett-Packard st5747",
 656                 .matches = {
 657                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 658                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 659                 },
 660         },
 661         {
 662                 .callback = intel_no_lvds_dmi_callback,
 663                 .ident = "MSI Wind Box DC500",
 664                 .matches = {
 665                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 666                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 667                 },
 668         },
 669         {
 670                 .callback = intel_no_lvds_dmi_callback,
 671                 .ident = "Gigabyte GA-D525TUD",
 672                 .matches = {
 673                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 674                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 675                 },
 676         },
 677         {
 678                 .callback = intel_no_lvds_dmi_callback,
 679                 .ident = "Supermicro X7SPA-H",
 680                 .matches = {
 681                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 682                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 683                 },
 684         },
 685         {
 686                 .callback = intel_no_lvds_dmi_callback,
 687                 .ident = "Fujitsu Esprimo Q900",
 688                 .matches = {
 689                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 690                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 691                 },
 692         },
 693         {
 694                 .callback = intel_no_lvds_dmi_callback,
 695                 .ident = "Intel D510MO",
 696                 .matches = {
 697                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 698                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 699                 },
 700         },
 701         {
 702                 .callback = intel_no_lvds_dmi_callback,
 703                 .ident = "Intel D525MW",
 704                 .matches = {
 705                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 706                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 707                 },
 708         },
 709
 710         { }     /* terminating entry */
 711 };
 712
 713 /**
 714  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 715  * @dev: drm device
 716  * @connector: LVDS connector
 717  *
 718  * Find the reduced downclock for LVDS in EDID.
 719  */
 720 static void intel_find_lvds_downclock(struct drm_device *dev,
 721                                       struct drm_display_mode *fixed_mode,
 722                                       struct drm_connector *connector)
 723 {
 724         struct drm_i915_private *dev_priv = dev->dev_private;
 725         struct drm_display_mode *scan;
 726         int temp_downclock;
 727
 728         temp_downclock = fixed_mode->clock;
 729         list_for_each_entry(scan, &connector->probed_modes, head) {
 730                 /*
 731                  * If one mode has the same resolution with the fixed_panel
 732                  * mode while they have the different refresh rate, it means
 733                  * that the reduced downclock is found for the LVDS. In such
 734                  * case we can set the different FPx0/1 to dynamically select
 735                  * between low and high frequency.
 736                  */
 737                 if (scan->hdisplay == fixed_mode->hdisplay &&
 738                     scan->hsync_start == fixed_mode->hsync_start &&
 739                     scan->hsync_end == fixed_mode->hsync_end &&
 740                     scan->htotal == fixed_mode->htotal &&
 741                     scan->vdisplay == fixed_mode->vdisplay &&
 742                     scan->vsync_start == fixed_mode->vsync_start &&
 743                     scan->vsync_end == fixed_mode->vsync_end &&
 744                     scan->vtotal == fixed_mode->vtotal) {
 745                         if (scan->clock < temp_downclock) {
 746                                 /*
 747                                  * The downclock is already found. But we
 748                                  * expect to find the lower downclock.
 749                                  */
 750                                 temp_downclock = scan->clock;
 751                         }
 752                 }
 753         }
 754         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 755                 /* We found the downclock for LVDS. */
 756                 dev_priv->lvds_downclock_avail = 1;
 757                 dev_priv->lvds_downclock = temp_downclock;
 758                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 759                               "Normal clock %dKhz, downclock %dKhz\n",
 760                               fixed_mode->clock, temp_downclock);
 761         }
 762 }
 763
 764 /*
 765  * Enumerate the child dev array parsed from VBT to check whether
 766  * the LVDS is present.
 767  * If it is present, return 1.
 768  * If it is not present, return false.
 769  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 770  */
 771 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 772                                    u8 *i2c_pin)
 773 {
 774         struct drm_i915_private *dev_priv = dev->dev_private;
 775         int i;
 776
 777         if (!dev_priv->vbt.child_dev_num)
 778                 return true;
 779
 780         for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
 781                 struct child_device_config *child = dev_priv->vbt.child_dev + i;
 782
 783                 /* If the device type is not LFP, continue.
 784                  * We have to check both the new identifiers as well as the
 785                  * old for compatibility with some BIOSes.
 786                  */
 787                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 788                     child->device_type != DEVICE_TYPE_LFP)
 789                         continue;
 790
 791                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 792                         *i2c_pin = child->i2c_pin;
 793
 794                 /* However, we cannot trust the BIOS writers to populate
 795                  * the VBT correctly.  Since LVDS requires additional
 796                  * information from AIM blocks, a non-zero addin offset is
 797                  * a good indicator that the LVDS is actually present.
 798                  */
 799                 if (child->addin_offset)
 800                         return true;
 801
 802                 /* But even then some BIOS writers perform some black magic
 803                  * and instantiate the device without reference to any
 804                  * additional data.  Trust that if the VBT was written into
 805                  * the OpRegion then they have validated the LVDS's existence.
 806                  */
 807                 if (dev_priv->opregion.vbt)
 808                         return true;
 809         }
 810
 811         return false;
 812 }
 813
 814 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 815 {
 816         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 817         return 1;
 818 }
 819
 820 static const struct dmi_system_id intel_dual_link_lvds[] = {
 821         {
 822                 .callback = intel_dual_link_lvds_callback,
 823                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 824                 .matches = {
 825                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 826                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 827                 },
 828         },
 829         { }     /* terminating entry */
 830 };
 831
 832 bool intel_is_dual_link_lvds(struct drm_device *dev)
 833 {
 834         struct intel_encoder *encoder;
 835         struct intel_lvds_encoder *lvds_encoder;
 836
 837         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 838                             base.head) {
 839                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 840                         lvds_encoder = to_lvds_encoder(&encoder->base);
 841
 842                         return lvds_encoder->is_dual_link;
 843                 }
 844         }
 845
 846         return false;
 847 }
 848
 849 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 850 {
 851         struct drm_device *dev = lvds_encoder->base.base.dev;
 852         unsigned int val;
 853         struct drm_i915_private *dev_priv = dev->dev_private;
 854
 855         /* use the module option value if specified */
 856         if (i915_lvds_channel_mode > 0)
 857                 return i915_lvds_channel_mode == 2;
 858
 859         if (dmi_check_system(intel_dual_link_lvds))
 860                 return true;
 861
 862         /* BIOS should set the proper LVDS register value at boot, but
 863          * in reality, it doesn't set the value when the lid is closed;
 864          * we need to check "the value to be set" in VBT when LVDS
 865          * register is uninitialized.
 866          */
 867         val = I915_READ(lvds_encoder->reg);
 868         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 869                 val = dev_priv->vbt.bios_lvds_val;
 870
 871         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 872 }
 873
 874 static bool intel_lvds_supported(struct drm_device *dev)
 875 {
 876         /* With the introduction of the PCH we gained a dedicated
 877          * LVDS presence pin, use it. */
 878         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 879                 return true;
 880
 881         /* Otherwise LVDS was only attached to mobile products,
 882          * except for the inglorious 830gm */
 883         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 884                 return true;
 885
 886         return false;
 887 }
 888
 889 /**
 890  * intel_lvds_init - setup LVDS connectors on this device
 891  * @dev: drm device
 892  *
 893  * Create the connector, register the LVDS DDC bus, and try to figure out what
 894  * modes we can display on the LVDS panel (if present).
 895  */
 896 void intel_lvds_init(struct drm_device *dev)
 897 {
 898         struct drm_i915_private *dev_priv = dev->dev_private;
 899         struct intel_lvds_encoder *lvds_encoder;
 900         struct intel_encoder *intel_encoder;
 901         struct intel_lvds_connector *lvds_connector;
 902         struct intel_connector *intel_connector;
 903         struct drm_connector *connector;
 904         struct drm_encoder *encoder;
 905         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 906         struct drm_display_mode *fixed_mode = NULL;
 907         struct edid *edid;
 908         struct drm_crtc *crtc;
 909         u32 lvds;
 910         int pipe;
 911         u8 pin;
 912
 913         if (!intel_lvds_supported(dev))
 914                 return;
 915
 916         /* Skip init on machines we know falsely report LVDS */
 917         if (dmi_check_system(intel_no_lvds))
 918                 return;
 919
 920         pin = GMBUS_PORT_PANEL;
 921         if (!lvds_is_present_in_vbt(dev, &pin)) {
 922                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 923                 return;
 924         }
 925
 926         if (HAS_PCH_SPLIT(dev)) {
 927                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 928                         return;
 929                 if (dev_priv->vbt.edp_support) {
 930                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 931                         return;
 932                 }
 933         }
 934
 935         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
 936         if (!lvds_encoder)
 937                 return;
 938
 939         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
 940         if (!lvds_connector) {
 941                 kfree(lvds_encoder);
 942                 return;
 943         }
 944
 945         lvds_encoder->attached_connector = lvds_connector;
 946
 947         intel_encoder = &lvds_encoder->base;
 948         encoder = &intel_encoder->base;
 949         intel_connector = &lvds_connector->base;
 950         connector = &intel_connector->base;
 951         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 952                            DRM_MODE_CONNECTOR_LVDS);
 953
 954         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 955                          DRM_MODE_ENCODER_LVDS);
 956
 957         intel_encoder->enable = intel_enable_lvds;
 958         intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
 959         intel_encoder->compute_config = intel_lvds_compute_config;
 960         intel_encoder->disable = intel_disable_lvds;
 961         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 962         intel_encoder->get_config = intel_lvds_get_config;
 963         intel_connector->get_hw_state = intel_connector_get_hw_state;
 964
 965         intel_connector_attach_encoder(intel_connector, intel_encoder);
 966         intel_encoder->type = INTEL_OUTPUT_LVDS;
 967
 968         intel_encoder->cloneable = false;
 969         if (HAS_PCH_SPLIT(dev))
 970                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 971         else if (IS_GEN4(dev))
 972                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 973         else
 974                 intel_encoder->crtc_mask = (1 << 1);
 975
 976         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 977         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 978         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 979         connector->interlace_allowed = false;
 980         connector->doublescan_allowed = false;
 981
 982         if (HAS_PCH_SPLIT(dev)) {
 983                 lvds_encoder->reg = PCH_LVDS;
 984         } else {
 985                 lvds_encoder->reg = LVDS;
 986         }
 987
 988         /* create the scaling mode property */
 989         drm_mode_create_scaling_mode_property(dev);
 990         drm_object_attach_property(&connector->base,
 991                                       dev->mode_config.scaling_mode_property,
 992                                       DRM_MODE_SCALE_ASPECT);
 993         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
 994         /*
 995          * LVDS discovery:
 996          * 1) check for EDID on DDC
 997          * 2) check for VBT data
 998          * 3) check to see if LVDS is already on
 999          *    if none of the above, no panel
1000          * 4) make sure lid is open
1001          *    if closed, act like it's not there for now
1002          */
1003
1004         /*
1005          * Attempt to get the fixed panel mode from DDC.  Assume that the
1006          * preferred mode is the right one.
1007          */
1008         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1009         if (edid) {
1010                 if (drm_add_edid_modes(connector, edid)) {
1011                         drm_mode_connector_update_edid_property(connector,
1012                                                                 edid);
1013                 } else {
1014                         kfree(edid);
1015                         edid = ERR_PTR(-EINVAL);
1016                 }
1017         } else {
1018                 edid = ERR_PTR(-ENOENT);
1019         }
1020         lvds_connector->base.edid = edid;
1021
1022         if (IS_ERR_OR_NULL(edid)) {
1023                 /* Didn't get an EDID, so
1024                  * Set wide sync ranges so we get all modes
1025                  * handed to valid_mode for checking
1026                  */
1027                 connector->display_info.min_vfreq = 0;
1028                 connector->display_info.max_vfreq = 200;
1029                 connector->display_info.min_hfreq = 0;
1030                 connector->display_info.max_hfreq = 200;
1031         }
1032
1033         list_for_each_entry(scan, &connector->probed_modes, head) {
1034                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1035                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1036                         drm_mode_debug_printmodeline(scan);
1037
1038                         fixed_mode = drm_mode_duplicate(dev, scan);
1039                         if (fixed_mode) {
1040                                 intel_find_lvds_downclock(dev, fixed_mode,
1041                                                           connector);
1042                                 goto out;
1043                         }
1044                 }
1045         }
1046
1047         /* Failed to get EDID, what about VBT? */
1048         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1049                 DRM_DEBUG_KMS("using mode from VBT: ");
1050                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1051
1052                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1053                 if (fixed_mode) {
1054                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1055                         goto out;
1056                 }
1057         }
1058
1059         /*
1060          * If we didn't get EDID, try checking if the panel is already turned
1061          * on.  If so, assume that whatever is currently programmed is the
1062          * correct mode.
1063          */
1064
1065         /* Ironlake: FIXME if still fail, not try pipe mode now */
1066         if (HAS_PCH_SPLIT(dev))
1067                 goto failed;
1068
1069         lvds = I915_READ(LVDS);
1070         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1071         crtc = intel_get_crtc_for_pipe(dev, pipe);
1072
1073         if (crtc && (lvds & LVDS_PORT_EN)) {
1074                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1075                 if (fixed_mode) {
1076                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1077                         drm_mode_debug_printmodeline(fixed_mode);
1078                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1079                         goto out;
1080                 }
1081         }
1082
1083         /* If we still don't have a mode after all that, give up. */
1084         if (!fixed_mode)
1085                 goto failed;
1086
1087 out:
1088         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1089         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1090                       lvds_encoder->is_dual_link ? "dual" : "single");
1091
1092         /*
1093          * Unlock registers and just
1094          * leave them unlocked
1095          */
1096         if (HAS_PCH_SPLIT(dev)) {
1097                 I915_WRITE(PCH_PP_CONTROL,
1098                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1099         } else {
1100                 I915_WRITE(PP_CONTROL,
1101                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1102         }
1103         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1104         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1105                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1106                 lvds_connector->lid_notifier.notifier_call = NULL;
1107         }
1108         drm_sysfs_connector_add(connector);
1109
1110         intel_panel_init(&intel_connector->panel, fixed_mode);
1111         intel_panel_setup_backlight(connector);
1112
1113         return;
1114
1115 failed:
1116         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1117         drm_connector_cleanup(connector);
1118         drm_encoder_cleanup(encoder);
1119         if (fixed_mode)
1120                 drm_mode_destroy(dev, fixed_mode);
1121         kfree(lvds_encoder);
1122         kfree(lvds_connector);
1123         return;
1124 }