2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector
{
44 struct intel_connector base
;
46 struct notifier_block lid_notifier
;
49 struct intel_lvds_encoder
{
50 struct intel_encoder base
;
55 struct intel_lvds_connector
*attached_connector
;
58 static struct intel_lvds_encoder
*to_lvds_encoder(struct drm_encoder
*encoder
)
60 return container_of(encoder
, struct intel_lvds_encoder
, base
.base
);
63 static struct intel_lvds_connector
*to_lvds_connector(struct drm_connector
*connector
)
65 return container_of(connector
, struct intel_lvds_connector
, base
.base
);
68 static bool intel_lvds_get_hw_state(struct intel_encoder
*encoder
,
71 struct drm_device
*dev
= encoder
->base
.dev
;
72 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
73 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
76 tmp
= I915_READ(lvds_encoder
->reg
);
78 if (!(tmp
& LVDS_PORT_EN
))
82 *pipe
= PORT_TO_PIPE_CPT(tmp
);
84 *pipe
= PORT_TO_PIPE(tmp
);
89 static void intel_lvds_get_config(struct intel_encoder
*encoder
,
90 struct intel_crtc_config
*pipe_config
)
92 struct drm_device
*dev
= encoder
->base
.dev
;
93 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
94 u32 lvds_reg
, tmp
, flags
= 0;
97 if (HAS_PCH_SPLIT(dev
))
102 tmp
= I915_READ(lvds_reg
);
103 if (tmp
& LVDS_HSYNC_POLARITY
)
104 flags
|= DRM_MODE_FLAG_NHSYNC
;
106 flags
|= DRM_MODE_FLAG_PHSYNC
;
107 if (tmp
& LVDS_VSYNC_POLARITY
)
108 flags
|= DRM_MODE_FLAG_NVSYNC
;
110 flags
|= DRM_MODE_FLAG_PVSYNC
;
112 pipe_config
->adjusted_mode
.flags
|= flags
;
114 dotclock
= pipe_config
->port_clock
;
116 if (HAS_PCH_SPLIT(dev_priv
->dev
))
117 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
119 pipe_config
->adjusted_mode
.crtc_clock
= dotclock
;
122 static void intel_pre_enable_lvds(struct intel_encoder
*encoder
)
124 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
125 struct drm_device
*dev
= encoder
->base
.dev
;
126 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
127 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
128 const struct drm_display_mode
*adjusted_mode
=
129 &crtc
->config
.adjusted_mode
;
130 int pipe
= crtc
->pipe
;
133 if (HAS_PCH_SPLIT(dev
)) {
134 assert_fdi_rx_pll_disabled(dev_priv
, pipe
);
135 assert_shared_dpll_disabled(dev_priv
,
136 intel_crtc_to_shared_dpll(crtc
));
138 assert_pll_disabled(dev_priv
, pipe
);
141 temp
= I915_READ(lvds_encoder
->reg
);
142 temp
|= LVDS_PORT_EN
| LVDS_A0A2_CLKA_POWER_UP
;
144 if (HAS_PCH_CPT(dev
)) {
145 temp
&= ~PORT_TRANS_SEL_MASK
;
146 temp
|= PORT_TRANS_SEL_CPT(pipe
);
149 temp
|= LVDS_PIPEB_SELECT
;
151 temp
&= ~LVDS_PIPEB_SELECT
;
155 /* set the corresponsding LVDS_BORDER bit */
156 temp
&= ~LVDS_BORDER_ENABLE
;
157 temp
|= crtc
->config
.gmch_pfit
.lvds_border_bits
;
158 /* Set the B0-B3 data pairs corresponding to whether we're going to
159 * set the DPLLs for dual-channel mode or not.
161 if (lvds_encoder
->is_dual_link
)
162 temp
|= LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
;
164 temp
&= ~(LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
);
166 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
167 * appropriately here, but we need to look more thoroughly into how
168 * panels behave in the two modes.
171 /* Set the dithering flag on LVDS as needed, note that there is no
172 * special lvds dither control bit on pch-split platforms, dithering is
173 * only controlled through the PIPECONF reg. */
174 if (INTEL_INFO(dev
)->gen
== 4) {
175 /* Bspec wording suggests that LVDS port dithering only exists
176 * for 18bpp panels. */
177 if (crtc
->config
.dither
&& crtc
->config
.pipe_bpp
== 18)
178 temp
|= LVDS_ENABLE_DITHER
;
180 temp
&= ~LVDS_ENABLE_DITHER
;
182 temp
&= ~(LVDS_HSYNC_POLARITY
| LVDS_VSYNC_POLARITY
);
183 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
184 temp
|= LVDS_HSYNC_POLARITY
;
185 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
186 temp
|= LVDS_VSYNC_POLARITY
;
188 I915_WRITE(lvds_encoder
->reg
, temp
);
192 * Sets the power state for the panel.
194 static void intel_enable_lvds(struct intel_encoder
*encoder
)
196 struct drm_device
*dev
= encoder
->base
.dev
;
197 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
198 struct intel_connector
*intel_connector
=
199 &lvds_encoder
->attached_connector
->base
;
200 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
201 u32 ctl_reg
, stat_reg
;
203 if (HAS_PCH_SPLIT(dev
)) {
204 ctl_reg
= PCH_PP_CONTROL
;
205 stat_reg
= PCH_PP_STATUS
;
207 ctl_reg
= PP_CONTROL
;
208 stat_reg
= PP_STATUS
;
211 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) | LVDS_PORT_EN
);
213 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) | POWER_TARGET_ON
);
214 POSTING_READ(lvds_encoder
->reg
);
215 if (wait_for((I915_READ(stat_reg
) & PP_ON
) != 0, 1000))
216 DRM_ERROR("timed out waiting for panel to power on\n");
218 intel_panel_enable_backlight(intel_connector
);
221 static void intel_disable_lvds(struct intel_encoder
*encoder
)
223 struct drm_device
*dev
= encoder
->base
.dev
;
224 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
225 struct intel_connector
*intel_connector
=
226 &lvds_encoder
->attached_connector
->base
;
227 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
228 u32 ctl_reg
, stat_reg
;
230 if (HAS_PCH_SPLIT(dev
)) {
231 ctl_reg
= PCH_PP_CONTROL
;
232 stat_reg
= PCH_PP_STATUS
;
234 ctl_reg
= PP_CONTROL
;
235 stat_reg
= PP_STATUS
;
238 intel_panel_disable_backlight(intel_connector
);
240 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) & ~POWER_TARGET_ON
);
241 if (wait_for((I915_READ(stat_reg
) & PP_ON
) == 0, 1000))
242 DRM_ERROR("timed out waiting for panel to power off\n");
244 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) & ~LVDS_PORT_EN
);
245 POSTING_READ(lvds_encoder
->reg
);
248 static enum drm_mode_status
249 intel_lvds_mode_valid(struct drm_connector
*connector
,
250 struct drm_display_mode
*mode
)
252 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
253 struct drm_display_mode
*fixed_mode
= intel_connector
->panel
.fixed_mode
;
255 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
257 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
263 static bool intel_lvds_compute_config(struct intel_encoder
*intel_encoder
,
264 struct intel_crtc_config
*pipe_config
)
266 struct drm_device
*dev
= intel_encoder
->base
.dev
;
267 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
268 struct intel_lvds_encoder
*lvds_encoder
=
269 to_lvds_encoder(&intel_encoder
->base
);
270 struct intel_connector
*intel_connector
=
271 &lvds_encoder
->attached_connector
->base
;
272 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
273 struct intel_crtc
*intel_crtc
= lvds_encoder
->base
.new_crtc
;
274 unsigned int lvds_bpp
;
276 /* Should never happen!! */
277 if (INTEL_INFO(dev
)->gen
< 4 && intel_crtc
->pipe
== 0) {
278 DRM_ERROR("Can't support LVDS on pipe A\n");
282 if ((I915_READ(lvds_encoder
->reg
) & LVDS_A3_POWER_MASK
) ==
288 if (lvds_bpp
!= pipe_config
->pipe_bpp
&& !pipe_config
->bw_constrained
) {
289 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
290 pipe_config
->pipe_bpp
, lvds_bpp
);
291 pipe_config
->pipe_bpp
= lvds_bpp
;
295 * We have timings from the BIOS for the panel, put them in
296 * to the adjusted mode. The CRTC will be set up for this mode,
297 * with the panel scaling set up to source from the H/VDisplay
298 * of the original mode.
300 intel_fixed_panel_mode(intel_connector
->panel
.fixed_mode
,
303 if (HAS_PCH_SPLIT(dev
)) {
304 pipe_config
->has_pch_encoder
= true;
306 intel_pch_panel_fitting(intel_crtc
, pipe_config
,
307 intel_connector
->panel
.fitting_mode
);
309 intel_gmch_panel_fitting(intel_crtc
, pipe_config
,
310 intel_connector
->panel
.fitting_mode
);
315 * XXX: It would be nice to support lower refresh rates on the
316 * panels to reduce power consumption, and perhaps match the
317 * user's requested refresh rate.
324 * Detect the LVDS connection.
326 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
327 * connected and closed means disconnected. We also send hotplug events as
328 * needed, using lid status notification from the input layer.
330 static enum drm_connector_status
331 intel_lvds_detect(struct drm_connector
*connector
, bool force
)
333 struct drm_device
*dev
= connector
->dev
;
334 enum drm_connector_status status
;
336 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
337 connector
->base
.id
, connector
->name
);
339 status
= intel_panel_detect(dev
);
340 if (status
!= connector_status_unknown
)
343 return connector_status_connected
;
347 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
349 static int intel_lvds_get_modes(struct drm_connector
*connector
)
351 struct intel_lvds_connector
*lvds_connector
= to_lvds_connector(connector
);
352 struct drm_device
*dev
= connector
->dev
;
353 struct drm_display_mode
*mode
;
355 /* use cached edid if we have one */
356 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
357 return drm_add_edid_modes(connector
, lvds_connector
->base
.edid
);
359 mode
= drm_mode_duplicate(dev
, lvds_connector
->base
.panel
.fixed_mode
);
363 drm_mode_probed_add(connector
, mode
);
367 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id
*id
)
369 DRM_INFO("Skipping forced modeset for %s\n", id
->ident
);
373 /* The GPU hangs up on these systems if modeset is performed on LID open */
374 static const struct dmi_system_id intel_no_modeset_on_lid
[] = {
376 .callback
= intel_no_modeset_on_lid_dmi_callback
,
377 .ident
= "Toshiba Tecra A11",
379 DMI_MATCH(DMI_SYS_VENDOR
, "TOSHIBA"),
380 DMI_MATCH(DMI_PRODUCT_NAME
, "TECRA A11"),
384 { } /* terminating entry */
388 * Lid events. Note the use of 'modeset':
389 * - we set it to MODESET_ON_LID_OPEN on lid close,
390 * and set it to MODESET_DONE on open
391 * - we use it as a "only once" bit (ie we ignore
392 * duplicate events where it was already properly set)
393 * - the suspend/resume paths will set it to
394 * MODESET_SUSPENDED and ignore the lid open event,
395 * because they restore the mode ("lid open").
397 static int intel_lid_notify(struct notifier_block
*nb
, unsigned long val
,
400 struct intel_lvds_connector
*lvds_connector
=
401 container_of(nb
, struct intel_lvds_connector
, lid_notifier
);
402 struct drm_connector
*connector
= &lvds_connector
->base
.base
;
403 struct drm_device
*dev
= connector
->dev
;
404 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
406 if (dev
->switch_power_state
!= DRM_SWITCH_POWER_ON
)
409 mutex_lock(&dev_priv
->modeset_restore_lock
);
410 if (dev_priv
->modeset_restore
== MODESET_SUSPENDED
)
413 * check and update the status of LVDS connector after receiving
414 * the LID nofication event.
416 connector
->status
= connector
->funcs
->detect(connector
, false);
418 /* Don't force modeset on machines where it causes a GPU lockup */
419 if (dmi_check_system(intel_no_modeset_on_lid
))
421 if (!acpi_lid_open()) {
422 /* do modeset on next lid open event */
423 dev_priv
->modeset_restore
= MODESET_ON_LID_OPEN
;
427 if (dev_priv
->modeset_restore
== MODESET_DONE
)
431 * Some old platform's BIOS love to wreak havoc while the lid is closed.
432 * We try to detect this here and undo any damage. The split for PCH
433 * platforms is rather conservative and a bit arbitrary expect that on
434 * those platforms VGA disabling requires actual legacy VGA I/O access,
435 * and as part of the cleanup in the hw state restore we also redisable
438 if (!HAS_PCH_SPLIT(dev
)) {
439 drm_modeset_lock_all(dev
);
440 intel_modeset_setup_hw_state(dev
, true);
441 drm_modeset_unlock_all(dev
);
444 dev_priv
->modeset_restore
= MODESET_DONE
;
447 mutex_unlock(&dev_priv
->modeset_restore_lock
);
452 * intel_lvds_destroy - unregister and free LVDS structures
453 * @connector: connector to free
455 * Unregister the DDC bus for this connector then free the driver private
458 static void intel_lvds_destroy(struct drm_connector
*connector
)
460 struct intel_lvds_connector
*lvds_connector
=
461 to_lvds_connector(connector
);
463 if (lvds_connector
->lid_notifier
.notifier_call
)
464 acpi_lid_notifier_unregister(&lvds_connector
->lid_notifier
);
466 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
467 kfree(lvds_connector
->base
.edid
);
469 intel_panel_fini(&lvds_connector
->base
.panel
);
471 drm_connector_cleanup(connector
);
475 static int intel_lvds_set_property(struct drm_connector
*connector
,
476 struct drm_property
*property
,
479 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
480 struct drm_device
*dev
= connector
->dev
;
482 if (property
== dev
->mode_config
.scaling_mode_property
) {
483 struct drm_crtc
*crtc
;
485 if (value
== DRM_MODE_SCALE_NONE
) {
486 DRM_DEBUG_KMS("no scaling not supported\n");
490 if (intel_connector
->panel
.fitting_mode
== value
) {
491 /* the LVDS scaling property is not changed */
494 intel_connector
->panel
.fitting_mode
= value
;
496 crtc
= intel_attached_encoder(connector
)->base
.crtc
;
497 if (crtc
&& crtc
->enabled
) {
499 * If the CRTC is enabled, the display will be changed
500 * according to the new panel fitting mode.
502 intel_crtc_restore_mode(crtc
);
509 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
= {
510 .get_modes
= intel_lvds_get_modes
,
511 .mode_valid
= intel_lvds_mode_valid
,
512 .best_encoder
= intel_best_encoder
,
515 static const struct drm_connector_funcs intel_lvds_connector_funcs
= {
516 .dpms
= intel_connector_dpms
,
517 .detect
= intel_lvds_detect
,
518 .fill_modes
= drm_helper_probe_single_connector_modes
,
519 .set_property
= intel_lvds_set_property
,
520 .destroy
= intel_lvds_destroy
,
523 static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
524 .destroy
= intel_encoder_destroy
,
527 static int __init
intel_no_lvds_dmi_callback(const struct dmi_system_id
*id
)
529 DRM_INFO("Skipping LVDS initialization for %s\n", id
->ident
);
533 /* These systems claim to have LVDS, but really don't */
534 static const struct dmi_system_id intel_no_lvds
[] = {
536 .callback
= intel_no_lvds_dmi_callback
,
537 .ident
= "Apple Mac Mini (Core series)",
539 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
540 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini1,1"),
544 .callback
= intel_no_lvds_dmi_callback
,
545 .ident
= "Apple Mac Mini (Core 2 series)",
547 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
548 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini2,1"),
552 .callback
= intel_no_lvds_dmi_callback
,
553 .ident
= "MSI IM-945GSE-A",
555 DMI_MATCH(DMI_SYS_VENDOR
, "MSI"),
556 DMI_MATCH(DMI_PRODUCT_NAME
, "A9830IMS"),
560 .callback
= intel_no_lvds_dmi_callback
,
561 .ident
= "Dell Studio Hybrid",
563 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
564 DMI_MATCH(DMI_PRODUCT_NAME
, "Studio Hybrid 140g"),
568 .callback
= intel_no_lvds_dmi_callback
,
569 .ident
= "Dell OptiPlex FX170",
571 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
572 DMI_MATCH(DMI_PRODUCT_NAME
, "OptiPlex FX170"),
576 .callback
= intel_no_lvds_dmi_callback
,
577 .ident
= "AOpen Mini PC",
579 DMI_MATCH(DMI_SYS_VENDOR
, "AOpen"),
580 DMI_MATCH(DMI_PRODUCT_NAME
, "i965GMx-IF"),
584 .callback
= intel_no_lvds_dmi_callback
,
585 .ident
= "AOpen Mini PC MP915",
587 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
588 DMI_MATCH(DMI_BOARD_NAME
, "i915GMx-F"),
592 .callback
= intel_no_lvds_dmi_callback
,
593 .ident
= "AOpen i915GMm-HFS",
595 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
596 DMI_MATCH(DMI_BOARD_NAME
, "i915GMm-HFS"),
600 .callback
= intel_no_lvds_dmi_callback
,
601 .ident
= "AOpen i45GMx-I",
603 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
604 DMI_MATCH(DMI_BOARD_NAME
, "i45GMx-I"),
608 .callback
= intel_no_lvds_dmi_callback
,
609 .ident
= "Aopen i945GTt-VFA",
611 DMI_MATCH(DMI_PRODUCT_VERSION
, "AO00001JW"),
615 .callback
= intel_no_lvds_dmi_callback
,
616 .ident
= "Clientron U800",
618 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
619 DMI_MATCH(DMI_PRODUCT_NAME
, "U800"),
623 .callback
= intel_no_lvds_dmi_callback
,
624 .ident
= "Clientron E830",
626 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
627 DMI_MATCH(DMI_PRODUCT_NAME
, "E830"),
631 .callback
= intel_no_lvds_dmi_callback
,
632 .ident
= "Asus EeeBox PC EB1007",
634 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer INC."),
635 DMI_MATCH(DMI_PRODUCT_NAME
, "EB1007"),
639 .callback
= intel_no_lvds_dmi_callback
,
640 .ident
= "Asus AT5NM10T-I",
642 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK Computer INC."),
643 DMI_MATCH(DMI_BOARD_NAME
, "AT5NM10T-I"),
647 .callback
= intel_no_lvds_dmi_callback
,
648 .ident
= "Hewlett-Packard HP t5740",
650 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
651 DMI_MATCH(DMI_PRODUCT_NAME
, " t5740"),
655 .callback
= intel_no_lvds_dmi_callback
,
656 .ident
= "Hewlett-Packard t5745",
658 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
659 DMI_MATCH(DMI_PRODUCT_NAME
, "hp t5745"),
663 .callback
= intel_no_lvds_dmi_callback
,
664 .ident
= "Hewlett-Packard st5747",
666 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
667 DMI_MATCH(DMI_PRODUCT_NAME
, "hp st5747"),
671 .callback
= intel_no_lvds_dmi_callback
,
672 .ident
= "MSI Wind Box DC500",
674 DMI_MATCH(DMI_BOARD_VENDOR
, "MICRO-STAR INTERNATIONAL CO., LTD"),
675 DMI_MATCH(DMI_BOARD_NAME
, "MS-7469"),
679 .callback
= intel_no_lvds_dmi_callback
,
680 .ident
= "Gigabyte GA-D525TUD",
682 DMI_MATCH(DMI_BOARD_VENDOR
, "Gigabyte Technology Co., Ltd."),
683 DMI_MATCH(DMI_BOARD_NAME
, "D525TUD"),
687 .callback
= intel_no_lvds_dmi_callback
,
688 .ident
= "Supermicro X7SPA-H",
690 DMI_MATCH(DMI_SYS_VENDOR
, "Supermicro"),
691 DMI_MATCH(DMI_PRODUCT_NAME
, "X7SPA-H"),
695 .callback
= intel_no_lvds_dmi_callback
,
696 .ident
= "Fujitsu Esprimo Q900",
698 DMI_MATCH(DMI_SYS_VENDOR
, "FUJITSU"),
699 DMI_MATCH(DMI_PRODUCT_NAME
, "ESPRIMO Q900"),
703 .callback
= intel_no_lvds_dmi_callback
,
704 .ident
= "Intel D410PT",
706 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
707 DMI_MATCH(DMI_BOARD_NAME
, "D410PT"),
711 .callback
= intel_no_lvds_dmi_callback
,
712 .ident
= "Intel D425KT",
714 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
715 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D425KT"),
719 .callback
= intel_no_lvds_dmi_callback
,
720 .ident
= "Intel D510MO",
722 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
723 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D510MO"),
727 .callback
= intel_no_lvds_dmi_callback
,
728 .ident
= "Intel D525MW",
730 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
731 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D525MW"),
735 { } /* terminating entry */
739 * Enumerate the child dev array parsed from VBT to check whether
740 * the LVDS is present.
741 * If it is present, return 1.
742 * If it is not present, return false.
743 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
745 static bool lvds_is_present_in_vbt(struct drm_device
*dev
,
748 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
751 if (!dev_priv
->vbt
.child_dev_num
)
754 for (i
= 0; i
< dev_priv
->vbt
.child_dev_num
; i
++) {
755 union child_device_config
*uchild
= dev_priv
->vbt
.child_dev
+ i
;
756 struct old_child_dev_config
*child
= &uchild
->old
;
758 /* If the device type is not LFP, continue.
759 * We have to check both the new identifiers as well as the
760 * old for compatibility with some BIOSes.
762 if (child
->device_type
!= DEVICE_TYPE_INT_LFP
&&
763 child
->device_type
!= DEVICE_TYPE_LFP
)
766 if (intel_gmbus_is_port_valid(child
->i2c_pin
))
767 *i2c_pin
= child
->i2c_pin
;
769 /* However, we cannot trust the BIOS writers to populate
770 * the VBT correctly. Since LVDS requires additional
771 * information from AIM blocks, a non-zero addin offset is
772 * a good indicator that the LVDS is actually present.
774 if (child
->addin_offset
)
777 /* But even then some BIOS writers perform some black magic
778 * and instantiate the device without reference to any
779 * additional data. Trust that if the VBT was written into
780 * the OpRegion then they have validated the LVDS's existence.
782 if (dev_priv
->opregion
.vbt
)
789 static int intel_dual_link_lvds_callback(const struct dmi_system_id
*id
)
791 DRM_INFO("Forcing lvds to dual link mode on %s\n", id
->ident
);
795 static const struct dmi_system_id intel_dual_link_lvds
[] = {
797 .callback
= intel_dual_link_lvds_callback
,
798 .ident
= "Apple MacBook Pro (Core i5/i7 Series)",
800 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
801 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro8,2"),
804 { } /* terminating entry */
807 bool intel_is_dual_link_lvds(struct drm_device
*dev
)
809 struct intel_encoder
*encoder
;
810 struct intel_lvds_encoder
*lvds_encoder
;
812 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
,
814 if (encoder
->type
== INTEL_OUTPUT_LVDS
) {
815 lvds_encoder
= to_lvds_encoder(&encoder
->base
);
817 return lvds_encoder
->is_dual_link
;
824 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder
*lvds_encoder
)
826 struct drm_device
*dev
= lvds_encoder
->base
.base
.dev
;
828 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
830 /* use the module option value if specified */
831 if (i915
.lvds_channel_mode
> 0)
832 return i915
.lvds_channel_mode
== 2;
834 if (dmi_check_system(intel_dual_link_lvds
))
837 /* BIOS should set the proper LVDS register value at boot, but
838 * in reality, it doesn't set the value when the lid is closed;
839 * we need to check "the value to be set" in VBT when LVDS
840 * register is uninitialized.
842 val
= I915_READ(lvds_encoder
->reg
);
843 if (!(val
& ~(LVDS_PIPE_MASK
| LVDS_DETECTED
)))
844 val
= dev_priv
->vbt
.bios_lvds_val
;
846 return (val
& LVDS_CLKB_POWER_MASK
) == LVDS_CLKB_POWER_UP
;
849 static bool intel_lvds_supported(struct drm_device
*dev
)
851 /* With the introduction of the PCH we gained a dedicated
852 * LVDS presence pin, use it. */
853 if (HAS_PCH_IBX(dev
) || HAS_PCH_CPT(dev
))
856 /* Otherwise LVDS was only attached to mobile products,
857 * except for the inglorious 830gm */
858 if (INTEL_INFO(dev
)->gen
<= 4 && IS_MOBILE(dev
) && !IS_I830(dev
))
865 * intel_lvds_init - setup LVDS connectors on this device
868 * Create the connector, register the LVDS DDC bus, and try to figure out what
869 * modes we can display on the LVDS panel (if present).
871 void intel_lvds_init(struct drm_device
*dev
)
873 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
874 struct intel_lvds_encoder
*lvds_encoder
;
875 struct intel_encoder
*intel_encoder
;
876 struct intel_lvds_connector
*lvds_connector
;
877 struct intel_connector
*intel_connector
;
878 struct drm_connector
*connector
;
879 struct drm_encoder
*encoder
;
880 struct drm_display_mode
*scan
; /* *modes, *bios_mode; */
881 struct drm_display_mode
*fixed_mode
= NULL
;
882 struct drm_display_mode
*downclock_mode
= NULL
;
884 struct drm_crtc
*crtc
;
889 if (!intel_lvds_supported(dev
))
892 /* Skip init on machines we know falsely report LVDS */
893 if (dmi_check_system(intel_no_lvds
))
896 pin
= GMBUS_PORT_PANEL
;
897 if (!lvds_is_present_in_vbt(dev
, &pin
)) {
898 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
902 if (HAS_PCH_SPLIT(dev
)) {
903 if ((I915_READ(PCH_LVDS
) & LVDS_DETECTED
) == 0)
905 if (dev_priv
->vbt
.edp_support
) {
906 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
911 lvds_encoder
= kzalloc(sizeof(*lvds_encoder
), GFP_KERNEL
);
915 lvds_connector
= kzalloc(sizeof(*lvds_connector
), GFP_KERNEL
);
916 if (!lvds_connector
) {
921 lvds_encoder
->attached_connector
= lvds_connector
;
923 intel_encoder
= &lvds_encoder
->base
;
924 encoder
= &intel_encoder
->base
;
925 intel_connector
= &lvds_connector
->base
;
926 connector
= &intel_connector
->base
;
927 drm_connector_init(dev
, &intel_connector
->base
, &intel_lvds_connector_funcs
,
928 DRM_MODE_CONNECTOR_LVDS
);
930 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_lvds_enc_funcs
,
931 DRM_MODE_ENCODER_LVDS
);
933 intel_encoder
->enable
= intel_enable_lvds
;
934 intel_encoder
->pre_enable
= intel_pre_enable_lvds
;
935 intel_encoder
->compute_config
= intel_lvds_compute_config
;
936 intel_encoder
->disable
= intel_disable_lvds
;
937 intel_encoder
->get_hw_state
= intel_lvds_get_hw_state
;
938 intel_encoder
->get_config
= intel_lvds_get_config
;
939 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
940 intel_connector
->unregister
= intel_connector_unregister
;
942 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
943 intel_encoder
->type
= INTEL_OUTPUT_LVDS
;
945 intel_encoder
->cloneable
= 0;
946 if (HAS_PCH_SPLIT(dev
))
947 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
948 else if (IS_GEN4(dev
))
949 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
951 intel_encoder
->crtc_mask
= (1 << 1);
953 drm_connector_helper_add(connector
, &intel_lvds_connector_helper_funcs
);
954 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
955 connector
->interlace_allowed
= false;
956 connector
->doublescan_allowed
= false;
958 if (HAS_PCH_SPLIT(dev
)) {
959 lvds_encoder
->reg
= PCH_LVDS
;
961 lvds_encoder
->reg
= LVDS
;
964 /* create the scaling mode property */
965 drm_mode_create_scaling_mode_property(dev
);
966 drm_object_attach_property(&connector
->base
,
967 dev
->mode_config
.scaling_mode_property
,
968 DRM_MODE_SCALE_ASPECT
);
969 intel_connector
->panel
.fitting_mode
= DRM_MODE_SCALE_ASPECT
;
972 * 1) check for EDID on DDC
973 * 2) check for VBT data
974 * 3) check to see if LVDS is already on
975 * if none of the above, no panel
976 * 4) make sure lid is open
977 * if closed, act like it's not there for now
981 * Attempt to get the fixed panel mode from DDC. Assume that the
982 * preferred mode is the right one.
984 mutex_lock(&dev
->mode_config
.mutex
);
985 edid
= drm_get_edid(connector
, intel_gmbus_get_adapter(dev_priv
, pin
));
987 if (drm_add_edid_modes(connector
, edid
)) {
988 drm_mode_connector_update_edid_property(connector
,
992 edid
= ERR_PTR(-EINVAL
);
995 edid
= ERR_PTR(-ENOENT
);
997 lvds_connector
->base
.edid
= edid
;
999 if (IS_ERR_OR_NULL(edid
)) {
1000 /* Didn't get an EDID, so
1001 * Set wide sync ranges so we get all modes
1002 * handed to valid_mode for checking
1004 connector
->display_info
.min_vfreq
= 0;
1005 connector
->display_info
.max_vfreq
= 200;
1006 connector
->display_info
.min_hfreq
= 0;
1007 connector
->display_info
.max_hfreq
= 200;
1010 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
1011 if (scan
->type
& DRM_MODE_TYPE_PREFERRED
) {
1012 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1013 drm_mode_debug_printmodeline(scan
);
1015 fixed_mode
= drm_mode_duplicate(dev
, scan
);
1018 intel_find_panel_downclock(dev
,
1019 fixed_mode
, connector
);
1020 if (downclock_mode
!= NULL
&&
1021 i915
.lvds_downclock
) {
1022 /* We found the downclock for LVDS. */
1023 dev_priv
->lvds_downclock_avail
= true;
1024 dev_priv
->lvds_downclock
=
1025 downclock_mode
->clock
;
1026 DRM_DEBUG_KMS("LVDS downclock is found"
1027 " in EDID. Normal clock %dKhz, "
1028 "downclock %dKhz\n",
1030 dev_priv
->lvds_downclock
);
1037 /* Failed to get EDID, what about VBT? */
1038 if (dev_priv
->vbt
.lfp_lvds_vbt_mode
) {
1039 DRM_DEBUG_KMS("using mode from VBT: ");
1040 drm_mode_debug_printmodeline(dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1042 fixed_mode
= drm_mode_duplicate(dev
, dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1044 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1050 * If we didn't get EDID, try checking if the panel is already turned
1051 * on. If so, assume that whatever is currently programmed is the
1055 /* Ironlake: FIXME if still fail, not try pipe mode now */
1056 if (HAS_PCH_SPLIT(dev
))
1059 lvds
= I915_READ(LVDS
);
1060 pipe
= (lvds
& LVDS_PIPEB_SELECT
) ? 1 : 0;
1061 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
1063 if (crtc
&& (lvds
& LVDS_PORT_EN
)) {
1064 fixed_mode
= intel_crtc_mode_get(dev
, crtc
);
1066 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1067 drm_mode_debug_printmodeline(fixed_mode
);
1068 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1073 /* If we still don't have a mode after all that, give up. */
1078 mutex_unlock(&dev
->mode_config
.mutex
);
1080 lvds_encoder
->is_dual_link
= compute_is_dual_link_lvds(lvds_encoder
);
1081 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1082 lvds_encoder
->is_dual_link
? "dual" : "single");
1085 * Unlock registers and just
1086 * leave them unlocked
1088 if (HAS_PCH_SPLIT(dev
)) {
1089 I915_WRITE(PCH_PP_CONTROL
,
1090 I915_READ(PCH_PP_CONTROL
) | PANEL_UNLOCK_REGS
);
1092 I915_WRITE(PP_CONTROL
,
1093 I915_READ(PP_CONTROL
) | PANEL_UNLOCK_REGS
);
1095 lvds_connector
->lid_notifier
.notifier_call
= intel_lid_notify
;
1096 if (acpi_lid_notifier_register(&lvds_connector
->lid_notifier
)) {
1097 DRM_DEBUG_KMS("lid notifier registration failed\n");
1098 lvds_connector
->lid_notifier
.notifier_call
= NULL
;
1100 drm_connector_register(connector
);
1102 intel_panel_init(&intel_connector
->panel
, fixed_mode
, downclock_mode
);
1103 intel_panel_setup_backlight(connector
);
1108 mutex_unlock(&dev
->mode_config
.mutex
);
1110 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1111 drm_connector_cleanup(connector
);
1112 drm_encoder_cleanup(encoder
);
1113 kfree(lvds_encoder
);
1114 kfree(lvds_connector
);