drm/i915: Turn HAS_FPGA_DBG_UNCLAIMED into a device_info flag
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
45
46 struct notifier_block lid_notifier;
47 };
48
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
51
52 u32 pfit_control;
53 u32 pfit_pgm_ratios;
54 bool is_dual_link;
55 u32 reg;
56
57 struct intel_lvds_connector *attached_connector;
58 };
59
60 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61 {
62 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 }
64
65 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66 {
67 return container_of(connector, struct intel_lvds_connector, base.base);
68 }
69
70 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 enum pipe *pipe)
72 {
73 struct drm_device *dev = encoder->base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 u32 tmp;
77
78 tmp = I915_READ(lvds_encoder->reg);
79
80 if (!(tmp & LVDS_PORT_EN))
81 return false;
82
83 if (HAS_PCH_CPT(dev))
84 *pipe = PORT_TO_PIPE_CPT(tmp);
85 else
86 *pipe = PORT_TO_PIPE(tmp);
87
88 return true;
89 }
90
91 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
92 * This is an exception to the general rule that mode_set doesn't turn
93 * things on.
94 */
95 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
96 {
97 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
98 struct drm_device *dev = encoder->base.dev;
99 struct drm_i915_private *dev_priv = dev->dev_private;
100 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
101 struct drm_display_mode *fixed_mode =
102 lvds_encoder->attached_connector->base.panel.fixed_mode;
103 int pipe = intel_crtc->pipe;
104 u32 temp;
105
106 temp = I915_READ(lvds_encoder->reg);
107 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
108
109 if (HAS_PCH_CPT(dev)) {
110 temp &= ~PORT_TRANS_SEL_MASK;
111 temp |= PORT_TRANS_SEL_CPT(pipe);
112 } else {
113 if (pipe == 1) {
114 temp |= LVDS_PIPEB_SELECT;
115 } else {
116 temp &= ~LVDS_PIPEB_SELECT;
117 }
118 }
119
120 /* set the corresponsding LVDS_BORDER bit */
121 temp |= dev_priv->lvds_border_bits;
122 /* Set the B0-B3 data pairs corresponding to whether we're going to
123 * set the DPLLs for dual-channel mode or not.
124 */
125 if (lvds_encoder->is_dual_link)
126 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
127 else
128 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
129
130 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
131 * appropriately here, but we need to look more thoroughly into how
132 * panels behave in the two modes.
133 */
134
135 /* Set the dithering flag on LVDS as needed, note that there is no
136 * special lvds dither control bit on pch-split platforms, dithering is
137 * only controlled through the PIPECONF reg. */
138 if (INTEL_INFO(dev)->gen == 4) {
139 if (dev_priv->lvds_dither)
140 temp |= LVDS_ENABLE_DITHER;
141 else
142 temp &= ~LVDS_ENABLE_DITHER;
143 }
144 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
145 if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
146 temp |= LVDS_HSYNC_POLARITY;
147 if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
148 temp |= LVDS_VSYNC_POLARITY;
149
150 I915_WRITE(lvds_encoder->reg, temp);
151 }
152
153 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
154 {
155 struct drm_device *dev = encoder->base.dev;
156 struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base);
157 struct drm_i915_private *dev_priv = dev->dev_private;
158
159 if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
160 return;
161
162 WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
163 assert_pipe_disabled(dev_priv, to_intel_crtc(encoder->base.crtc)->pipe);
164
165 /*
166 * Enable automatic panel scaling so that non-native modes
167 * fill the screen. The panel fitter should only be
168 * adjusted whilst the pipe is disabled, according to
169 * register description and PRM.
170 */
171 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
172 enc->pfit_control,
173 enc->pfit_pgm_ratios);
174
175 I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios);
176 I915_WRITE(PFIT_CONTROL, enc->pfit_control);
177 }
178
179 /**
180 * Sets the power state for the panel.
181 */
182 static void intel_enable_lvds(struct intel_encoder *encoder)
183 {
184 struct drm_device *dev = encoder->base.dev;
185 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
186 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
187 struct drm_i915_private *dev_priv = dev->dev_private;
188 u32 ctl_reg, stat_reg;
189
190 if (HAS_PCH_SPLIT(dev)) {
191 ctl_reg = PCH_PP_CONTROL;
192 stat_reg = PCH_PP_STATUS;
193 } else {
194 ctl_reg = PP_CONTROL;
195 stat_reg = PP_STATUS;
196 }
197
198 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
199
200 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
201 POSTING_READ(lvds_encoder->reg);
202 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
203 DRM_ERROR("timed out waiting for panel to power on\n");
204
205 intel_panel_enable_backlight(dev, intel_crtc->pipe);
206 }
207
208 static void intel_disable_lvds(struct intel_encoder *encoder)
209 {
210 struct drm_device *dev = encoder->base.dev;
211 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
212 struct drm_i915_private *dev_priv = dev->dev_private;
213 u32 ctl_reg, stat_reg;
214
215 if (HAS_PCH_SPLIT(dev)) {
216 ctl_reg = PCH_PP_CONTROL;
217 stat_reg = PCH_PP_STATUS;
218 } else {
219 ctl_reg = PP_CONTROL;
220 stat_reg = PP_STATUS;
221 }
222
223 intel_panel_disable_backlight(dev);
224
225 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
226 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
227 DRM_ERROR("timed out waiting for panel to power off\n");
228
229 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
230 POSTING_READ(lvds_encoder->reg);
231 }
232
233 static int intel_lvds_mode_valid(struct drm_connector *connector,
234 struct drm_display_mode *mode)
235 {
236 struct intel_connector *intel_connector = to_intel_connector(connector);
237 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
238
239 if (mode->hdisplay > fixed_mode->hdisplay)
240 return MODE_PANEL;
241 if (mode->vdisplay > fixed_mode->vdisplay)
242 return MODE_PANEL;
243
244 return MODE_OK;
245 }
246
247 static void
248 centre_horizontally(struct drm_display_mode *mode,
249 int width)
250 {
251 u32 border, sync_pos, blank_width, sync_width;
252
253 /* keep the hsync and hblank widths constant */
254 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
255 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
256 sync_pos = (blank_width - sync_width + 1) / 2;
257
258 border = (mode->hdisplay - width + 1) / 2;
259 border += border & 1; /* make the border even */
260
261 mode->crtc_hdisplay = width;
262 mode->crtc_hblank_start = width + border;
263 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
264
265 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
266 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
267 }
268
269 static void
270 centre_vertically(struct drm_display_mode *mode,
271 int height)
272 {
273 u32 border, sync_pos, blank_width, sync_width;
274
275 /* keep the vsync and vblank widths constant */
276 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
277 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
278 sync_pos = (blank_width - sync_width + 1) / 2;
279
280 border = (mode->vdisplay - height + 1) / 2;
281
282 mode->crtc_vdisplay = height;
283 mode->crtc_vblank_start = height + border;
284 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
285
286 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
287 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
288 }
289
290 static inline u32 panel_fitter_scaling(u32 source, u32 target)
291 {
292 /*
293 * Floating point operation is not supported. So the FACTOR
294 * is defined, which can avoid the floating point computation
295 * when calculating the panel ratio.
296 */
297 #define ACCURACY 12
298 #define FACTOR (1 << ACCURACY)
299 u32 ratio = source * FACTOR / target;
300 return (FACTOR * ratio + FACTOR/2) / FACTOR;
301 }
302
303 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
304 struct intel_crtc_config *pipe_config)
305 {
306 struct drm_device *dev = intel_encoder->base.dev;
307 struct drm_i915_private *dev_priv = dev->dev_private;
308 struct intel_lvds_encoder *lvds_encoder =
309 to_lvds_encoder(&intel_encoder->base);
310 struct intel_connector *intel_connector =
311 &lvds_encoder->attached_connector->base;
312 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
313 struct drm_display_mode *mode = &pipe_config->requested_mode;
314 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
315 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
316 unsigned int lvds_bpp;
317 int pipe;
318
319 /* Should never happen!! */
320 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
321 DRM_ERROR("Can't support LVDS on pipe A\n");
322 return false;
323 }
324
325 if (intel_encoder_check_is_cloned(&lvds_encoder->base))
326 return false;
327
328 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
329 LVDS_A3_POWER_UP)
330 lvds_bpp = 8*3;
331 else
332 lvds_bpp = 6*3;
333
334 if (lvds_bpp != pipe_config->pipe_bpp) {
335 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
336 pipe_config->pipe_bpp, lvds_bpp);
337 pipe_config->pipe_bpp = lvds_bpp;
338 }
339 /*
340 * We have timings from the BIOS for the panel, put them in
341 * to the adjusted mode. The CRTC will be set up for this mode,
342 * with the panel scaling set up to source from the H/VDisplay
343 * of the original mode.
344 */
345 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
346 adjusted_mode);
347
348 if (HAS_PCH_SPLIT(dev)) {
349 pipe_config->has_pch_encoder = true;
350
351 intel_pch_panel_fitting(dev,
352 intel_connector->panel.fitting_mode,
353 mode, adjusted_mode);
354 return true;
355 }
356
357 /* Native modes don't need fitting */
358 if (adjusted_mode->hdisplay == mode->hdisplay &&
359 adjusted_mode->vdisplay == mode->vdisplay)
360 goto out;
361
362 /* 965+ wants fuzzy fitting */
363 if (INTEL_INFO(dev)->gen >= 4)
364 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
365 PFIT_FILTER_FUZZY);
366
367 /*
368 * Enable automatic panel scaling for non-native modes so that they fill
369 * the screen. Should be enabled before the pipe is enabled, according
370 * to register description and PRM.
371 * Change the value here to see the borders for debugging
372 */
373 for_each_pipe(pipe)
374 I915_WRITE(BCLRPAT(pipe), 0);
375
376 drm_mode_set_crtcinfo(adjusted_mode, 0);
377 pipe_config->timings_set = true;
378
379 switch (intel_connector->panel.fitting_mode) {
380 case DRM_MODE_SCALE_CENTER:
381 /*
382 * For centered modes, we have to calculate border widths &
383 * heights and modify the values programmed into the CRTC.
384 */
385 centre_horizontally(adjusted_mode, mode->hdisplay);
386 centre_vertically(adjusted_mode, mode->vdisplay);
387 border = LVDS_BORDER_ENABLE;
388 break;
389
390 case DRM_MODE_SCALE_ASPECT:
391 /* Scale but preserve the aspect ratio */
392 if (INTEL_INFO(dev)->gen >= 4) {
393 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
394 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
395
396 /* 965+ is easy, it does everything in hw */
397 if (scaled_width > scaled_height)
398 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
399 else if (scaled_width < scaled_height)
400 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
401 else if (adjusted_mode->hdisplay != mode->hdisplay)
402 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
403 } else {
404 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
405 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
406 /*
407 * For earlier chips we have to calculate the scaling
408 * ratio by hand and program it into the
409 * PFIT_PGM_RATIO register
410 */
411 if (scaled_width > scaled_height) { /* pillar */
412 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
413
414 border = LVDS_BORDER_ENABLE;
415 if (mode->vdisplay != adjusted_mode->vdisplay) {
416 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
417 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
418 bits << PFIT_VERT_SCALE_SHIFT);
419 pfit_control |= (PFIT_ENABLE |
420 VERT_INTERP_BILINEAR |
421 HORIZ_INTERP_BILINEAR);
422 }
423 } else if (scaled_width < scaled_height) { /* letter */
424 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
425
426 border = LVDS_BORDER_ENABLE;
427 if (mode->hdisplay != adjusted_mode->hdisplay) {
428 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
429 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
430 bits << PFIT_VERT_SCALE_SHIFT);
431 pfit_control |= (PFIT_ENABLE |
432 VERT_INTERP_BILINEAR |
433 HORIZ_INTERP_BILINEAR);
434 }
435 } else
436 /* Aspects match, Let hw scale both directions */
437 pfit_control |= (PFIT_ENABLE |
438 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
439 VERT_INTERP_BILINEAR |
440 HORIZ_INTERP_BILINEAR);
441 }
442 break;
443
444 case DRM_MODE_SCALE_FULLSCREEN:
445 /*
446 * Full scaling, even if it changes the aspect ratio.
447 * Fortunately this is all done for us in hw.
448 */
449 if (mode->vdisplay != adjusted_mode->vdisplay ||
450 mode->hdisplay != adjusted_mode->hdisplay) {
451 pfit_control |= PFIT_ENABLE;
452 if (INTEL_INFO(dev)->gen >= 4)
453 pfit_control |= PFIT_SCALING_AUTO;
454 else
455 pfit_control |= (VERT_AUTO_SCALE |
456 VERT_INTERP_BILINEAR |
457 HORIZ_AUTO_SCALE |
458 HORIZ_INTERP_BILINEAR);
459 }
460 break;
461
462 default:
463 break;
464 }
465
466 out:
467 /* If not enabling scaling, be consistent and always use 0. */
468 if ((pfit_control & PFIT_ENABLE) == 0) {
469 pfit_control = 0;
470 pfit_pgm_ratios = 0;
471 }
472
473 /* Make sure pre-965 set dither correctly */
474 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
475 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
476
477 if (pfit_control != lvds_encoder->pfit_control ||
478 pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
479 lvds_encoder->pfit_control = pfit_control;
480 lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
481 }
482 dev_priv->lvds_border_bits = border;
483
484 /*
485 * XXX: It would be nice to support lower refresh rates on the
486 * panels to reduce power consumption, and perhaps match the
487 * user's requested refresh rate.
488 */
489
490 return true;
491 }
492
493 static void intel_lvds_mode_set(struct drm_encoder *encoder,
494 struct drm_display_mode *mode,
495 struct drm_display_mode *adjusted_mode)
496 {
497 /*
498 * The LVDS pin pair will already have been turned on in the
499 * intel_crtc_mode_set since it has a large impact on the DPLL
500 * settings.
501 */
502 }
503
504 /**
505 * Detect the LVDS connection.
506 *
507 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
508 * connected and closed means disconnected. We also send hotplug events as
509 * needed, using lid status notification from the input layer.
510 */
511 static enum drm_connector_status
512 intel_lvds_detect(struct drm_connector *connector, bool force)
513 {
514 struct drm_device *dev = connector->dev;
515 enum drm_connector_status status;
516
517 status = intel_panel_detect(dev);
518 if (status != connector_status_unknown)
519 return status;
520
521 return connector_status_connected;
522 }
523
524 /**
525 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
526 */
527 static int intel_lvds_get_modes(struct drm_connector *connector)
528 {
529 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
530 struct drm_device *dev = connector->dev;
531 struct drm_display_mode *mode;
532
533 /* use cached edid if we have one */
534 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
535 return drm_add_edid_modes(connector, lvds_connector->base.edid);
536
537 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
538 if (mode == NULL)
539 return 0;
540
541 drm_mode_probed_add(connector, mode);
542 return 1;
543 }
544
545 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
546 {
547 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
548 return 1;
549 }
550
551 /* The GPU hangs up on these systems if modeset is performed on LID open */
552 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
553 {
554 .callback = intel_no_modeset_on_lid_dmi_callback,
555 .ident = "Toshiba Tecra A11",
556 .matches = {
557 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
558 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
559 },
560 },
561
562 { } /* terminating entry */
563 };
564
565 /*
566 * Lid events. Note the use of 'modeset':
567 * - we set it to MODESET_ON_LID_OPEN on lid close,
568 * and set it to MODESET_DONE on open
569 * - we use it as a "only once" bit (ie we ignore
570 * duplicate events where it was already properly set)
571 * - the suspend/resume paths will set it to
572 * MODESET_SUSPENDED and ignore the lid open event,
573 * because they restore the mode ("lid open").
574 */
575 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
576 void *unused)
577 {
578 struct intel_lvds_connector *lvds_connector =
579 container_of(nb, struct intel_lvds_connector, lid_notifier);
580 struct drm_connector *connector = &lvds_connector->base.base;
581 struct drm_device *dev = connector->dev;
582 struct drm_i915_private *dev_priv = dev->dev_private;
583
584 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
585 return NOTIFY_OK;
586
587 mutex_lock(&dev_priv->modeset_restore_lock);
588 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
589 goto exit;
590 /*
591 * check and update the status of LVDS connector after receiving
592 * the LID nofication event.
593 */
594 connector->status = connector->funcs->detect(connector, false);
595
596 /* Don't force modeset on machines where it causes a GPU lockup */
597 if (dmi_check_system(intel_no_modeset_on_lid))
598 goto exit;
599 if (!acpi_lid_open()) {
600 /* do modeset on next lid open event */
601 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
602 goto exit;
603 }
604
605 if (dev_priv->modeset_restore == MODESET_DONE)
606 goto exit;
607
608 drm_modeset_lock_all(dev);
609 intel_modeset_setup_hw_state(dev, true);
610 drm_modeset_unlock_all(dev);
611
612 dev_priv->modeset_restore = MODESET_DONE;
613
614 exit:
615 mutex_unlock(&dev_priv->modeset_restore_lock);
616 return NOTIFY_OK;
617 }
618
619 /**
620 * intel_lvds_destroy - unregister and free LVDS structures
621 * @connector: connector to free
622 *
623 * Unregister the DDC bus for this connector then free the driver private
624 * structure.
625 */
626 static void intel_lvds_destroy(struct drm_connector *connector)
627 {
628 struct intel_lvds_connector *lvds_connector =
629 to_lvds_connector(connector);
630
631 if (lvds_connector->lid_notifier.notifier_call)
632 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
633
634 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
635 kfree(lvds_connector->base.edid);
636
637 intel_panel_fini(&lvds_connector->base.panel);
638
639 drm_sysfs_connector_remove(connector);
640 drm_connector_cleanup(connector);
641 kfree(connector);
642 }
643
644 static int intel_lvds_set_property(struct drm_connector *connector,
645 struct drm_property *property,
646 uint64_t value)
647 {
648 struct intel_connector *intel_connector = to_intel_connector(connector);
649 struct drm_device *dev = connector->dev;
650
651 if (property == dev->mode_config.scaling_mode_property) {
652 struct drm_crtc *crtc;
653
654 if (value == DRM_MODE_SCALE_NONE) {
655 DRM_DEBUG_KMS("no scaling not supported\n");
656 return -EINVAL;
657 }
658
659 if (intel_connector->panel.fitting_mode == value) {
660 /* the LVDS scaling property is not changed */
661 return 0;
662 }
663 intel_connector->panel.fitting_mode = value;
664
665 crtc = intel_attached_encoder(connector)->base.crtc;
666 if (crtc && crtc->enabled) {
667 /*
668 * If the CRTC is enabled, the display will be changed
669 * according to the new panel fitting mode.
670 */
671 intel_crtc_restore_mode(crtc);
672 }
673 }
674
675 return 0;
676 }
677
678 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
679 .mode_set = intel_lvds_mode_set,
680 };
681
682 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
683 .get_modes = intel_lvds_get_modes,
684 .mode_valid = intel_lvds_mode_valid,
685 .best_encoder = intel_best_encoder,
686 };
687
688 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
689 .dpms = intel_connector_dpms,
690 .detect = intel_lvds_detect,
691 .fill_modes = drm_helper_probe_single_connector_modes,
692 .set_property = intel_lvds_set_property,
693 .destroy = intel_lvds_destroy,
694 };
695
696 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
697 .destroy = intel_encoder_destroy,
698 };
699
700 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
701 {
702 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
703 return 1;
704 }
705
706 /* These systems claim to have LVDS, but really don't */
707 static const struct dmi_system_id intel_no_lvds[] = {
708 {
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Apple Mac Mini (Core series)",
711 .matches = {
712 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
714 },
715 },
716 {
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "Apple Mac Mini (Core 2 series)",
719 .matches = {
720 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
721 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
722 },
723 },
724 {
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "MSI IM-945GSE-A",
727 .matches = {
728 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
729 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
730 },
731 },
732 {
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Dell Studio Hybrid",
735 .matches = {
736 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
737 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
738 },
739 },
740 {
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Dell OptiPlex FX170",
743 .matches = {
744 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
745 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
746 },
747 },
748 {
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "AOpen Mini PC",
751 .matches = {
752 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
753 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
754 },
755 },
756 {
757 .callback = intel_no_lvds_dmi_callback,
758 .ident = "AOpen Mini PC MP915",
759 .matches = {
760 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
761 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
762 },
763 },
764 {
765 .callback = intel_no_lvds_dmi_callback,
766 .ident = "AOpen i915GMm-HFS",
767 .matches = {
768 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
769 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
770 },
771 },
772 {
773 .callback = intel_no_lvds_dmi_callback,
774 .ident = "AOpen i45GMx-I",
775 .matches = {
776 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
777 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
778 },
779 },
780 {
781 .callback = intel_no_lvds_dmi_callback,
782 .ident = "Aopen i945GTt-VFA",
783 .matches = {
784 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
785 },
786 },
787 {
788 .callback = intel_no_lvds_dmi_callback,
789 .ident = "Clientron U800",
790 .matches = {
791 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
792 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
793 },
794 },
795 {
796 .callback = intel_no_lvds_dmi_callback,
797 .ident = "Clientron E830",
798 .matches = {
799 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
800 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
801 },
802 },
803 {
804 .callback = intel_no_lvds_dmi_callback,
805 .ident = "Asus EeeBox PC EB1007",
806 .matches = {
807 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
808 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
809 },
810 },
811 {
812 .callback = intel_no_lvds_dmi_callback,
813 .ident = "Asus AT5NM10T-I",
814 .matches = {
815 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
816 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
817 },
818 },
819 {
820 .callback = intel_no_lvds_dmi_callback,
821 .ident = "Hewlett-Packard HP t5740e Thin Client",
822 .matches = {
823 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
824 DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
825 },
826 },
827 {
828 .callback = intel_no_lvds_dmi_callback,
829 .ident = "Hewlett-Packard t5745",
830 .matches = {
831 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
832 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
833 },
834 },
835 {
836 .callback = intel_no_lvds_dmi_callback,
837 .ident = "Hewlett-Packard st5747",
838 .matches = {
839 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
840 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
841 },
842 },
843 {
844 .callback = intel_no_lvds_dmi_callback,
845 .ident = "MSI Wind Box DC500",
846 .matches = {
847 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
848 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
849 },
850 },
851 {
852 .callback = intel_no_lvds_dmi_callback,
853 .ident = "Gigabyte GA-D525TUD",
854 .matches = {
855 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
856 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
857 },
858 },
859 {
860 .callback = intel_no_lvds_dmi_callback,
861 .ident = "Supermicro X7SPA-H",
862 .matches = {
863 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
864 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
865 },
866 },
867 {
868 .callback = intel_no_lvds_dmi_callback,
869 .ident = "Fujitsu Esprimo Q900",
870 .matches = {
871 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
872 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
873 },
874 },
875
876 { } /* terminating entry */
877 };
878
879 /**
880 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
881 * @dev: drm device
882 * @connector: LVDS connector
883 *
884 * Find the reduced downclock for LVDS in EDID.
885 */
886 static void intel_find_lvds_downclock(struct drm_device *dev,
887 struct drm_display_mode *fixed_mode,
888 struct drm_connector *connector)
889 {
890 struct drm_i915_private *dev_priv = dev->dev_private;
891 struct drm_display_mode *scan;
892 int temp_downclock;
893
894 temp_downclock = fixed_mode->clock;
895 list_for_each_entry(scan, &connector->probed_modes, head) {
896 /*
897 * If one mode has the same resolution with the fixed_panel
898 * mode while they have the different refresh rate, it means
899 * that the reduced downclock is found for the LVDS. In such
900 * case we can set the different FPx0/1 to dynamically select
901 * between low and high frequency.
902 */
903 if (scan->hdisplay == fixed_mode->hdisplay &&
904 scan->hsync_start == fixed_mode->hsync_start &&
905 scan->hsync_end == fixed_mode->hsync_end &&
906 scan->htotal == fixed_mode->htotal &&
907 scan->vdisplay == fixed_mode->vdisplay &&
908 scan->vsync_start == fixed_mode->vsync_start &&
909 scan->vsync_end == fixed_mode->vsync_end &&
910 scan->vtotal == fixed_mode->vtotal) {
911 if (scan->clock < temp_downclock) {
912 /*
913 * The downclock is already found. But we
914 * expect to find the lower downclock.
915 */
916 temp_downclock = scan->clock;
917 }
918 }
919 }
920 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
921 /* We found the downclock for LVDS. */
922 dev_priv->lvds_downclock_avail = 1;
923 dev_priv->lvds_downclock = temp_downclock;
924 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
925 "Normal clock %dKhz, downclock %dKhz\n",
926 fixed_mode->clock, temp_downclock);
927 }
928 }
929
930 /*
931 * Enumerate the child dev array parsed from VBT to check whether
932 * the LVDS is present.
933 * If it is present, return 1.
934 * If it is not present, return false.
935 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
936 */
937 static bool lvds_is_present_in_vbt(struct drm_device *dev,
938 u8 *i2c_pin)
939 {
940 struct drm_i915_private *dev_priv = dev->dev_private;
941 int i;
942
943 if (!dev_priv->child_dev_num)
944 return true;
945
946 for (i = 0; i < dev_priv->child_dev_num; i++) {
947 struct child_device_config *child = dev_priv->child_dev + i;
948
949 /* If the device type is not LFP, continue.
950 * We have to check both the new identifiers as well as the
951 * old for compatibility with some BIOSes.
952 */
953 if (child->device_type != DEVICE_TYPE_INT_LFP &&
954 child->device_type != DEVICE_TYPE_LFP)
955 continue;
956
957 if (intel_gmbus_is_port_valid(child->i2c_pin))
958 *i2c_pin = child->i2c_pin;
959
960 /* However, we cannot trust the BIOS writers to populate
961 * the VBT correctly. Since LVDS requires additional
962 * information from AIM blocks, a non-zero addin offset is
963 * a good indicator that the LVDS is actually present.
964 */
965 if (child->addin_offset)
966 return true;
967
968 /* But even then some BIOS writers perform some black magic
969 * and instantiate the device without reference to any
970 * additional data. Trust that if the VBT was written into
971 * the OpRegion then they have validated the LVDS's existence.
972 */
973 if (dev_priv->opregion.vbt)
974 return true;
975 }
976
977 return false;
978 }
979
980 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
981 {
982 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
983 return 1;
984 }
985
986 static const struct dmi_system_id intel_dual_link_lvds[] = {
987 {
988 .callback = intel_dual_link_lvds_callback,
989 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
990 .matches = {
991 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
992 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
993 },
994 },
995 { } /* terminating entry */
996 };
997
998 bool intel_is_dual_link_lvds(struct drm_device *dev)
999 {
1000 struct intel_encoder *encoder;
1001 struct intel_lvds_encoder *lvds_encoder;
1002
1003 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
1004 base.head) {
1005 if (encoder->type == INTEL_OUTPUT_LVDS) {
1006 lvds_encoder = to_lvds_encoder(&encoder->base);
1007
1008 return lvds_encoder->is_dual_link;
1009 }
1010 }
1011
1012 return false;
1013 }
1014
1015 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
1016 {
1017 struct drm_device *dev = lvds_encoder->base.base.dev;
1018 unsigned int val;
1019 struct drm_i915_private *dev_priv = dev->dev_private;
1020
1021 /* use the module option value if specified */
1022 if (i915_lvds_channel_mode > 0)
1023 return i915_lvds_channel_mode == 2;
1024
1025 if (dmi_check_system(intel_dual_link_lvds))
1026 return true;
1027
1028 /* BIOS should set the proper LVDS register value at boot, but
1029 * in reality, it doesn't set the value when the lid is closed;
1030 * we need to check "the value to be set" in VBT when LVDS
1031 * register is uninitialized.
1032 */
1033 val = I915_READ(lvds_encoder->reg);
1034 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
1035 val = dev_priv->bios_lvds_val;
1036
1037 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
1038 }
1039
1040 static bool intel_lvds_supported(struct drm_device *dev)
1041 {
1042 /* With the introduction of the PCH we gained a dedicated
1043 * LVDS presence pin, use it. */
1044 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
1045 return true;
1046
1047 /* Otherwise LVDS was only attached to mobile products,
1048 * except for the inglorious 830gm */
1049 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
1050 return true;
1051
1052 return false;
1053 }
1054
1055 /**
1056 * intel_lvds_init - setup LVDS connectors on this device
1057 * @dev: drm device
1058 *
1059 * Create the connector, register the LVDS DDC bus, and try to figure out what
1060 * modes we can display on the LVDS panel (if present).
1061 */
1062 bool intel_lvds_init(struct drm_device *dev)
1063 {
1064 struct drm_i915_private *dev_priv = dev->dev_private;
1065 struct intel_lvds_encoder *lvds_encoder;
1066 struct intel_encoder *intel_encoder;
1067 struct intel_lvds_connector *lvds_connector;
1068 struct intel_connector *intel_connector;
1069 struct drm_connector *connector;
1070 struct drm_encoder *encoder;
1071 struct drm_display_mode *scan; /* *modes, *bios_mode; */
1072 struct drm_display_mode *fixed_mode = NULL;
1073 struct edid *edid;
1074 struct drm_crtc *crtc;
1075 u32 lvds;
1076 int pipe;
1077 u8 pin;
1078
1079 if (!intel_lvds_supported(dev))
1080 return false;
1081
1082 /* Skip init on machines we know falsely report LVDS */
1083 if (dmi_check_system(intel_no_lvds))
1084 return false;
1085
1086 pin = GMBUS_PORT_PANEL;
1087 if (!lvds_is_present_in_vbt(dev, &pin)) {
1088 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1089 return false;
1090 }
1091
1092 if (HAS_PCH_SPLIT(dev)) {
1093 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1094 return false;
1095 if (dev_priv->edp.support) {
1096 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1097 return false;
1098 }
1099 }
1100
1101 lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
1102 if (!lvds_encoder)
1103 return false;
1104
1105 lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
1106 if (!lvds_connector) {
1107 kfree(lvds_encoder);
1108 return false;
1109 }
1110
1111 lvds_encoder->attached_connector = lvds_connector;
1112
1113 if (!HAS_PCH_SPLIT(dev)) {
1114 lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
1115 }
1116
1117 intel_encoder = &lvds_encoder->base;
1118 encoder = &intel_encoder->base;
1119 intel_connector = &lvds_connector->base;
1120 connector = &intel_connector->base;
1121 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1122 DRM_MODE_CONNECTOR_LVDS);
1123
1124 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1125 DRM_MODE_ENCODER_LVDS);
1126
1127 intel_encoder->enable = intel_enable_lvds;
1128 intel_encoder->pre_enable = intel_pre_enable_lvds;
1129 intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
1130 intel_encoder->compute_config = intel_lvds_compute_config;
1131 intel_encoder->disable = intel_disable_lvds;
1132 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1133 intel_connector->get_hw_state = intel_connector_get_hw_state;
1134
1135 intel_connector_attach_encoder(intel_connector, intel_encoder);
1136 intel_encoder->type = INTEL_OUTPUT_LVDS;
1137
1138 intel_encoder->cloneable = false;
1139 if (HAS_PCH_SPLIT(dev))
1140 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1141 else if (IS_GEN4(dev))
1142 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1143 else
1144 intel_encoder->crtc_mask = (1 << 1);
1145
1146 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1147 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1148 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1149 connector->interlace_allowed = false;
1150 connector->doublescan_allowed = false;
1151
1152 if (HAS_PCH_SPLIT(dev)) {
1153 lvds_encoder->reg = PCH_LVDS;
1154 } else {
1155 lvds_encoder->reg = LVDS;
1156 }
1157
1158 /* create the scaling mode property */
1159 drm_mode_create_scaling_mode_property(dev);
1160 drm_object_attach_property(&connector->base,
1161 dev->mode_config.scaling_mode_property,
1162 DRM_MODE_SCALE_ASPECT);
1163 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1164 /*
1165 * LVDS discovery:
1166 * 1) check for EDID on DDC
1167 * 2) check for VBT data
1168 * 3) check to see if LVDS is already on
1169 * if none of the above, no panel
1170 * 4) make sure lid is open
1171 * if closed, act like it's not there for now
1172 */
1173
1174 /*
1175 * Attempt to get the fixed panel mode from DDC. Assume that the
1176 * preferred mode is the right one.
1177 */
1178 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1179 if (edid) {
1180 if (drm_add_edid_modes(connector, edid)) {
1181 drm_mode_connector_update_edid_property(connector,
1182 edid);
1183 } else {
1184 kfree(edid);
1185 edid = ERR_PTR(-EINVAL);
1186 }
1187 } else {
1188 edid = ERR_PTR(-ENOENT);
1189 }
1190 lvds_connector->base.edid = edid;
1191
1192 if (IS_ERR_OR_NULL(edid)) {
1193 /* Didn't get an EDID, so
1194 * Set wide sync ranges so we get all modes
1195 * handed to valid_mode for checking
1196 */
1197 connector->display_info.min_vfreq = 0;
1198 connector->display_info.max_vfreq = 200;
1199 connector->display_info.min_hfreq = 0;
1200 connector->display_info.max_hfreq = 200;
1201 }
1202
1203 list_for_each_entry(scan, &connector->probed_modes, head) {
1204 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1205 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1206 drm_mode_debug_printmodeline(scan);
1207
1208 fixed_mode = drm_mode_duplicate(dev, scan);
1209 if (fixed_mode) {
1210 intel_find_lvds_downclock(dev, fixed_mode,
1211 connector);
1212 goto out;
1213 }
1214 }
1215 }
1216
1217 /* Failed to get EDID, what about VBT? */
1218 if (dev_priv->lfp_lvds_vbt_mode) {
1219 DRM_DEBUG_KMS("using mode from VBT: ");
1220 drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
1221
1222 fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1223 if (fixed_mode) {
1224 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1225 goto out;
1226 }
1227 }
1228
1229 /*
1230 * If we didn't get EDID, try checking if the panel is already turned
1231 * on. If so, assume that whatever is currently programmed is the
1232 * correct mode.
1233 */
1234
1235 /* Ironlake: FIXME if still fail, not try pipe mode now */
1236 if (HAS_PCH_SPLIT(dev))
1237 goto failed;
1238
1239 lvds = I915_READ(LVDS);
1240 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1241 crtc = intel_get_crtc_for_pipe(dev, pipe);
1242
1243 if (crtc && (lvds & LVDS_PORT_EN)) {
1244 fixed_mode = intel_crtc_mode_get(dev, crtc);
1245 if (fixed_mode) {
1246 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1247 drm_mode_debug_printmodeline(fixed_mode);
1248 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1249 goto out;
1250 }
1251 }
1252
1253 /* If we still don't have a mode after all that, give up. */
1254 if (!fixed_mode)
1255 goto failed;
1256
1257 out:
1258 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1259 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1260 lvds_encoder->is_dual_link ? "dual" : "single");
1261
1262 /*
1263 * Unlock registers and just
1264 * leave them unlocked
1265 */
1266 if (HAS_PCH_SPLIT(dev)) {
1267 I915_WRITE(PCH_PP_CONTROL,
1268 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1269 } else {
1270 I915_WRITE(PP_CONTROL,
1271 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1272 }
1273 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1274 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1275 DRM_DEBUG_KMS("lid notifier registration failed\n");
1276 lvds_connector->lid_notifier.notifier_call = NULL;
1277 }
1278 drm_sysfs_connector_add(connector);
1279
1280 intel_panel_init(&intel_connector->panel, fixed_mode);
1281 intel_panel_setup_backlight(connector);
1282
1283 return true;
1284
1285 failed:
1286 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1287 drm_connector_cleanup(connector);
1288 drm_encoder_cleanup(encoder);
1289 if (fixed_mode)
1290 drm_mode_destroy(dev, fixed_mode);
1291 kfree(lvds_encoder);
1292 kfree(lvds_connector);
1293 return false;
1294 }
This page took 0.105705 seconds and 5 git commands to generate.