drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <linux/vga_switcheroo.h>
  35 #include <drm/drmP.h>
  36 #include <drm/drm_atomic_helper.h>
  37 #include <drm/drm_crtc.h>
  38 #include <drm/drm_edid.h>
  39 #include "intel_drv.h"
  40 #include <drm/i915_drm.h>
  41 #include "i915_drv.h"
  42 #include <linux/acpi.h>
  43
  44 /* Private structure for the integrated LVDS support */
  45 struct intel_lvds_connector {
  46         struct intel_connector base;
  47
  48         struct notifier_block lid_notifier;
  49 };
  50
  51 struct intel_lvds_encoder {
  52         struct intel_encoder base;
  53
  54         bool is_dual_link;
  55         i915_reg_t reg;
  56         u32 a3_power;
  57
  58         struct intel_lvds_connector *attached_connector;
  59 };
  60
  61 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  62 {
  63         return container_of(encoder, struct intel_lvds_encoder, base.base);
  64 }
  65
  66 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  67 {
  68         return container_of(connector, struct intel_lvds_connector, base.base);
  69 }
  70
  71 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  72                                     enum pipe *pipe)
  73 {
  74         struct drm_device *dev = encoder->base.dev;
  75         struct drm_i915_private *dev_priv = dev->dev_private;
  76         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  77         enum intel_display_power_domain power_domain;
  78         u32 tmp;
  79         bool ret;
  80
  81         power_domain = intel_display_port_power_domain(encoder);
  82         if (!intel_display_power_get_if_enabled(dev_priv, power_domain))
  83                 return false;
  84
  85         ret = false;
  86
  87         tmp = I915_READ(lvds_encoder->reg);
  88
  89         if (!(tmp & LVDS_PORT_EN))
  90                 goto out;
  91
  92         if (HAS_PCH_CPT(dev))
  93                 *pipe = PORT_TO_PIPE_CPT(tmp);
  94         else
  95                 *pipe = PORT_TO_PIPE(tmp);
  96
  97         ret = true;
  98
  99 out:
 100         intel_display_power_put(dev_priv, power_domain);
 101
 102         return ret;
 103 }
 104
 105 static void intel_lvds_get_config(struct intel_encoder *encoder,
 106                                   struct intel_crtc_state *pipe_config)
 107 {
 108         struct drm_device *dev = encoder->base.dev;
 109         struct drm_i915_private *dev_priv = dev->dev_private;
 110         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 111         u32 tmp, flags = 0;
 112
 113         tmp = I915_READ(lvds_encoder->reg);
 114         if (tmp & LVDS_HSYNC_POLARITY)
 115                 flags |= DRM_MODE_FLAG_NHSYNC;
 116         else
 117                 flags |= DRM_MODE_FLAG_PHSYNC;
 118         if (tmp & LVDS_VSYNC_POLARITY)
 119                 flags |= DRM_MODE_FLAG_NVSYNC;
 120         else
 121                 flags |= DRM_MODE_FLAG_PVSYNC;
 122
 123         pipe_config->base.adjusted_mode.flags |= flags;
 124
 125         /* gen2/3 store dither state in pfit control, needs to match */
 126         if (INTEL_INFO(dev)->gen < 4) {
 127                 tmp = I915_READ(PFIT_CONTROL);
 128
 129                 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
 130         }
 131
 132         pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
 133 }
 134
 135 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 136 {
 137         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 138         struct drm_device *dev = encoder->base.dev;
 139         struct drm_i915_private *dev_priv = dev->dev_private;
 140         struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
 141         const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
 142         int pipe = crtc->pipe;
 143         u32 temp;
 144
 145         if (HAS_PCH_SPLIT(dev)) {
 146                 assert_fdi_rx_pll_disabled(dev_priv, pipe);
 147                 assert_shared_dpll_disabled(dev_priv,
 148                                             crtc->config->shared_dpll);
 149         } else {
 150                 assert_pll_disabled(dev_priv, pipe);
 151         }
 152
 153         temp = I915_READ(lvds_encoder->reg);
 154         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 155
 156         if (HAS_PCH_CPT(dev)) {
 157                 temp &= ~PORT_TRANS_SEL_MASK;
 158                 temp |= PORT_TRANS_SEL_CPT(pipe);
 159         } else {
 160                 if (pipe == 1) {
 161                         temp |= LVDS_PIPEB_SELECT;
 162                 } else {
 163                         temp &= ~LVDS_PIPEB_SELECT;
 164                 }
 165         }
 166
 167         /* set the corresponsding LVDS_BORDER bit */
 168         temp &= ~LVDS_BORDER_ENABLE;
 169         temp |= crtc->config->gmch_pfit.lvds_border_bits;
 170         /* Set the B0-B3 data pairs corresponding to whether we're going to
 171          * set the DPLLs for dual-channel mode or not.
 172          */
 173         if (lvds_encoder->is_dual_link)
 174                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 175         else
 176                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 177
 178         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 179          * appropriately here, but we need to look more thoroughly into how
 180          * panels behave in the two modes. For now, let's just maintain the
 181          * value we got from the BIOS.
 182          */
 183          temp &= ~LVDS_A3_POWER_MASK;
 184          temp |= lvds_encoder->a3_power;
 185
 186         /* Set the dithering flag on LVDS as needed, note that there is no
 187          * special lvds dither control bit on pch-split platforms, dithering is
 188          * only controlled through the PIPECONF reg. */
 189         if (INTEL_INFO(dev)->gen == 4) {
 190                 /* Bspec wording suggests that LVDS port dithering only exists
 191                  * for 18bpp panels. */
 192                 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
 193                         temp |= LVDS_ENABLE_DITHER;
 194                 else
 195                         temp &= ~LVDS_ENABLE_DITHER;
 196         }
 197         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 198         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 199                 temp |= LVDS_HSYNC_POLARITY;
 200         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 201                 temp |= LVDS_VSYNC_POLARITY;
 202
 203         I915_WRITE(lvds_encoder->reg, temp);
 204 }
 205
 206 /**
 207  * Sets the power state for the panel.
 208  */
 209 static void intel_enable_lvds(struct intel_encoder *encoder)
 210 {
 211         struct drm_device *dev = encoder->base.dev;
 212         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 213         struct intel_connector *intel_connector =
 214                 &lvds_encoder->attached_connector->base;
 215         struct drm_i915_private *dev_priv = dev->dev_private;
 216         i915_reg_t ctl_reg, stat_reg;
 217
 218         if (HAS_PCH_SPLIT(dev)) {
 219                 ctl_reg = PCH_PP_CONTROL;
 220                 stat_reg = PCH_PP_STATUS;
 221         } else {
 222                 ctl_reg = PP_CONTROL;
 223                 stat_reg = PP_STATUS;
 224         }
 225
 226         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 227
 228         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 229         POSTING_READ(lvds_encoder->reg);
 230         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 231                 DRM_ERROR("timed out waiting for panel to power on\n");
 232
 233         intel_panel_enable_backlight(intel_connector);
 234 }
 235
 236 static void intel_disable_lvds(struct intel_encoder *encoder)
 237 {
 238         struct drm_device *dev = encoder->base.dev;
 239         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 240         struct drm_i915_private *dev_priv = dev->dev_private;
 241         i915_reg_t ctl_reg, stat_reg;
 242
 243         if (HAS_PCH_SPLIT(dev)) {
 244                 ctl_reg = PCH_PP_CONTROL;
 245                 stat_reg = PCH_PP_STATUS;
 246         } else {
 247                 ctl_reg = PP_CONTROL;
 248                 stat_reg = PP_STATUS;
 249         }
 250
 251         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 252         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 253                 DRM_ERROR("timed out waiting for panel to power off\n");
 254
 255         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 256         POSTING_READ(lvds_encoder->reg);
 257 }
 258
 259 static void gmch_disable_lvds(struct intel_encoder *encoder)
 260 {
 261         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 262         struct intel_connector *intel_connector =
 263                 &lvds_encoder->attached_connector->base;
 264
 265         intel_panel_disable_backlight(intel_connector);
 266
 267         intel_disable_lvds(encoder);
 268 }
 269
 270 static void pch_disable_lvds(struct intel_encoder *encoder)
 271 {
 272         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 273         struct intel_connector *intel_connector =
 274                 &lvds_encoder->attached_connector->base;
 275
 276         intel_panel_disable_backlight(intel_connector);
 277 }
 278
 279 static void pch_post_disable_lvds(struct intel_encoder *encoder)
 280 {
 281         intel_disable_lvds(encoder);
 282 }
 283
 284 static enum drm_mode_status
 285 intel_lvds_mode_valid(struct drm_connector *connector,
 286                       struct drm_display_mode *mode)
 287 {
 288         struct intel_connector *intel_connector = to_intel_connector(connector);
 289         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 290         int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
 291
 292         if (mode->hdisplay > fixed_mode->hdisplay)
 293                 return MODE_PANEL;
 294         if (mode->vdisplay > fixed_mode->vdisplay)
 295                 return MODE_PANEL;
 296         if (fixed_mode->clock > max_pixclk)
 297                 return MODE_CLOCK_HIGH;
 298
 299         return MODE_OK;
 300 }
 301
 302 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
 303                                       struct intel_crtc_state *pipe_config)
 304 {
 305         struct drm_device *dev = intel_encoder->base.dev;
 306         struct intel_lvds_encoder *lvds_encoder =
 307                 to_lvds_encoder(&intel_encoder->base);
 308         struct intel_connector *intel_connector =
 309                 &lvds_encoder->attached_connector->base;
 310         struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 311         struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
 312         unsigned int lvds_bpp;
 313
 314         /* Should never happen!! */
 315         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 316                 DRM_ERROR("Can't support LVDS on pipe A\n");
 317                 return false;
 318         }
 319
 320         if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
 321                 lvds_bpp = 8*3;
 322         else
 323                 lvds_bpp = 6*3;
 324
 325         if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
 326                 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
 327                               pipe_config->pipe_bpp, lvds_bpp);
 328                 pipe_config->pipe_bpp = lvds_bpp;
 329         }
 330
 331         /*
 332          * We have timings from the BIOS for the panel, put them in
 333          * to the adjusted mode.  The CRTC will be set up for this mode,
 334          * with the panel scaling set up to source from the H/VDisplay
 335          * of the original mode.
 336          */
 337         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 338                                adjusted_mode);
 339
 340         if (HAS_PCH_SPLIT(dev)) {
 341                 pipe_config->has_pch_encoder = true;
 342
 343                 intel_pch_panel_fitting(intel_crtc, pipe_config,
 344                                         intel_connector->panel.fitting_mode);
 345         } else {
 346                 intel_gmch_panel_fitting(intel_crtc, pipe_config,
 347                                          intel_connector->panel.fitting_mode);
 348
 349         }
 350
 351         /*
 352          * XXX: It would be nice to support lower refresh rates on the
 353          * panels to reduce power consumption, and perhaps match the
 354          * user's requested refresh rate.
 355          */
 356
 357         return true;
 358 }
 359
 360 /**
 361  * Detect the LVDS connection.
 362  *
 363  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 364  * connected and closed means disconnected.  We also send hotplug events as
 365  * needed, using lid status notification from the input layer.
 366  */
 367 static enum drm_connector_status
 368 intel_lvds_detect(struct drm_connector *connector, bool force)
 369 {
 370         struct drm_device *dev = connector->dev;
 371         enum drm_connector_status status;
 372
 373         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
 374                       connector->base.id, connector->name);
 375
 376         status = intel_panel_detect(dev);
 377         if (status != connector_status_unknown)
 378                 return status;
 379
 380         return connector_status_connected;
 381 }
 382
 383 /**
 384  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 385  */
 386 static int intel_lvds_get_modes(struct drm_connector *connector)
 387 {
 388         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 389         struct drm_device *dev = connector->dev;
 390         struct drm_display_mode *mode;
 391
 392         /* use cached edid if we have one */
 393         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 394                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 395
 396         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 397         if (mode == NULL)
 398                 return 0;
 399
 400         drm_mode_probed_add(connector, mode);
 401         return 1;
 402 }
 403
 404 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 405 {
 406         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 407         return 1;
 408 }
 409
 410 /* The GPU hangs up on these systems if modeset is performed on LID open */
 411 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 412         {
 413                 .callback = intel_no_modeset_on_lid_dmi_callback,
 414                 .ident = "Toshiba Tecra A11",
 415                 .matches = {
 416                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 417                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 418                 },
 419         },
 420
 421         { }     /* terminating entry */
 422 };
 423
 424 /*
 425  * Lid events. Note the use of 'modeset':
 426  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 427  *    and set it to MODESET_DONE on open
 428  *  - we use it as a "only once" bit (ie we ignore
 429  *    duplicate events where it was already properly set)
 430  *  - the suspend/resume paths will set it to
 431  *    MODESET_SUSPENDED and ignore the lid open event,
 432  *    because they restore the mode ("lid open").
 433  */
 434 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 435                             void *unused)
 436 {
 437         struct intel_lvds_connector *lvds_connector =
 438                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 439         struct drm_connector *connector = &lvds_connector->base.base;
 440         struct drm_device *dev = connector->dev;
 441         struct drm_i915_private *dev_priv = dev->dev_private;
 442
 443         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 444                 return NOTIFY_OK;
 445
 446         mutex_lock(&dev_priv->modeset_restore_lock);
 447         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 448                 goto exit;
 449         /*
 450          * check and update the status of LVDS connector after receiving
 451          * the LID nofication event.
 452          */
 453         connector->status = connector->funcs->detect(connector, false);
 454
 455         /* Don't force modeset on machines where it causes a GPU lockup */
 456         if (dmi_check_system(intel_no_modeset_on_lid))
 457                 goto exit;
 458         if (!acpi_lid_open()) {
 459                 /* do modeset on next lid open event */
 460                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 461                 goto exit;
 462         }
 463
 464         if (dev_priv->modeset_restore == MODESET_DONE)
 465                 goto exit;
 466
 467         /*
 468          * Some old platform's BIOS love to wreak havoc while the lid is closed.
 469          * We try to detect this here and undo any damage. The split for PCH
 470          * platforms is rather conservative and a bit arbitrary expect that on
 471          * those platforms VGA disabling requires actual legacy VGA I/O access,
 472          * and as part of the cleanup in the hw state restore we also redisable
 473          * the vga plane.
 474          */
 475         if (!HAS_PCH_SPLIT(dev))
 476                 intel_display_resume(dev);
 477
 478         dev_priv->modeset_restore = MODESET_DONE;
 479
 480 exit:
 481         mutex_unlock(&dev_priv->modeset_restore_lock);
 482         return NOTIFY_OK;
 483 }
 484
 485 /**
 486  * intel_lvds_destroy - unregister and free LVDS structures
 487  * @connector: connector to free
 488  *
 489  * Unregister the DDC bus for this connector then free the driver private
 490  * structure.
 491  */
 492 static void intel_lvds_destroy(struct drm_connector *connector)
 493 {
 494         struct intel_lvds_connector *lvds_connector =
 495                 to_lvds_connector(connector);
 496
 497         if (lvds_connector->lid_notifier.notifier_call)
 498                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 499
 500         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 501                 kfree(lvds_connector->base.edid);
 502
 503         intel_panel_fini(&lvds_connector->base.panel);
 504
 505         drm_connector_cleanup(connector);
 506         kfree(connector);
 507 }
 508
 509 static int intel_lvds_set_property(struct drm_connector *connector,
 510                                    struct drm_property *property,
 511                                    uint64_t value)
 512 {
 513         struct intel_connector *intel_connector = to_intel_connector(connector);
 514         struct drm_device *dev = connector->dev;
 515
 516         if (property == dev->mode_config.scaling_mode_property) {
 517                 struct drm_crtc *crtc;
 518
 519                 if (value == DRM_MODE_SCALE_NONE) {
 520                         DRM_DEBUG_KMS("no scaling not supported\n");
 521                         return -EINVAL;
 522                 }
 523
 524                 if (intel_connector->panel.fitting_mode == value) {
 525                         /* the LVDS scaling property is not changed */
 526                         return 0;
 527                 }
 528                 intel_connector->panel.fitting_mode = value;
 529
 530                 crtc = intel_attached_encoder(connector)->base.crtc;
 531                 if (crtc && crtc->state->enable) {
 532                         /*
 533                          * If the CRTC is enabled, the display will be changed
 534                          * according to the new panel fitting mode.
 535                          */
 536                         intel_crtc_restore_mode(crtc);
 537                 }
 538         }
 539
 540         return 0;
 541 }
 542
 543 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 544         .get_modes = intel_lvds_get_modes,
 545         .mode_valid = intel_lvds_mode_valid,
 546         .best_encoder = intel_best_encoder,
 547 };
 548
 549 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 550         .dpms = drm_atomic_helper_connector_dpms,
 551         .detect = intel_lvds_detect,
 552         .fill_modes = drm_helper_probe_single_connector_modes,
 553         .set_property = intel_lvds_set_property,
 554         .atomic_get_property = intel_connector_atomic_get_property,
 555         .destroy = intel_lvds_destroy,
 556         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 557         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 558 };
 559
 560 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 561         .destroy = intel_encoder_destroy,
 562 };
 563
 564 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 565 {
 566         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 567         return 1;
 568 }
 569
 570 /* These systems claim to have LVDS, but really don't */
 571 static const struct dmi_system_id intel_no_lvds[] = {
 572         {
 573                 .callback = intel_no_lvds_dmi_callback,
 574                 .ident = "Apple Mac Mini (Core series)",
 575                 .matches = {
 576                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 577                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 578                 },
 579         },
 580         {
 581                 .callback = intel_no_lvds_dmi_callback,
 582                 .ident = "Apple Mac Mini (Core 2 series)",
 583                 .matches = {
 584                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 585                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 586                 },
 587         },
 588         {
 589                 .callback = intel_no_lvds_dmi_callback,
 590                 .ident = "MSI IM-945GSE-A",
 591                 .matches = {
 592                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 593                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 594                 },
 595         },
 596         {
 597                 .callback = intel_no_lvds_dmi_callback,
 598                 .ident = "Dell Studio Hybrid",
 599                 .matches = {
 600                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 601                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 602                 },
 603         },
 604         {
 605                 .callback = intel_no_lvds_dmi_callback,
 606                 .ident = "Dell OptiPlex FX170",
 607                 .matches = {
 608                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 609                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 610                 },
 611         },
 612         {
 613                 .callback = intel_no_lvds_dmi_callback,
 614                 .ident = "AOpen Mini PC",
 615                 .matches = {
 616                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 617                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 618                 },
 619         },
 620         {
 621                 .callback = intel_no_lvds_dmi_callback,
 622                 .ident = "AOpen Mini PC MP915",
 623                 .matches = {
 624                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 625                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 626                 },
 627         },
 628         {
 629                 .callback = intel_no_lvds_dmi_callback,
 630                 .ident = "AOpen i915GMm-HFS",
 631                 .matches = {
 632                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 633                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 634                 },
 635         },
 636         {
 637                 .callback = intel_no_lvds_dmi_callback,
 638                 .ident = "AOpen i45GMx-I",
 639                 .matches = {
 640                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 641                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 642                 },
 643         },
 644         {
 645                 .callback = intel_no_lvds_dmi_callback,
 646                 .ident = "Aopen i945GTt-VFA",
 647                 .matches = {
 648                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 649                 },
 650         },
 651         {
 652                 .callback = intel_no_lvds_dmi_callback,
 653                 .ident = "Clientron U800",
 654                 .matches = {
 655                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 656                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 657                 },
 658         },
 659         {
 660                 .callback = intel_no_lvds_dmi_callback,
 661                 .ident = "Clientron E830",
 662                 .matches = {
 663                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 664                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 665                 },
 666         },
 667         {
 668                 .callback = intel_no_lvds_dmi_callback,
 669                 .ident = "Asus EeeBox PC EB1007",
 670                 .matches = {
 671                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 672                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 673                 },
 674         },
 675         {
 676                 .callback = intel_no_lvds_dmi_callback,
 677                 .ident = "Asus AT5NM10T-I",
 678                 .matches = {
 679                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 680                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 681                 },
 682         },
 683         {
 684                 .callback = intel_no_lvds_dmi_callback,
 685                 .ident = "Hewlett-Packard HP t5740",
 686                 .matches = {
 687                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 688                         DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
 689                 },
 690         },
 691         {
 692                 .callback = intel_no_lvds_dmi_callback,
 693                 .ident = "Hewlett-Packard t5745",
 694                 .matches = {
 695                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 696                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 697                 },
 698         },
 699         {
 700                 .callback = intel_no_lvds_dmi_callback,
 701                 .ident = "Hewlett-Packard st5747",
 702                 .matches = {
 703                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 704                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 705                 },
 706         },
 707         {
 708                 .callback = intel_no_lvds_dmi_callback,
 709                 .ident = "MSI Wind Box DC500",
 710                 .matches = {
 711                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 712                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 713                 },
 714         },
 715         {
 716                 .callback = intel_no_lvds_dmi_callback,
 717                 .ident = "Gigabyte GA-D525TUD",
 718                 .matches = {
 719                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 720                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 721                 },
 722         },
 723         {
 724                 .callback = intel_no_lvds_dmi_callback,
 725                 .ident = "Supermicro X7SPA-H",
 726                 .matches = {
 727                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 728                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 729                 },
 730         },
 731         {
 732                 .callback = intel_no_lvds_dmi_callback,
 733                 .ident = "Fujitsu Esprimo Q900",
 734                 .matches = {
 735                         DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
 736                         DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
 737                 },
 738         },
 739         {
 740                 .callback = intel_no_lvds_dmi_callback,
 741                 .ident = "Intel D410PT",
 742                 .matches = {
 743                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 744                         DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
 745                 },
 746         },
 747         {
 748                 .callback = intel_no_lvds_dmi_callback,
 749                 .ident = "Intel D425KT",
 750                 .matches = {
 751                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 752                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
 753                 },
 754         },
 755         {
 756                 .callback = intel_no_lvds_dmi_callback,
 757                 .ident = "Intel D510MO",
 758                 .matches = {
 759                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 760                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
 761                 },
 762         },
 763         {
 764                 .callback = intel_no_lvds_dmi_callback,
 765                 .ident = "Intel D525MW",
 766                 .matches = {
 767                         DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
 768                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
 769                 },
 770         },
 771
 772         { }     /* terminating entry */
 773 };
 774
 775 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 776 {
 777         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 778         return 1;
 779 }
 780
 781 static const struct dmi_system_id intel_dual_link_lvds[] = {
 782         {
 783                 .callback = intel_dual_link_lvds_callback,
 784                 .ident = "Apple MacBook Pro 15\" (2010)",
 785                 .matches = {
 786                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 787                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
 788                 },
 789         },
 790         {
 791                 .callback = intel_dual_link_lvds_callback,
 792                 .ident = "Apple MacBook Pro 15\" (2011)",
 793                 .matches = {
 794                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 795                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 796                 },
 797         },
 798         {
 799                 .callback = intel_dual_link_lvds_callback,
 800                 .ident = "Apple MacBook Pro 15\" (2012)",
 801                 .matches = {
 802                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 803                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
 804                 },
 805         },
 806         { }     /* terminating entry */
 807 };
 808
 809 bool intel_is_dual_link_lvds(struct drm_device *dev)
 810 {
 811         struct intel_encoder *encoder;
 812         struct intel_lvds_encoder *lvds_encoder;
 813
 814         for_each_intel_encoder(dev, encoder) {
 815                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 816                         lvds_encoder = to_lvds_encoder(&encoder->base);
 817
 818                         return lvds_encoder->is_dual_link;
 819                 }
 820         }
 821
 822         return false;
 823 }
 824
 825 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 826 {
 827         struct drm_device *dev = lvds_encoder->base.base.dev;
 828         unsigned int val;
 829         struct drm_i915_private *dev_priv = dev->dev_private;
 830
 831         /* use the module option value if specified */
 832         if (i915.lvds_channel_mode > 0)
 833                 return i915.lvds_channel_mode == 2;
 834
 835         /* single channel LVDS is limited to 112 MHz */
 836         if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
 837             > 112999)
 838                 return true;
 839
 840         if (dmi_check_system(intel_dual_link_lvds))
 841                 return true;
 842
 843         /* BIOS should set the proper LVDS register value at boot, but
 844          * in reality, it doesn't set the value when the lid is closed;
 845          * we need to check "the value to be set" in VBT when LVDS
 846          * register is uninitialized.
 847          */
 848         val = I915_READ(lvds_encoder->reg);
 849         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
 850                 val = dev_priv->vbt.bios_lvds_val;
 851
 852         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
 853 }
 854
 855 static bool intel_lvds_supported(struct drm_device *dev)
 856 {
 857         /* With the introduction of the PCH we gained a dedicated
 858          * LVDS presence pin, use it. */
 859         if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
 860                 return true;
 861
 862         /* Otherwise LVDS was only attached to mobile products,
 863          * except for the inglorious 830gm */
 864         if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
 865                 return true;
 866
 867         return false;
 868 }
 869
 870 /**
 871  * intel_lvds_init - setup LVDS connectors on this device
 872  * @dev: drm device
 873  *
 874  * Create the connector, register the LVDS DDC bus, and try to figure out what
 875  * modes we can display on the LVDS panel (if present).
 876  */
 877 void intel_lvds_init(struct drm_device *dev)
 878 {
 879         struct drm_i915_private *dev_priv = dev->dev_private;
 880         struct intel_lvds_encoder *lvds_encoder;
 881         struct intel_encoder *intel_encoder;
 882         struct intel_lvds_connector *lvds_connector;
 883         struct intel_connector *intel_connector;
 884         struct drm_connector *connector;
 885         struct drm_encoder *encoder;
 886         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 887         struct drm_display_mode *fixed_mode = NULL;
 888         struct drm_display_mode *downclock_mode = NULL;
 889         struct edid *edid;
 890         struct drm_crtc *crtc;
 891         i915_reg_t lvds_reg;
 892         u32 lvds;
 893         int pipe;
 894         u8 pin;
 895
 896         /*
 897          * Unlock registers and just leave them unlocked. Do this before
 898          * checking quirk lists to avoid bogus WARNINGs.
 899          */
 900         if (HAS_PCH_SPLIT(dev)) {
 901                 I915_WRITE(PCH_PP_CONTROL,
 902                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
 903         } else if (INTEL_INFO(dev_priv)->gen < 5) {
 904                 I915_WRITE(PP_CONTROL,
 905                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
 906         }
 907         if (!intel_lvds_supported(dev))
 908                 return;
 909
 910         /* Skip init on machines we know falsely report LVDS */
 911         if (dmi_check_system(intel_no_lvds))
 912                 return;
 913
 914         if (HAS_PCH_SPLIT(dev))
 915                 lvds_reg = PCH_LVDS;
 916         else
 917                 lvds_reg = LVDS;
 918
 919         lvds = I915_READ(lvds_reg);
 920
 921         if (HAS_PCH_SPLIT(dev)) {
 922                 if ((lvds & LVDS_DETECTED) == 0)
 923                         return;
 924                 if (dev_priv->vbt.edp.support) {
 925                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 926                         return;
 927                 }
 928         }
 929
 930         pin = GMBUS_PIN_PANEL;
 931         if (!intel_bios_is_lvds_present(dev_priv, &pin)) {
 932                 if ((lvds & LVDS_PORT_EN) == 0) {
 933                         DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 934                         return;
 935                 }
 936                 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
 937         }
 938
 939          /* Set the Panel Power On/Off timings if uninitialized. */
 940         if (INTEL_INFO(dev_priv)->gen < 5 &&
 941             I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
 942                 /* Set T2 to 40ms and T5 to 200ms */
 943                 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
 944
 945                 /* Set T3 to 35ms and Tx to 200ms */
 946                 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
 947
 948                 DRM_DEBUG_KMS("Panel power timings uninitialized, setting defaults\n");
 949         }
 950
 951         lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
 952         if (!lvds_encoder)
 953                 return;
 954
 955         lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
 956         if (!lvds_connector) {
 957                 kfree(lvds_encoder);
 958                 return;
 959         }
 960
 961         if (intel_connector_init(&lvds_connector->base) < 0) {
 962                 kfree(lvds_connector);
 963                 kfree(lvds_encoder);
 964                 return;
 965         }
 966
 967         lvds_encoder->attached_connector = lvds_connector;
 968
 969         intel_encoder = &lvds_encoder->base;
 970         encoder = &intel_encoder->base;
 971         intel_connector = &lvds_connector->base;
 972         connector = &intel_connector->base;
 973         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 974                            DRM_MODE_CONNECTOR_LVDS);
 975
 976         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 977                          DRM_MODE_ENCODER_LVDS, NULL);
 978
 979         intel_encoder->enable = intel_enable_lvds;
 980         intel_encoder->pre_enable = intel_pre_enable_lvds;
 981         intel_encoder->compute_config = intel_lvds_compute_config;
 982         if (HAS_PCH_SPLIT(dev_priv)) {
 983                 intel_encoder->disable = pch_disable_lvds;
 984                 intel_encoder->post_disable = pch_post_disable_lvds;
 985         } else {
 986                 intel_encoder->disable = gmch_disable_lvds;
 987         }
 988         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
 989         intel_encoder->get_config = intel_lvds_get_config;
 990         intel_connector->get_hw_state = intel_connector_get_hw_state;
 991         intel_connector->unregister = intel_connector_unregister;
 992
 993         intel_connector_attach_encoder(intel_connector, intel_encoder);
 994         intel_encoder->type = INTEL_OUTPUT_LVDS;
 995
 996         intel_encoder->cloneable = 0;
 997         if (HAS_PCH_SPLIT(dev))
 998                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 999         else if (IS_GEN4(dev))
1000                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1001         else
1002                 intel_encoder->crtc_mask = (1 << 1);
1003
1004         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1005         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1006         connector->interlace_allowed = false;
1007         connector->doublescan_allowed = false;
1008
1009         lvds_encoder->reg = lvds_reg;
1010
1011         /* create the scaling mode property */
1012         drm_mode_create_scaling_mode_property(dev);
1013         drm_object_attach_property(&connector->base,
1014                                       dev->mode_config.scaling_mode_property,
1015                                       DRM_MODE_SCALE_ASPECT);
1016         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1017         /*
1018          * LVDS discovery:
1019          * 1) check for EDID on DDC
1020          * 2) check for VBT data
1021          * 3) check to see if LVDS is already on
1022          *    if none of the above, no panel
1023          * 4) make sure lid is open
1024          *    if closed, act like it's not there for now
1025          */
1026
1027         /*
1028          * Attempt to get the fixed panel mode from DDC.  Assume that the
1029          * preferred mode is the right one.
1030          */
1031         mutex_lock(&dev->mode_config.mutex);
1032         if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC)
1033                 edid = drm_get_edid_switcheroo(connector,
1034                                     intel_gmbus_get_adapter(dev_priv, pin));
1035         else
1036                 edid = drm_get_edid(connector,
1037                                     intel_gmbus_get_adapter(dev_priv, pin));
1038         if (edid) {
1039                 if (drm_add_edid_modes(connector, edid)) {
1040                         drm_mode_connector_update_edid_property(connector,
1041                                                                 edid);
1042                 } else {
1043                         kfree(edid);
1044                         edid = ERR_PTR(-EINVAL);
1045                 }
1046         } else {
1047                 edid = ERR_PTR(-ENOENT);
1048         }
1049         lvds_connector->base.edid = edid;
1050
1051         if (IS_ERR_OR_NULL(edid)) {
1052                 /* Didn't get an EDID, so
1053                  * Set wide sync ranges so we get all modes
1054                  * handed to valid_mode for checking
1055                  */
1056                 connector->display_info.min_vfreq = 0;
1057                 connector->display_info.max_vfreq = 200;
1058                 connector->display_info.min_hfreq = 0;
1059                 connector->display_info.max_hfreq = 200;
1060         }
1061
1062         list_for_each_entry(scan, &connector->probed_modes, head) {
1063                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1064                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1065                         drm_mode_debug_printmodeline(scan);
1066
1067                         fixed_mode = drm_mode_duplicate(dev, scan);
1068                         if (fixed_mode)
1069                                 goto out;
1070                 }
1071         }
1072
1073         /* Failed to get EDID, what about VBT? */
1074         if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1075                 DRM_DEBUG_KMS("using mode from VBT: ");
1076                 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1077
1078                 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1079                 if (fixed_mode) {
1080                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1081                         goto out;
1082                 }
1083         }
1084
1085         /*
1086          * If we didn't get EDID, try checking if the panel is already turned
1087          * on.  If so, assume that whatever is currently programmed is the
1088          * correct mode.
1089          */
1090
1091         /* Ironlake: FIXME if still fail, not try pipe mode now */
1092         if (HAS_PCH_SPLIT(dev))
1093                 goto failed;
1094
1095         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1096         crtc = intel_get_crtc_for_pipe(dev, pipe);
1097
1098         if (crtc && (lvds & LVDS_PORT_EN)) {
1099                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1100                 if (fixed_mode) {
1101                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1102                         drm_mode_debug_printmodeline(fixed_mode);
1103                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1104                         goto out;
1105                 }
1106         }
1107
1108         /* If we still don't have a mode after all that, give up. */
1109         if (!fixed_mode)
1110                 goto failed;
1111
1112 out:
1113         mutex_unlock(&dev->mode_config.mutex);
1114
1115         intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1116
1117         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1118         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1119                       lvds_encoder->is_dual_link ? "dual" : "single");
1120
1121         lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK;
1122
1123         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1124         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1125                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1126                 lvds_connector->lid_notifier.notifier_call = NULL;
1127         }
1128         drm_connector_register(connector);
1129
1130         intel_panel_setup_backlight(connector, INVALID_PIPE);
1131
1132         return;
1133
1134 failed:
1135         mutex_unlock(&dev->mode_config.mutex);
1136
1137         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1138         drm_connector_cleanup(connector);
1139         drm_encoder_cleanup(encoder);
1140         kfree(lvds_encoder);
1141         kfree(lvds_connector);
1142         return;
1143 }