drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_connector {
44 struct intel_connector base;
45
46 struct notifier_block lid_notifier;
47 };
48
49 struct intel_lvds_encoder {
50 struct intel_encoder base;
51
52 bool is_dual_link;
53 u32 reg;
54
55 struct intel_lvds_connector *attached_connector;
56 };
57
58 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
59 {
60 return container_of(encoder, struct intel_lvds_encoder, base.base);
61 }
62
63 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
64 {
65 return container_of(connector, struct intel_lvds_connector, base.base);
66 }
67
68 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
69 enum pipe *pipe)
70 {
71 struct drm_device *dev = encoder->base.dev;
72 struct drm_i915_private *dev_priv = dev->dev_private;
73 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
74 u32 tmp;
75
76 tmp = I915_READ(lvds_encoder->reg);
77
78 if (!(tmp & LVDS_PORT_EN))
79 return false;
80
81 if (HAS_PCH_CPT(dev))
82 *pipe = PORT_TO_PIPE_CPT(tmp);
83 else
84 *pipe = PORT_TO_PIPE(tmp);
85
86 return true;
87 }
88
89 static void intel_lvds_get_config(struct intel_encoder *encoder,
90 struct intel_crtc_config *pipe_config)
91 {
92 struct drm_device *dev = encoder->base.dev;
93 struct drm_i915_private *dev_priv = dev->dev_private;
94 u32 lvds_reg, tmp, flags = 0;
95
96 if (HAS_PCH_SPLIT(dev))
97 lvds_reg = PCH_LVDS;
98 else
99 lvds_reg = LVDS;
100
101 tmp = I915_READ(lvds_reg);
102 if (tmp & LVDS_HSYNC_POLARITY)
103 flags |= DRM_MODE_FLAG_NHSYNC;
104 else
105 flags |= DRM_MODE_FLAG_PHSYNC;
106 if (tmp & LVDS_VSYNC_POLARITY)
107 flags |= DRM_MODE_FLAG_NVSYNC;
108 else
109 flags |= DRM_MODE_FLAG_PVSYNC;
110
111 pipe_config->adjusted_mode.flags |= flags;
112 }
113
114 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
115 * This is an exception to the general rule that mode_set doesn't turn
116 * things on.
117 */
118 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
119 {
120 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
121 struct drm_device *dev = encoder->base.dev;
122 struct drm_i915_private *dev_priv = dev->dev_private;
123 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
124 struct drm_display_mode *fixed_mode =
125 lvds_encoder->attached_connector->base.panel.fixed_mode;
126 int pipe = crtc->pipe;
127 u32 temp;
128
129 if (HAS_PCH_SPLIT(dev)) {
130 assert_fdi_rx_pll_disabled(dev_priv, pipe);
131 assert_shared_dpll_disabled(dev_priv,
132 intel_crtc_to_shared_dpll(crtc));
133 } else {
134 assert_pll_disabled(dev_priv, pipe);
135 }
136
137 temp = I915_READ(lvds_encoder->reg);
138 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
139
140 if (HAS_PCH_CPT(dev)) {
141 temp &= ~PORT_TRANS_SEL_MASK;
142 temp |= PORT_TRANS_SEL_CPT(pipe);
143 } else {
144 if (pipe == 1) {
145 temp |= LVDS_PIPEB_SELECT;
146 } else {
147 temp &= ~LVDS_PIPEB_SELECT;
148 }
149 }
150
151 /* set the corresponsding LVDS_BORDER bit */
152 temp &= ~LVDS_BORDER_ENABLE;
153 temp |= crtc->config.gmch_pfit.lvds_border_bits;
154 /* Set the B0-B3 data pairs corresponding to whether we're going to
155 * set the DPLLs for dual-channel mode or not.
156 */
157 if (lvds_encoder->is_dual_link)
158 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
159 else
160 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
161
162 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
163 * appropriately here, but we need to look more thoroughly into how
164 * panels behave in the two modes.
165 */
166
167 /* Set the dithering flag on LVDS as needed, note that there is no
168 * special lvds dither control bit on pch-split platforms, dithering is
169 * only controlled through the PIPECONF reg. */
170 if (INTEL_INFO(dev)->gen == 4) {
171 /* Bspec wording suggests that LVDS port dithering only exists
172 * for 18bpp panels. */
173 if (crtc->config.dither && crtc->config.pipe_bpp == 18)
174 temp |= LVDS_ENABLE_DITHER;
175 else
176 temp &= ~LVDS_ENABLE_DITHER;
177 }
178 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
179 if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
180 temp |= LVDS_HSYNC_POLARITY;
181 if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
182 temp |= LVDS_VSYNC_POLARITY;
183
184 I915_WRITE(lvds_encoder->reg, temp);
185 }
186
187 /**
188 * Sets the power state for the panel.
189 */
190 static void intel_enable_lvds(struct intel_encoder *encoder)
191 {
192 struct drm_device *dev = encoder->base.dev;
193 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
194 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
195 struct drm_i915_private *dev_priv = dev->dev_private;
196 u32 ctl_reg, stat_reg;
197
198 if (HAS_PCH_SPLIT(dev)) {
199 ctl_reg = PCH_PP_CONTROL;
200 stat_reg = PCH_PP_STATUS;
201 } else {
202 ctl_reg = PP_CONTROL;
203 stat_reg = PP_STATUS;
204 }
205
206 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
207
208 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
209 POSTING_READ(lvds_encoder->reg);
210 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
211 DRM_ERROR("timed out waiting for panel to power on\n");
212
213 intel_panel_enable_backlight(dev, intel_crtc->pipe);
214 }
215
216 static void intel_disable_lvds(struct intel_encoder *encoder)
217 {
218 struct drm_device *dev = encoder->base.dev;
219 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 ctl_reg, stat_reg;
222
223 if (HAS_PCH_SPLIT(dev)) {
224 ctl_reg = PCH_PP_CONTROL;
225 stat_reg = PCH_PP_STATUS;
226 } else {
227 ctl_reg = PP_CONTROL;
228 stat_reg = PP_STATUS;
229 }
230
231 intel_panel_disable_backlight(dev);
232
233 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
234 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
235 DRM_ERROR("timed out waiting for panel to power off\n");
236
237 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
238 POSTING_READ(lvds_encoder->reg);
239 }
240
241 static int intel_lvds_mode_valid(struct drm_connector *connector,
242 struct drm_display_mode *mode)
243 {
244 struct intel_connector *intel_connector = to_intel_connector(connector);
245 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
246
247 if (mode->hdisplay > fixed_mode->hdisplay)
248 return MODE_PANEL;
249 if (mode->vdisplay > fixed_mode->vdisplay)
250 return MODE_PANEL;
251
252 return MODE_OK;
253 }
254
255 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
256 struct intel_crtc_config *pipe_config)
257 {
258 struct drm_device *dev = intel_encoder->base.dev;
259 struct drm_i915_private *dev_priv = dev->dev_private;
260 struct intel_lvds_encoder *lvds_encoder =
261 to_lvds_encoder(&intel_encoder->base);
262 struct intel_connector *intel_connector =
263 &lvds_encoder->attached_connector->base;
264 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
265 struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
266 unsigned int lvds_bpp;
267
268 /* Should never happen!! */
269 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
270 DRM_ERROR("Can't support LVDS on pipe A\n");
271 return false;
272 }
273
274 if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
275 LVDS_A3_POWER_UP)
276 lvds_bpp = 8*3;
277 else
278 lvds_bpp = 6*3;
279
280 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
281 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
282 pipe_config->pipe_bpp, lvds_bpp);
283 pipe_config->pipe_bpp = lvds_bpp;
284 }
285
286 /*
287 * We have timings from the BIOS for the panel, put them in
288 * to the adjusted mode. The CRTC will be set up for this mode,
289 * with the panel scaling set up to source from the H/VDisplay
290 * of the original mode.
291 */
292 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
293 adjusted_mode);
294
295 if (HAS_PCH_SPLIT(dev)) {
296 pipe_config->has_pch_encoder = true;
297
298 intel_pch_panel_fitting(intel_crtc, pipe_config,
299 intel_connector->panel.fitting_mode);
300 return true;
301 } else {
302 intel_gmch_panel_fitting(intel_crtc, pipe_config,
303 intel_connector->panel.fitting_mode);
304 }
305
306 drm_mode_set_crtcinfo(adjusted_mode, 0);
307 pipe_config->timings_set = true;
308
309 /*
310 * XXX: It would be nice to support lower refresh rates on the
311 * panels to reduce power consumption, and perhaps match the
312 * user's requested refresh rate.
313 */
314
315 return true;
316 }
317
318 static void intel_lvds_mode_set(struct drm_encoder *encoder,
319 struct drm_display_mode *mode,
320 struct drm_display_mode *adjusted_mode)
321 {
322 /*
323 * The LVDS pin pair will already have been turned on in the
324 * intel_crtc_mode_set since it has a large impact on the DPLL
325 * settings.
326 */
327 }
328
329 /**
330 * Detect the LVDS connection.
331 *
332 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
333 * connected and closed means disconnected. We also send hotplug events as
334 * needed, using lid status notification from the input layer.
335 */
336 static enum drm_connector_status
337 intel_lvds_detect(struct drm_connector *connector, bool force)
338 {
339 struct drm_device *dev = connector->dev;
340 enum drm_connector_status status;
341
342 status = intel_panel_detect(dev);
343 if (status != connector_status_unknown)
344 return status;
345
346 return connector_status_connected;
347 }
348
349 /**
350 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
351 */
352 static int intel_lvds_get_modes(struct drm_connector *connector)
353 {
354 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
355 struct drm_device *dev = connector->dev;
356 struct drm_display_mode *mode;
357
358 /* use cached edid if we have one */
359 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
360 return drm_add_edid_modes(connector, lvds_connector->base.edid);
361
362 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
363 if (mode == NULL)
364 return 0;
365
366 drm_mode_probed_add(connector, mode);
367 return 1;
368 }
369
370 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
371 {
372 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
373 return 1;
374 }
375
376 /* The GPU hangs up on these systems if modeset is performed on LID open */
377 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
378 {
379 .callback = intel_no_modeset_on_lid_dmi_callback,
380 .ident = "Toshiba Tecra A11",
381 .matches = {
382 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
383 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
384 },
385 },
386
387 { } /* terminating entry */
388 };
389
390 /*
391 * Lid events. Note the use of 'modeset':
392 * - we set it to MODESET_ON_LID_OPEN on lid close,
393 * and set it to MODESET_DONE on open
394 * - we use it as a "only once" bit (ie we ignore
395 * duplicate events where it was already properly set)
396 * - the suspend/resume paths will set it to
397 * MODESET_SUSPENDED and ignore the lid open event,
398 * because they restore the mode ("lid open").
399 */
400 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
401 void *unused)
402 {
403 struct intel_lvds_connector *lvds_connector =
404 container_of(nb, struct intel_lvds_connector, lid_notifier);
405 struct drm_connector *connector = &lvds_connector->base.base;
406 struct drm_device *dev = connector->dev;
407 struct drm_i915_private *dev_priv = dev->dev_private;
408
409 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
410 return NOTIFY_OK;
411
412 mutex_lock(&dev_priv->modeset_restore_lock);
413 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
414 goto exit;
415 /*
416 * check and update the status of LVDS connector after receiving
417 * the LID nofication event.
418 */
419 connector->status = connector->funcs->detect(connector, false);
420
421 /* Don't force modeset on machines where it causes a GPU lockup */
422 if (dmi_check_system(intel_no_modeset_on_lid))
423 goto exit;
424 if (!acpi_lid_open()) {
425 /* do modeset on next lid open event */
426 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
427 goto exit;
428 }
429
430 if (dev_priv->modeset_restore == MODESET_DONE)
431 goto exit;
432
433 drm_modeset_lock_all(dev);
434 intel_modeset_setup_hw_state(dev, true);
435 drm_modeset_unlock_all(dev);
436
437 dev_priv->modeset_restore = MODESET_DONE;
438
439 exit:
440 mutex_unlock(&dev_priv->modeset_restore_lock);
441 return NOTIFY_OK;
442 }
443
444 /**
445 * intel_lvds_destroy - unregister and free LVDS structures
446 * @connector: connector to free
447 *
448 * Unregister the DDC bus for this connector then free the driver private
449 * structure.
450 */
451 static void intel_lvds_destroy(struct drm_connector *connector)
452 {
453 struct intel_lvds_connector *lvds_connector =
454 to_lvds_connector(connector);
455
456 if (lvds_connector->lid_notifier.notifier_call)
457 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
458
459 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
460 kfree(lvds_connector->base.edid);
461
462 intel_panel_fini(&lvds_connector->base.panel);
463
464 drm_sysfs_connector_remove(connector);
465 drm_connector_cleanup(connector);
466 kfree(connector);
467 }
468
469 static int intel_lvds_set_property(struct drm_connector *connector,
470 struct drm_property *property,
471 uint64_t value)
472 {
473 struct intel_connector *intel_connector = to_intel_connector(connector);
474 struct drm_device *dev = connector->dev;
475
476 if (property == dev->mode_config.scaling_mode_property) {
477 struct drm_crtc *crtc;
478
479 if (value == DRM_MODE_SCALE_NONE) {
480 DRM_DEBUG_KMS("no scaling not supported\n");
481 return -EINVAL;
482 }
483
484 if (intel_connector->panel.fitting_mode == value) {
485 /* the LVDS scaling property is not changed */
486 return 0;
487 }
488 intel_connector->panel.fitting_mode = value;
489
490 crtc = intel_attached_encoder(connector)->base.crtc;
491 if (crtc && crtc->enabled) {
492 /*
493 * If the CRTC is enabled, the display will be changed
494 * according to the new panel fitting mode.
495 */
496 intel_crtc_restore_mode(crtc);
497 }
498 }
499
500 return 0;
501 }
502
503 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
504 .mode_set = intel_lvds_mode_set,
505 };
506
507 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
508 .get_modes = intel_lvds_get_modes,
509 .mode_valid = intel_lvds_mode_valid,
510 .best_encoder = intel_best_encoder,
511 };
512
513 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
514 .dpms = intel_connector_dpms,
515 .detect = intel_lvds_detect,
516 .fill_modes = drm_helper_probe_single_connector_modes,
517 .set_property = intel_lvds_set_property,
518 .destroy = intel_lvds_destroy,
519 };
520
521 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
522 .destroy = intel_encoder_destroy,
523 };
524
525 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
526 {
527 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
528 return 1;
529 }
530
531 /* These systems claim to have LVDS, but really don't */
532 static const struct dmi_system_id intel_no_lvds[] = {
533 {
534 .callback = intel_no_lvds_dmi_callback,
535 .ident = "Apple Mac Mini (Core series)",
536 .matches = {
537 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
538 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
539 },
540 },
541 {
542 .callback = intel_no_lvds_dmi_callback,
543 .ident = "Apple Mac Mini (Core 2 series)",
544 .matches = {
545 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
546 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
547 },
548 },
549 {
550 .callback = intel_no_lvds_dmi_callback,
551 .ident = "MSI IM-945GSE-A",
552 .matches = {
553 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
554 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
555 },
556 },
557 {
558 .callback = intel_no_lvds_dmi_callback,
559 .ident = "Dell Studio Hybrid",
560 .matches = {
561 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
562 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
563 },
564 },
565 {
566 .callback = intel_no_lvds_dmi_callback,
567 .ident = "Dell OptiPlex FX170",
568 .matches = {
569 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
570 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
571 },
572 },
573 {
574 .callback = intel_no_lvds_dmi_callback,
575 .ident = "AOpen Mini PC",
576 .matches = {
577 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
578 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
579 },
580 },
581 {
582 .callback = intel_no_lvds_dmi_callback,
583 .ident = "AOpen Mini PC MP915",
584 .matches = {
585 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
586 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
587 },
588 },
589 {
590 .callback = intel_no_lvds_dmi_callback,
591 .ident = "AOpen i915GMm-HFS",
592 .matches = {
593 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
594 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
595 },
596 },
597 {
598 .callback = intel_no_lvds_dmi_callback,
599 .ident = "AOpen i45GMx-I",
600 .matches = {
601 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
602 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
603 },
604 },
605 {
606 .callback = intel_no_lvds_dmi_callback,
607 .ident = "Aopen i945GTt-VFA",
608 .matches = {
609 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
610 },
611 },
612 {
613 .callback = intel_no_lvds_dmi_callback,
614 .ident = "Clientron U800",
615 .matches = {
616 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
617 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
618 },
619 },
620 {
621 .callback = intel_no_lvds_dmi_callback,
622 .ident = "Clientron E830",
623 .matches = {
624 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
625 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
626 },
627 },
628 {
629 .callback = intel_no_lvds_dmi_callback,
630 .ident = "Asus EeeBox PC EB1007",
631 .matches = {
632 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
633 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
634 },
635 },
636 {
637 .callback = intel_no_lvds_dmi_callback,
638 .ident = "Asus AT5NM10T-I",
639 .matches = {
640 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
641 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
642 },
643 },
644 {
645 .callback = intel_no_lvds_dmi_callback,
646 .ident = "Hewlett-Packard HP t5740",
647 .matches = {
648 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
649 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
650 },
651 },
652 {
653 .callback = intel_no_lvds_dmi_callback,
654 .ident = "Hewlett-Packard t5745",
655 .matches = {
656 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
657 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
658 },
659 },
660 {
661 .callback = intel_no_lvds_dmi_callback,
662 .ident = "Hewlett-Packard st5747",
663 .matches = {
664 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
665 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
666 },
667 },
668 {
669 .callback = intel_no_lvds_dmi_callback,
670 .ident = "MSI Wind Box DC500",
671 .matches = {
672 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
673 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
674 },
675 },
676 {
677 .callback = intel_no_lvds_dmi_callback,
678 .ident = "Gigabyte GA-D525TUD",
679 .matches = {
680 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
681 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
682 },
683 },
684 {
685 .callback = intel_no_lvds_dmi_callback,
686 .ident = "Supermicro X7SPA-H",
687 .matches = {
688 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
689 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
690 },
691 },
692 {
693 .callback = intel_no_lvds_dmi_callback,
694 .ident = "Fujitsu Esprimo Q900",
695 .matches = {
696 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
697 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
698 },
699 },
700
701 { } /* terminating entry */
702 };
703
704 /**
705 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
706 * @dev: drm device
707 * @connector: LVDS connector
708 *
709 * Find the reduced downclock for LVDS in EDID.
710 */
711 static void intel_find_lvds_downclock(struct drm_device *dev,
712 struct drm_display_mode *fixed_mode,
713 struct drm_connector *connector)
714 {
715 struct drm_i915_private *dev_priv = dev->dev_private;
716 struct drm_display_mode *scan;
717 int temp_downclock;
718
719 temp_downclock = fixed_mode->clock;
720 list_for_each_entry(scan, &connector->probed_modes, head) {
721 /*
722 * If one mode has the same resolution with the fixed_panel
723 * mode while they have the different refresh rate, it means
724 * that the reduced downclock is found for the LVDS. In such
725 * case we can set the different FPx0/1 to dynamically select
726 * between low and high frequency.
727 */
728 if (scan->hdisplay == fixed_mode->hdisplay &&
729 scan->hsync_start == fixed_mode->hsync_start &&
730 scan->hsync_end == fixed_mode->hsync_end &&
731 scan->htotal == fixed_mode->htotal &&
732 scan->vdisplay == fixed_mode->vdisplay &&
733 scan->vsync_start == fixed_mode->vsync_start &&
734 scan->vsync_end == fixed_mode->vsync_end &&
735 scan->vtotal == fixed_mode->vtotal) {
736 if (scan->clock < temp_downclock) {
737 /*
738 * The downclock is already found. But we
739 * expect to find the lower downclock.
740 */
741 temp_downclock = scan->clock;
742 }
743 }
744 }
745 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
746 /* We found the downclock for LVDS. */
747 dev_priv->lvds_downclock_avail = 1;
748 dev_priv->lvds_downclock = temp_downclock;
749 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
750 "Normal clock %dKhz, downclock %dKhz\n",
751 fixed_mode->clock, temp_downclock);
752 }
753 }
754
755 /*
756 * Enumerate the child dev array parsed from VBT to check whether
757 * the LVDS is present.
758 * If it is present, return 1.
759 * If it is not present, return false.
760 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
761 */
762 static bool lvds_is_present_in_vbt(struct drm_device *dev,
763 u8 *i2c_pin)
764 {
765 struct drm_i915_private *dev_priv = dev->dev_private;
766 int i;
767
768 if (!dev_priv->vbt.child_dev_num)
769 return true;
770
771 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
772 struct child_device_config *child = dev_priv->vbt.child_dev + i;
773
774 /* If the device type is not LFP, continue.
775 * We have to check both the new identifiers as well as the
776 * old for compatibility with some BIOSes.
777 */
778 if (child->device_type != DEVICE_TYPE_INT_LFP &&
779 child->device_type != DEVICE_TYPE_LFP)
780 continue;
781
782 if (intel_gmbus_is_port_valid(child->i2c_pin))
783 *i2c_pin = child->i2c_pin;
784
785 /* However, we cannot trust the BIOS writers to populate
786 * the VBT correctly. Since LVDS requires additional
787 * information from AIM blocks, a non-zero addin offset is
788 * a good indicator that the LVDS is actually present.
789 */
790 if (child->addin_offset)
791 return true;
792
793 /* But even then some BIOS writers perform some black magic
794 * and instantiate the device without reference to any
795 * additional data. Trust that if the VBT was written into
796 * the OpRegion then they have validated the LVDS's existence.
797 */
798 if (dev_priv->opregion.vbt)
799 return true;
800 }
801
802 return false;
803 }
804
805 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
806 {
807 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
808 return 1;
809 }
810
811 static const struct dmi_system_id intel_dual_link_lvds[] = {
812 {
813 .callback = intel_dual_link_lvds_callback,
814 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
815 .matches = {
816 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
817 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
818 },
819 },
820 { } /* terminating entry */
821 };
822
823 bool intel_is_dual_link_lvds(struct drm_device *dev)
824 {
825 struct intel_encoder *encoder;
826 struct intel_lvds_encoder *lvds_encoder;
827
828 list_for_each_entry(encoder, &dev->mode_config.encoder_list,
829 base.head) {
830 if (encoder->type == INTEL_OUTPUT_LVDS) {
831 lvds_encoder = to_lvds_encoder(&encoder->base);
832
833 return lvds_encoder->is_dual_link;
834 }
835 }
836
837 return false;
838 }
839
840 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
841 {
842 struct drm_device *dev = lvds_encoder->base.base.dev;
843 unsigned int val;
844 struct drm_i915_private *dev_priv = dev->dev_private;
845
846 /* use the module option value if specified */
847 if (i915_lvds_channel_mode > 0)
848 return i915_lvds_channel_mode == 2;
849
850 if (dmi_check_system(intel_dual_link_lvds))
851 return true;
852
853 /* BIOS should set the proper LVDS register value at boot, but
854 * in reality, it doesn't set the value when the lid is closed;
855 * we need to check "the value to be set" in VBT when LVDS
856 * register is uninitialized.
857 */
858 val = I915_READ(lvds_encoder->reg);
859 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
860 val = dev_priv->vbt.bios_lvds_val;
861
862 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
863 }
864
865 static bool intel_lvds_supported(struct drm_device *dev)
866 {
867 /* With the introduction of the PCH we gained a dedicated
868 * LVDS presence pin, use it. */
869 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
870 return true;
871
872 /* Otherwise LVDS was only attached to mobile products,
873 * except for the inglorious 830gm */
874 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
875 return true;
876
877 return false;
878 }
879
880 /**
881 * intel_lvds_init - setup LVDS connectors on this device
882 * @dev: drm device
883 *
884 * Create the connector, register the LVDS DDC bus, and try to figure out what
885 * modes we can display on the LVDS panel (if present).
886 */
887 void intel_lvds_init(struct drm_device *dev)
888 {
889 struct drm_i915_private *dev_priv = dev->dev_private;
890 struct intel_lvds_encoder *lvds_encoder;
891 struct intel_encoder *intel_encoder;
892 struct intel_lvds_connector *lvds_connector;
893 struct intel_connector *intel_connector;
894 struct drm_connector *connector;
895 struct drm_encoder *encoder;
896 struct drm_display_mode *scan; /* *modes, *bios_mode; */
897 struct drm_display_mode *fixed_mode = NULL;
898 struct edid *edid;
899 struct drm_crtc *crtc;
900 u32 lvds;
901 int pipe;
902 u8 pin;
903
904 if (!intel_lvds_supported(dev))
905 return;
906
907 /* Skip init on machines we know falsely report LVDS */
908 if (dmi_check_system(intel_no_lvds))
909 return;
910
911 pin = GMBUS_PORT_PANEL;
912 if (!lvds_is_present_in_vbt(dev, &pin)) {
913 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
914 return;
915 }
916
917 if (HAS_PCH_SPLIT(dev)) {
918 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
919 return;
920 if (dev_priv->vbt.edp_support) {
921 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
922 return;
923 }
924 }
925
926 lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
927 if (!lvds_encoder)
928 return;
929
930 lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
931 if (!lvds_connector) {
932 kfree(lvds_encoder);
933 return;
934 }
935
936 lvds_encoder->attached_connector = lvds_connector;
937
938 intel_encoder = &lvds_encoder->base;
939 encoder = &intel_encoder->base;
940 intel_connector = &lvds_connector->base;
941 connector = &intel_connector->base;
942 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
943 DRM_MODE_CONNECTOR_LVDS);
944
945 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
946 DRM_MODE_ENCODER_LVDS);
947
948 intel_encoder->enable = intel_enable_lvds;
949 intel_encoder->pre_enable = intel_pre_enable_lvds;
950 intel_encoder->compute_config = intel_lvds_compute_config;
951 intel_encoder->disable = intel_disable_lvds;
952 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
953 intel_encoder->get_config = intel_lvds_get_config;
954 intel_connector->get_hw_state = intel_connector_get_hw_state;
955
956 intel_connector_attach_encoder(intel_connector, intel_encoder);
957 intel_encoder->type = INTEL_OUTPUT_LVDS;
958
959 intel_encoder->cloneable = false;
960 if (HAS_PCH_SPLIT(dev))
961 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
962 else if (IS_GEN4(dev))
963 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
964 else
965 intel_encoder->crtc_mask = (1 << 1);
966
967 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
968 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
969 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
970 connector->interlace_allowed = false;
971 connector->doublescan_allowed = false;
972
973 if (HAS_PCH_SPLIT(dev)) {
974 lvds_encoder->reg = PCH_LVDS;
975 } else {
976 lvds_encoder->reg = LVDS;
977 }
978
979 /* create the scaling mode property */
980 drm_mode_create_scaling_mode_property(dev);
981 drm_object_attach_property(&connector->base,
982 dev->mode_config.scaling_mode_property,
983 DRM_MODE_SCALE_ASPECT);
984 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
985 /*
986 * LVDS discovery:
987 * 1) check for EDID on DDC
988 * 2) check for VBT data
989 * 3) check to see if LVDS is already on
990 * if none of the above, no panel
991 * 4) make sure lid is open
992 * if closed, act like it's not there for now
993 */
994
995 /*
996 * Attempt to get the fixed panel mode from DDC. Assume that the
997 * preferred mode is the right one.
998 */
999 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1000 if (edid) {
1001 if (drm_add_edid_modes(connector, edid)) {
1002 drm_mode_connector_update_edid_property(connector,
1003 edid);
1004 } else {
1005 kfree(edid);
1006 edid = ERR_PTR(-EINVAL);
1007 }
1008 } else {
1009 edid = ERR_PTR(-ENOENT);
1010 }
1011 lvds_connector->base.edid = edid;
1012
1013 if (IS_ERR_OR_NULL(edid)) {
1014 /* Didn't get an EDID, so
1015 * Set wide sync ranges so we get all modes
1016 * handed to valid_mode for checking
1017 */
1018 connector->display_info.min_vfreq = 0;
1019 connector->display_info.max_vfreq = 200;
1020 connector->display_info.min_hfreq = 0;
1021 connector->display_info.max_hfreq = 200;
1022 }
1023
1024 list_for_each_entry(scan, &connector->probed_modes, head) {
1025 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1026 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1027 drm_mode_debug_printmodeline(scan);
1028
1029 fixed_mode = drm_mode_duplicate(dev, scan);
1030 if (fixed_mode) {
1031 intel_find_lvds_downclock(dev, fixed_mode,
1032 connector);
1033 goto out;
1034 }
1035 }
1036 }
1037
1038 /* Failed to get EDID, what about VBT? */
1039 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1040 DRM_DEBUG_KMS("using mode from VBT: ");
1041 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1042
1043 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1044 if (fixed_mode) {
1045 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1046 goto out;
1047 }
1048 }
1049
1050 /*
1051 * If we didn't get EDID, try checking if the panel is already turned
1052 * on. If so, assume that whatever is currently programmed is the
1053 * correct mode.
1054 */
1055
1056 /* Ironlake: FIXME if still fail, not try pipe mode now */
1057 if (HAS_PCH_SPLIT(dev))
1058 goto failed;
1059
1060 lvds = I915_READ(LVDS);
1061 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1062 crtc = intel_get_crtc_for_pipe(dev, pipe);
1063
1064 if (crtc && (lvds & LVDS_PORT_EN)) {
1065 fixed_mode = intel_crtc_mode_get(dev, crtc);
1066 if (fixed_mode) {
1067 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1068 drm_mode_debug_printmodeline(fixed_mode);
1069 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1070 goto out;
1071 }
1072 }
1073
1074 /* If we still don't have a mode after all that, give up. */
1075 if (!fixed_mode)
1076 goto failed;
1077
1078 out:
1079 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1080 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1081 lvds_encoder->is_dual_link ? "dual" : "single");
1082
1083 /*
1084 * Unlock registers and just
1085 * leave them unlocked
1086 */
1087 if (HAS_PCH_SPLIT(dev)) {
1088 I915_WRITE(PCH_PP_CONTROL,
1089 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1090 } else {
1091 I915_WRITE(PP_CONTROL,
1092 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1093 }
1094 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1095 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1096 DRM_DEBUG_KMS("lid notifier registration failed\n");
1097 lvds_connector->lid_notifier.notifier_call = NULL;
1098 }
1099 drm_sysfs_connector_add(connector);
1100
1101 intel_panel_init(&intel_connector->panel, fixed_mode);
1102 intel_panel_setup_backlight(connector);
1103
1104 return;
1105
1106 failed:
1107 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1108 drm_connector_cleanup(connector);
1109 drm_encoder_cleanup(encoder);
1110 if (fixed_mode)
1111 drm_mode_destroy(dev, fixed_mode);
1112 kfree(lvds_encoder);
1113 kfree(lvds_connector);
1114 return;
1115 }
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