Merge tag 'v3.7-rc2' into drm-intel-next-queued
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_lvds.c
1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds {
44 struct intel_encoder base;
45
46 struct edid *edid;
47
48 int fitting_mode;
49 u32 pfit_control;
50 u32 pfit_pgm_ratios;
51 bool pfit_dirty;
52
53 struct drm_display_mode *fixed_mode;
54 };
55
56 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
57 {
58 return container_of(encoder, struct intel_lvds, base.base);
59 }
60
61 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
62 {
63 return container_of(intel_attached_encoder(connector),
64 struct intel_lvds, base);
65 }
66
67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
68 enum pipe *pipe)
69 {
70 struct drm_device *dev = encoder->base.dev;
71 struct drm_i915_private *dev_priv = dev->dev_private;
72 u32 lvds_reg, tmp;
73
74 if (HAS_PCH_SPLIT(dev)) {
75 lvds_reg = PCH_LVDS;
76 } else {
77 lvds_reg = LVDS;
78 }
79
80 tmp = I915_READ(lvds_reg);
81
82 if (!(tmp & LVDS_PORT_EN))
83 return false;
84
85 if (HAS_PCH_CPT(dev))
86 *pipe = PORT_TO_PIPE_CPT(tmp);
87 else
88 *pipe = PORT_TO_PIPE(tmp);
89
90 return true;
91 }
92
93 /**
94 * Sets the power state for the panel.
95 */
96 static void intel_enable_lvds(struct intel_encoder *encoder)
97 {
98 struct drm_device *dev = encoder->base.dev;
99 struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
100 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
101 struct drm_i915_private *dev_priv = dev->dev_private;
102 u32 ctl_reg, lvds_reg, stat_reg;
103
104 if (HAS_PCH_SPLIT(dev)) {
105 ctl_reg = PCH_PP_CONTROL;
106 lvds_reg = PCH_LVDS;
107 stat_reg = PCH_PP_STATUS;
108 } else {
109 ctl_reg = PP_CONTROL;
110 lvds_reg = LVDS;
111 stat_reg = PP_STATUS;
112 }
113
114 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
115
116 if (intel_lvds->pfit_dirty) {
117 /*
118 * Enable automatic panel scaling so that non-native modes
119 * fill the screen. The panel fitter should only be
120 * adjusted whilst the pipe is disabled, according to
121 * register description and PRM.
122 */
123 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
124 intel_lvds->pfit_control,
125 intel_lvds->pfit_pgm_ratios);
126
127 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
128 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
129 intel_lvds->pfit_dirty = false;
130 }
131
132 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
133 POSTING_READ(lvds_reg);
134 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
135 DRM_ERROR("timed out waiting for panel to power on\n");
136
137 intel_panel_enable_backlight(dev, intel_crtc->pipe);
138 }
139
140 static void intel_disable_lvds(struct intel_encoder *encoder)
141 {
142 struct drm_device *dev = encoder->base.dev;
143 struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
144 struct drm_i915_private *dev_priv = dev->dev_private;
145 u32 ctl_reg, lvds_reg, stat_reg;
146
147 if (HAS_PCH_SPLIT(dev)) {
148 ctl_reg = PCH_PP_CONTROL;
149 lvds_reg = PCH_LVDS;
150 stat_reg = PCH_PP_STATUS;
151 } else {
152 ctl_reg = PP_CONTROL;
153 lvds_reg = LVDS;
154 stat_reg = PP_STATUS;
155 }
156
157 intel_panel_disable_backlight(dev);
158
159 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
160 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
161 DRM_ERROR("timed out waiting for panel to power off\n");
162
163 if (intel_lvds->pfit_control) {
164 I915_WRITE(PFIT_CONTROL, 0);
165 intel_lvds->pfit_dirty = true;
166 }
167
168 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
169 POSTING_READ(lvds_reg);
170 }
171
172 static int intel_lvds_mode_valid(struct drm_connector *connector,
173 struct drm_display_mode *mode)
174 {
175 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
176 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
177
178 if (mode->hdisplay > fixed_mode->hdisplay)
179 return MODE_PANEL;
180 if (mode->vdisplay > fixed_mode->vdisplay)
181 return MODE_PANEL;
182
183 return MODE_OK;
184 }
185
186 static void
187 centre_horizontally(struct drm_display_mode *mode,
188 int width)
189 {
190 u32 border, sync_pos, blank_width, sync_width;
191
192 /* keep the hsync and hblank widths constant */
193 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
194 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
195 sync_pos = (blank_width - sync_width + 1) / 2;
196
197 border = (mode->hdisplay - width + 1) / 2;
198 border += border & 1; /* make the border even */
199
200 mode->crtc_hdisplay = width;
201 mode->crtc_hblank_start = width + border;
202 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
203
204 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
205 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
206
207 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
208 }
209
210 static void
211 centre_vertically(struct drm_display_mode *mode,
212 int height)
213 {
214 u32 border, sync_pos, blank_width, sync_width;
215
216 /* keep the vsync and vblank widths constant */
217 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
218 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
219 sync_pos = (blank_width - sync_width + 1) / 2;
220
221 border = (mode->vdisplay - height + 1) / 2;
222
223 mode->crtc_vdisplay = height;
224 mode->crtc_vblank_start = height + border;
225 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
226
227 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
228 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
229
230 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
231 }
232
233 static inline u32 panel_fitter_scaling(u32 source, u32 target)
234 {
235 /*
236 * Floating point operation is not supported. So the FACTOR
237 * is defined, which can avoid the floating point computation
238 * when calculating the panel ratio.
239 */
240 #define ACCURACY 12
241 #define FACTOR (1 << ACCURACY)
242 u32 ratio = source * FACTOR / target;
243 return (FACTOR * ratio + FACTOR/2) / FACTOR;
244 }
245
246 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
247 const struct drm_display_mode *mode,
248 struct drm_display_mode *adjusted_mode)
249 {
250 struct drm_device *dev = encoder->dev;
251 struct drm_i915_private *dev_priv = dev->dev_private;
252 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
253 struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc;
254 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
255 int pipe;
256
257 /* Should never happen!! */
258 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
259 DRM_ERROR("Can't support LVDS on pipe A\n");
260 return false;
261 }
262
263 if (intel_encoder_check_is_cloned(&intel_lvds->base))
264 return false;
265
266 /*
267 * We have timings from the BIOS for the panel, put them in
268 * to the adjusted mode. The CRTC will be set up for this mode,
269 * with the panel scaling set up to source from the H/VDisplay
270 * of the original mode.
271 */
272 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
273
274 if (HAS_PCH_SPLIT(dev)) {
275 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
276 mode, adjusted_mode);
277 return true;
278 }
279
280 /* Native modes don't need fitting */
281 if (adjusted_mode->hdisplay == mode->hdisplay &&
282 adjusted_mode->vdisplay == mode->vdisplay)
283 goto out;
284
285 /* 965+ wants fuzzy fitting */
286 if (INTEL_INFO(dev)->gen >= 4)
287 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
288 PFIT_FILTER_FUZZY);
289
290 /*
291 * Enable automatic panel scaling for non-native modes so that they fill
292 * the screen. Should be enabled before the pipe is enabled, according
293 * to register description and PRM.
294 * Change the value here to see the borders for debugging
295 */
296 for_each_pipe(pipe)
297 I915_WRITE(BCLRPAT(pipe), 0);
298
299 drm_mode_set_crtcinfo(adjusted_mode, 0);
300
301 switch (intel_lvds->fitting_mode) {
302 case DRM_MODE_SCALE_CENTER:
303 /*
304 * For centered modes, we have to calculate border widths &
305 * heights and modify the values programmed into the CRTC.
306 */
307 centre_horizontally(adjusted_mode, mode->hdisplay);
308 centre_vertically(adjusted_mode, mode->vdisplay);
309 border = LVDS_BORDER_ENABLE;
310 break;
311
312 case DRM_MODE_SCALE_ASPECT:
313 /* Scale but preserve the aspect ratio */
314 if (INTEL_INFO(dev)->gen >= 4) {
315 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
316 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
317
318 /* 965+ is easy, it does everything in hw */
319 if (scaled_width > scaled_height)
320 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
321 else if (scaled_width < scaled_height)
322 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
323 else if (adjusted_mode->hdisplay != mode->hdisplay)
324 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
325 } else {
326 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
327 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
328 /*
329 * For earlier chips we have to calculate the scaling
330 * ratio by hand and program it into the
331 * PFIT_PGM_RATIO register
332 */
333 if (scaled_width > scaled_height) { /* pillar */
334 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
335
336 border = LVDS_BORDER_ENABLE;
337 if (mode->vdisplay != adjusted_mode->vdisplay) {
338 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
339 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
340 bits << PFIT_VERT_SCALE_SHIFT);
341 pfit_control |= (PFIT_ENABLE |
342 VERT_INTERP_BILINEAR |
343 HORIZ_INTERP_BILINEAR);
344 }
345 } else if (scaled_width < scaled_height) { /* letter */
346 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
347
348 border = LVDS_BORDER_ENABLE;
349 if (mode->hdisplay != adjusted_mode->hdisplay) {
350 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
351 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
352 bits << PFIT_VERT_SCALE_SHIFT);
353 pfit_control |= (PFIT_ENABLE |
354 VERT_INTERP_BILINEAR |
355 HORIZ_INTERP_BILINEAR);
356 }
357 } else
358 /* Aspects match, Let hw scale both directions */
359 pfit_control |= (PFIT_ENABLE |
360 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
361 VERT_INTERP_BILINEAR |
362 HORIZ_INTERP_BILINEAR);
363 }
364 break;
365
366 case DRM_MODE_SCALE_FULLSCREEN:
367 /*
368 * Full scaling, even if it changes the aspect ratio.
369 * Fortunately this is all done for us in hw.
370 */
371 if (mode->vdisplay != adjusted_mode->vdisplay ||
372 mode->hdisplay != adjusted_mode->hdisplay) {
373 pfit_control |= PFIT_ENABLE;
374 if (INTEL_INFO(dev)->gen >= 4)
375 pfit_control |= PFIT_SCALING_AUTO;
376 else
377 pfit_control |= (VERT_AUTO_SCALE |
378 VERT_INTERP_BILINEAR |
379 HORIZ_AUTO_SCALE |
380 HORIZ_INTERP_BILINEAR);
381 }
382 break;
383
384 default:
385 break;
386 }
387
388 out:
389 /* If not enabling scaling, be consistent and always use 0. */
390 if ((pfit_control & PFIT_ENABLE) == 0) {
391 pfit_control = 0;
392 pfit_pgm_ratios = 0;
393 }
394
395 /* Make sure pre-965 set dither correctly */
396 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
397 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
398
399 if (pfit_control != intel_lvds->pfit_control ||
400 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
401 intel_lvds->pfit_control = pfit_control;
402 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
403 intel_lvds->pfit_dirty = true;
404 }
405 dev_priv->lvds_border_bits = border;
406
407 /*
408 * XXX: It would be nice to support lower refresh rates on the
409 * panels to reduce power consumption, and perhaps match the
410 * user's requested refresh rate.
411 */
412
413 return true;
414 }
415
416 static void intel_lvds_mode_set(struct drm_encoder *encoder,
417 struct drm_display_mode *mode,
418 struct drm_display_mode *adjusted_mode)
419 {
420 /*
421 * The LVDS pin pair will already have been turned on in the
422 * intel_crtc_mode_set since it has a large impact on the DPLL
423 * settings.
424 */
425 }
426
427 /**
428 * Detect the LVDS connection.
429 *
430 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
431 * connected and closed means disconnected. We also send hotplug events as
432 * needed, using lid status notification from the input layer.
433 */
434 static enum drm_connector_status
435 intel_lvds_detect(struct drm_connector *connector, bool force)
436 {
437 struct drm_device *dev = connector->dev;
438 enum drm_connector_status status;
439
440 status = intel_panel_detect(dev);
441 if (status != connector_status_unknown)
442 return status;
443
444 return connector_status_connected;
445 }
446
447 /**
448 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
449 */
450 static int intel_lvds_get_modes(struct drm_connector *connector)
451 {
452 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
453 struct drm_device *dev = connector->dev;
454 struct drm_display_mode *mode;
455
456 if (intel_lvds->edid)
457 return drm_add_edid_modes(connector, intel_lvds->edid);
458
459 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
460 if (mode == NULL)
461 return 0;
462
463 drm_mode_probed_add(connector, mode);
464 return 1;
465 }
466
467 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
468 {
469 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
470 return 1;
471 }
472
473 /* The GPU hangs up on these systems if modeset is performed on LID open */
474 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
475 {
476 .callback = intel_no_modeset_on_lid_dmi_callback,
477 .ident = "Toshiba Tecra A11",
478 .matches = {
479 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
480 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
481 },
482 },
483
484 { } /* terminating entry */
485 };
486
487 /*
488 * Lid events. Note the use of 'modeset_on_lid':
489 * - we set it on lid close, and reset it on open
490 * - we use it as a "only once" bit (ie we ignore
491 * duplicate events where it was already properly
492 * set/reset)
493 * - the suspend/resume paths will also set it to
494 * zero, since they restore the mode ("lid open").
495 */
496 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
497 void *unused)
498 {
499 struct drm_i915_private *dev_priv =
500 container_of(nb, struct drm_i915_private, lid_notifier);
501 struct drm_device *dev = dev_priv->dev;
502 struct drm_connector *connector = dev_priv->int_lvds_connector;
503
504 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
505 return NOTIFY_OK;
506
507 /*
508 * check and update the status of LVDS connector after receiving
509 * the LID nofication event.
510 */
511 if (connector)
512 connector->status = connector->funcs->detect(connector,
513 false);
514
515 /* Don't force modeset on machines where it causes a GPU lockup */
516 if (dmi_check_system(intel_no_modeset_on_lid))
517 return NOTIFY_OK;
518 if (!acpi_lid_open()) {
519 dev_priv->modeset_on_lid = 1;
520 return NOTIFY_OK;
521 }
522
523 if (!dev_priv->modeset_on_lid)
524 return NOTIFY_OK;
525
526 dev_priv->modeset_on_lid = 0;
527
528 mutex_lock(&dev->mode_config.mutex);
529 intel_modeset_check_state(dev);
530 mutex_unlock(&dev->mode_config.mutex);
531
532 return NOTIFY_OK;
533 }
534
535 /**
536 * intel_lvds_destroy - unregister and free LVDS structures
537 * @connector: connector to free
538 *
539 * Unregister the DDC bus for this connector then free the driver private
540 * structure.
541 */
542 static void intel_lvds_destroy(struct drm_connector *connector)
543 {
544 struct drm_device *dev = connector->dev;
545 struct drm_i915_private *dev_priv = dev->dev_private;
546
547 intel_panel_destroy_backlight(dev);
548
549 if (dev_priv->lid_notifier.notifier_call)
550 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
551 drm_sysfs_connector_remove(connector);
552 drm_connector_cleanup(connector);
553 kfree(connector);
554 }
555
556 static int intel_lvds_set_property(struct drm_connector *connector,
557 struct drm_property *property,
558 uint64_t value)
559 {
560 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
561 struct drm_device *dev = connector->dev;
562
563 if (property == dev->mode_config.scaling_mode_property) {
564 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
565
566 if (value == DRM_MODE_SCALE_NONE) {
567 DRM_DEBUG_KMS("no scaling not supported\n");
568 return -EINVAL;
569 }
570
571 if (intel_lvds->fitting_mode == value) {
572 /* the LVDS scaling property is not changed */
573 return 0;
574 }
575 intel_lvds->fitting_mode = value;
576 if (crtc && crtc->enabled) {
577 /*
578 * If the CRTC is enabled, the display will be changed
579 * according to the new panel fitting mode.
580 */
581 intel_set_mode(crtc, &crtc->mode,
582 crtc->x, crtc->y, crtc->fb);
583 }
584 }
585
586 return 0;
587 }
588
589 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
590 .mode_fixup = intel_lvds_mode_fixup,
591 .mode_set = intel_lvds_mode_set,
592 .disable = intel_encoder_noop,
593 };
594
595 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
596 .get_modes = intel_lvds_get_modes,
597 .mode_valid = intel_lvds_mode_valid,
598 .best_encoder = intel_best_encoder,
599 };
600
601 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
602 .dpms = intel_connector_dpms,
603 .detect = intel_lvds_detect,
604 .fill_modes = drm_helper_probe_single_connector_modes,
605 .set_property = intel_lvds_set_property,
606 .destroy = intel_lvds_destroy,
607 };
608
609 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
610 .destroy = intel_encoder_destroy,
611 };
612
613 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
614 {
615 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
616 return 1;
617 }
618
619 /* These systems claim to have LVDS, but really don't */
620 static const struct dmi_system_id intel_no_lvds[] = {
621 {
622 .callback = intel_no_lvds_dmi_callback,
623 .ident = "Apple Mac Mini (Core series)",
624 .matches = {
625 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
626 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
627 },
628 },
629 {
630 .callback = intel_no_lvds_dmi_callback,
631 .ident = "Apple Mac Mini (Core 2 series)",
632 .matches = {
633 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
634 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
635 },
636 },
637 {
638 .callback = intel_no_lvds_dmi_callback,
639 .ident = "MSI IM-945GSE-A",
640 .matches = {
641 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
642 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
643 },
644 },
645 {
646 .callback = intel_no_lvds_dmi_callback,
647 .ident = "Dell Studio Hybrid",
648 .matches = {
649 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
650 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
651 },
652 },
653 {
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Dell OptiPlex FX170",
656 .matches = {
657 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
658 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
659 },
660 },
661 {
662 .callback = intel_no_lvds_dmi_callback,
663 .ident = "AOpen Mini PC",
664 .matches = {
665 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
666 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
667 },
668 },
669 {
670 .callback = intel_no_lvds_dmi_callback,
671 .ident = "AOpen Mini PC MP915",
672 .matches = {
673 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
674 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
675 },
676 },
677 {
678 .callback = intel_no_lvds_dmi_callback,
679 .ident = "AOpen i915GMm-HFS",
680 .matches = {
681 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
682 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
683 },
684 },
685 {
686 .callback = intel_no_lvds_dmi_callback,
687 .ident = "AOpen i45GMx-I",
688 .matches = {
689 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
690 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
691 },
692 },
693 {
694 .callback = intel_no_lvds_dmi_callback,
695 .ident = "Aopen i945GTt-VFA",
696 .matches = {
697 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
698 },
699 },
700 {
701 .callback = intel_no_lvds_dmi_callback,
702 .ident = "Clientron U800",
703 .matches = {
704 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
705 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
706 },
707 },
708 {
709 .callback = intel_no_lvds_dmi_callback,
710 .ident = "Clientron E830",
711 .matches = {
712 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
713 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
714 },
715 },
716 {
717 .callback = intel_no_lvds_dmi_callback,
718 .ident = "Asus EeeBox PC EB1007",
719 .matches = {
720 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
721 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
722 },
723 },
724 {
725 .callback = intel_no_lvds_dmi_callback,
726 .ident = "Asus AT5NM10T-I",
727 .matches = {
728 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
729 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
730 },
731 },
732 {
733 .callback = intel_no_lvds_dmi_callback,
734 .ident = "Hewlett-Packard HP t5740e Thin Client",
735 .matches = {
736 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
737 DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
738 },
739 },
740 {
741 .callback = intel_no_lvds_dmi_callback,
742 .ident = "Hewlett-Packard t5745",
743 .matches = {
744 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
745 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
746 },
747 },
748 {
749 .callback = intel_no_lvds_dmi_callback,
750 .ident = "Hewlett-Packard st5747",
751 .matches = {
752 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
753 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
754 },
755 },
756 {
757 .callback = intel_no_lvds_dmi_callback,
758 .ident = "MSI Wind Box DC500",
759 .matches = {
760 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
761 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
762 },
763 },
764 {
765 .callback = intel_no_lvds_dmi_callback,
766 .ident = "ZOTAC ZBOXSD-ID12/ID13",
767 .matches = {
768 DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
769 DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
770 },
771 },
772 {
773 .callback = intel_no_lvds_dmi_callback,
774 .ident = "Gigabyte GA-D525TUD",
775 .matches = {
776 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
777 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
778 },
779 },
780
781 { } /* terminating entry */
782 };
783
784 /**
785 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
786 * @dev: drm device
787 * @connector: LVDS connector
788 *
789 * Find the reduced downclock for LVDS in EDID.
790 */
791 static void intel_find_lvds_downclock(struct drm_device *dev,
792 struct drm_display_mode *fixed_mode,
793 struct drm_connector *connector)
794 {
795 struct drm_i915_private *dev_priv = dev->dev_private;
796 struct drm_display_mode *scan;
797 int temp_downclock;
798
799 temp_downclock = fixed_mode->clock;
800 list_for_each_entry(scan, &connector->probed_modes, head) {
801 /*
802 * If one mode has the same resolution with the fixed_panel
803 * mode while they have the different refresh rate, it means
804 * that the reduced downclock is found for the LVDS. In such
805 * case we can set the different FPx0/1 to dynamically select
806 * between low and high frequency.
807 */
808 if (scan->hdisplay == fixed_mode->hdisplay &&
809 scan->hsync_start == fixed_mode->hsync_start &&
810 scan->hsync_end == fixed_mode->hsync_end &&
811 scan->htotal == fixed_mode->htotal &&
812 scan->vdisplay == fixed_mode->vdisplay &&
813 scan->vsync_start == fixed_mode->vsync_start &&
814 scan->vsync_end == fixed_mode->vsync_end &&
815 scan->vtotal == fixed_mode->vtotal) {
816 if (scan->clock < temp_downclock) {
817 /*
818 * The downclock is already found. But we
819 * expect to find the lower downclock.
820 */
821 temp_downclock = scan->clock;
822 }
823 }
824 }
825 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
826 /* We found the downclock for LVDS. */
827 dev_priv->lvds_downclock_avail = 1;
828 dev_priv->lvds_downclock = temp_downclock;
829 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
830 "Normal clock %dKhz, downclock %dKhz\n",
831 fixed_mode->clock, temp_downclock);
832 }
833 }
834
835 /*
836 * Enumerate the child dev array parsed from VBT to check whether
837 * the LVDS is present.
838 * If it is present, return 1.
839 * If it is not present, return false.
840 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
841 */
842 static bool lvds_is_present_in_vbt(struct drm_device *dev,
843 u8 *i2c_pin)
844 {
845 struct drm_i915_private *dev_priv = dev->dev_private;
846 int i;
847
848 if (!dev_priv->child_dev_num)
849 return true;
850
851 for (i = 0; i < dev_priv->child_dev_num; i++) {
852 struct child_device_config *child = dev_priv->child_dev + i;
853
854 /* If the device type is not LFP, continue.
855 * We have to check both the new identifiers as well as the
856 * old for compatibility with some BIOSes.
857 */
858 if (child->device_type != DEVICE_TYPE_INT_LFP &&
859 child->device_type != DEVICE_TYPE_LFP)
860 continue;
861
862 if (intel_gmbus_is_port_valid(child->i2c_pin))
863 *i2c_pin = child->i2c_pin;
864
865 /* However, we cannot trust the BIOS writers to populate
866 * the VBT correctly. Since LVDS requires additional
867 * information from AIM blocks, a non-zero addin offset is
868 * a good indicator that the LVDS is actually present.
869 */
870 if (child->addin_offset)
871 return true;
872
873 /* But even then some BIOS writers perform some black magic
874 * and instantiate the device without reference to any
875 * additional data. Trust that if the VBT was written into
876 * the OpRegion then they have validated the LVDS's existence.
877 */
878 if (dev_priv->opregion.vbt)
879 return true;
880 }
881
882 return false;
883 }
884
885 static bool intel_lvds_supported(struct drm_device *dev)
886 {
887 /* With the introduction of the PCH we gained a dedicated
888 * LVDS presence pin, use it. */
889 if (HAS_PCH_SPLIT(dev))
890 return true;
891
892 /* Otherwise LVDS was only attached to mobile products,
893 * except for the inglorious 830gm */
894 return IS_MOBILE(dev) && !IS_I830(dev);
895 }
896
897 /**
898 * intel_lvds_init - setup LVDS connectors on this device
899 * @dev: drm device
900 *
901 * Create the connector, register the LVDS DDC bus, and try to figure out what
902 * modes we can display on the LVDS panel (if present).
903 */
904 bool intel_lvds_init(struct drm_device *dev)
905 {
906 struct drm_i915_private *dev_priv = dev->dev_private;
907 struct intel_lvds *intel_lvds;
908 struct intel_encoder *intel_encoder;
909 struct intel_connector *intel_connector;
910 struct drm_connector *connector;
911 struct drm_encoder *encoder;
912 struct drm_display_mode *scan; /* *modes, *bios_mode; */
913 struct drm_crtc *crtc;
914 u32 lvds;
915 int pipe;
916 u8 pin;
917
918 if (!intel_lvds_supported(dev))
919 return false;
920
921 /* Skip init on machines we know falsely report LVDS */
922 if (dmi_check_system(intel_no_lvds))
923 return false;
924
925 pin = GMBUS_PORT_PANEL;
926 if (!lvds_is_present_in_vbt(dev, &pin)) {
927 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
928 return false;
929 }
930
931 if (HAS_PCH_SPLIT(dev)) {
932 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
933 return false;
934 if (dev_priv->edp.support) {
935 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
936 return false;
937 }
938 }
939
940 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
941 if (!intel_lvds) {
942 return false;
943 }
944
945 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
946 if (!intel_connector) {
947 kfree(intel_lvds);
948 return false;
949 }
950
951 if (!HAS_PCH_SPLIT(dev)) {
952 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
953 }
954
955 intel_encoder = &intel_lvds->base;
956 encoder = &intel_encoder->base;
957 connector = &intel_connector->base;
958 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
959 DRM_MODE_CONNECTOR_LVDS);
960
961 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
962 DRM_MODE_ENCODER_LVDS);
963
964 intel_encoder->enable = intel_enable_lvds;
965 intel_encoder->disable = intel_disable_lvds;
966 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
967 intel_connector->get_hw_state = intel_connector_get_hw_state;
968
969 intel_connector_attach_encoder(intel_connector, intel_encoder);
970 intel_encoder->type = INTEL_OUTPUT_LVDS;
971
972 intel_encoder->cloneable = false;
973 if (HAS_PCH_SPLIT(dev))
974 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
975 else if (IS_GEN4(dev))
976 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
977 else
978 intel_encoder->crtc_mask = (1 << 1);
979
980 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
981 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
982 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
983 connector->interlace_allowed = false;
984 connector->doublescan_allowed = false;
985
986 /* create the scaling mode property */
987 drm_mode_create_scaling_mode_property(dev);
988 /*
989 * the initial panel fitting mode will be FULL_SCREEN.
990 */
991
992 drm_connector_attach_property(&intel_connector->base,
993 dev->mode_config.scaling_mode_property,
994 DRM_MODE_SCALE_ASPECT);
995 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
996 /*
997 * LVDS discovery:
998 * 1) check for EDID on DDC
999 * 2) check for VBT data
1000 * 3) check to see if LVDS is already on
1001 * if none of the above, no panel
1002 * 4) make sure lid is open
1003 * if closed, act like it's not there for now
1004 */
1005
1006 /*
1007 * Attempt to get the fixed panel mode from DDC. Assume that the
1008 * preferred mode is the right one.
1009 */
1010 intel_lvds->edid = drm_get_edid(connector,
1011 intel_gmbus_get_adapter(dev_priv,
1012 pin));
1013 if (intel_lvds->edid) {
1014 if (drm_add_edid_modes(connector,
1015 intel_lvds->edid)) {
1016 drm_mode_connector_update_edid_property(connector,
1017 intel_lvds->edid);
1018 } else {
1019 kfree(intel_lvds->edid);
1020 intel_lvds->edid = NULL;
1021 }
1022 }
1023 if (!intel_lvds->edid) {
1024 /* Didn't get an EDID, so
1025 * Set wide sync ranges so we get all modes
1026 * handed to valid_mode for checking
1027 */
1028 connector->display_info.min_vfreq = 0;
1029 connector->display_info.max_vfreq = 200;
1030 connector->display_info.min_hfreq = 0;
1031 connector->display_info.max_hfreq = 200;
1032 }
1033
1034 list_for_each_entry(scan, &connector->probed_modes, head) {
1035 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1036 intel_lvds->fixed_mode =
1037 drm_mode_duplicate(dev, scan);
1038 intel_find_lvds_downclock(dev,
1039 intel_lvds->fixed_mode,
1040 connector);
1041 goto out;
1042 }
1043 }
1044
1045 /* Failed to get EDID, what about VBT? */
1046 if (dev_priv->lfp_lvds_vbt_mode) {
1047 intel_lvds->fixed_mode =
1048 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1049 if (intel_lvds->fixed_mode) {
1050 intel_lvds->fixed_mode->type |=
1051 DRM_MODE_TYPE_PREFERRED;
1052 goto out;
1053 }
1054 }
1055
1056 /*
1057 * If we didn't get EDID, try checking if the panel is already turned
1058 * on. If so, assume that whatever is currently programmed is the
1059 * correct mode.
1060 */
1061
1062 /* Ironlake: FIXME if still fail, not try pipe mode now */
1063 if (HAS_PCH_SPLIT(dev))
1064 goto failed;
1065
1066 lvds = I915_READ(LVDS);
1067 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1068 crtc = intel_get_crtc_for_pipe(dev, pipe);
1069
1070 if (crtc && (lvds & LVDS_PORT_EN)) {
1071 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1072 if (intel_lvds->fixed_mode) {
1073 intel_lvds->fixed_mode->type |=
1074 DRM_MODE_TYPE_PREFERRED;
1075 goto out;
1076 }
1077 }
1078
1079 /* If we still don't have a mode after all that, give up. */
1080 if (!intel_lvds->fixed_mode)
1081 goto failed;
1082
1083 out:
1084 /*
1085 * Unlock registers and just
1086 * leave them unlocked
1087 */
1088 if (HAS_PCH_SPLIT(dev)) {
1089 I915_WRITE(PCH_PP_CONTROL,
1090 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1091 } else {
1092 I915_WRITE(PP_CONTROL,
1093 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1094 }
1095 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1096 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1097 DRM_DEBUG_KMS("lid notifier registration failed\n");
1098 dev_priv->lid_notifier.notifier_call = NULL;
1099 }
1100 /* keep the LVDS connector */
1101 dev_priv->int_lvds_connector = connector;
1102 drm_sysfs_connector_add(connector);
1103
1104 intel_panel_setup_backlight(dev);
1105
1106 return true;
1107
1108 failed:
1109 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1110 drm_connector_cleanup(connector);
1111 drm_encoder_cleanup(encoder);
1112 kfree(intel_lvds);
1113 kfree(intel_connector);
1114 return false;
1115 }
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