2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
44 struct intel_encoder base
;
53 struct drm_display_mode
*fixed_mode
;
56 static struct intel_lvds
*to_intel_lvds(struct drm_encoder
*encoder
)
58 return container_of(encoder
, struct intel_lvds
, base
.base
);
61 static struct intel_lvds
*intel_attached_lvds(struct drm_connector
*connector
)
63 return container_of(intel_attached_encoder(connector
),
64 struct intel_lvds
, base
);
67 static bool intel_lvds_get_hw_state(struct intel_encoder
*encoder
,
70 struct drm_device
*dev
= encoder
->base
.dev
;
71 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
74 if (HAS_PCH_SPLIT(dev
)) {
80 tmp
= I915_READ(lvds_reg
);
82 if (!(tmp
& LVDS_PORT_EN
))
86 *pipe
= PORT_TO_PIPE_CPT(tmp
);
88 *pipe
= PORT_TO_PIPE(tmp
);
94 * Sets the power state for the panel.
96 static void intel_enable_lvds(struct intel_encoder
*encoder
)
98 struct drm_device
*dev
= encoder
->base
.dev
;
99 struct intel_lvds
*intel_lvds
= to_intel_lvds(&encoder
->base
);
100 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
101 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
102 u32 ctl_reg
, lvds_reg
, stat_reg
;
104 if (HAS_PCH_SPLIT(dev
)) {
105 ctl_reg
= PCH_PP_CONTROL
;
107 stat_reg
= PCH_PP_STATUS
;
109 ctl_reg
= PP_CONTROL
;
111 stat_reg
= PP_STATUS
;
114 I915_WRITE(lvds_reg
, I915_READ(lvds_reg
) | LVDS_PORT_EN
);
116 if (intel_lvds
->pfit_dirty
) {
118 * Enable automatic panel scaling so that non-native modes
119 * fill the screen. The panel fitter should only be
120 * adjusted whilst the pipe is disabled, according to
121 * register description and PRM.
123 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
124 intel_lvds
->pfit_control
,
125 intel_lvds
->pfit_pgm_ratios
);
127 I915_WRITE(PFIT_PGM_RATIOS
, intel_lvds
->pfit_pgm_ratios
);
128 I915_WRITE(PFIT_CONTROL
, intel_lvds
->pfit_control
);
129 intel_lvds
->pfit_dirty
= false;
132 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) | POWER_TARGET_ON
);
133 POSTING_READ(lvds_reg
);
134 if (wait_for((I915_READ(stat_reg
) & PP_ON
) != 0, 1000))
135 DRM_ERROR("timed out waiting for panel to power on\n");
137 intel_panel_enable_backlight(dev
, intel_crtc
->pipe
);
140 static void intel_disable_lvds(struct intel_encoder
*encoder
)
142 struct drm_device
*dev
= encoder
->base
.dev
;
143 struct intel_lvds
*intel_lvds
= to_intel_lvds(&encoder
->base
);
144 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
145 u32 ctl_reg
, lvds_reg
, stat_reg
;
147 if (HAS_PCH_SPLIT(dev
)) {
148 ctl_reg
= PCH_PP_CONTROL
;
150 stat_reg
= PCH_PP_STATUS
;
152 ctl_reg
= PP_CONTROL
;
154 stat_reg
= PP_STATUS
;
157 intel_panel_disable_backlight(dev
);
159 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) & ~POWER_TARGET_ON
);
160 if (wait_for((I915_READ(stat_reg
) & PP_ON
) == 0, 1000))
161 DRM_ERROR("timed out waiting for panel to power off\n");
163 if (intel_lvds
->pfit_control
) {
164 I915_WRITE(PFIT_CONTROL
, 0);
165 intel_lvds
->pfit_dirty
= true;
168 I915_WRITE(lvds_reg
, I915_READ(lvds_reg
) & ~LVDS_PORT_EN
);
169 POSTING_READ(lvds_reg
);
172 static int intel_lvds_mode_valid(struct drm_connector
*connector
,
173 struct drm_display_mode
*mode
)
175 struct intel_lvds
*intel_lvds
= intel_attached_lvds(connector
);
176 struct drm_display_mode
*fixed_mode
= intel_lvds
->fixed_mode
;
178 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
180 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
187 centre_horizontally(struct drm_display_mode
*mode
,
190 u32 border
, sync_pos
, blank_width
, sync_width
;
192 /* keep the hsync and hblank widths constant */
193 sync_width
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
194 blank_width
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
195 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
197 border
= (mode
->hdisplay
- width
+ 1) / 2;
198 border
+= border
& 1; /* make the border even */
200 mode
->crtc_hdisplay
= width
;
201 mode
->crtc_hblank_start
= width
+ border
;
202 mode
->crtc_hblank_end
= mode
->crtc_hblank_start
+ blank_width
;
204 mode
->crtc_hsync_start
= mode
->crtc_hblank_start
+ sync_pos
;
205 mode
->crtc_hsync_end
= mode
->crtc_hsync_start
+ sync_width
;
207 mode
->private_flags
|= INTEL_MODE_CRTC_TIMINGS_SET
;
211 centre_vertically(struct drm_display_mode
*mode
,
214 u32 border
, sync_pos
, blank_width
, sync_width
;
216 /* keep the vsync and vblank widths constant */
217 sync_width
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
218 blank_width
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
219 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
221 border
= (mode
->vdisplay
- height
+ 1) / 2;
223 mode
->crtc_vdisplay
= height
;
224 mode
->crtc_vblank_start
= height
+ border
;
225 mode
->crtc_vblank_end
= mode
->crtc_vblank_start
+ blank_width
;
227 mode
->crtc_vsync_start
= mode
->crtc_vblank_start
+ sync_pos
;
228 mode
->crtc_vsync_end
= mode
->crtc_vsync_start
+ sync_width
;
230 mode
->private_flags
|= INTEL_MODE_CRTC_TIMINGS_SET
;
233 static inline u32
panel_fitter_scaling(u32 source
, u32 target
)
236 * Floating point operation is not supported. So the FACTOR
237 * is defined, which can avoid the floating point computation
238 * when calculating the panel ratio.
241 #define FACTOR (1 << ACCURACY)
242 u32 ratio
= source
* FACTOR
/ target
;
243 return (FACTOR
* ratio
+ FACTOR
/2) / FACTOR
;
246 static bool intel_lvds_mode_fixup(struct drm_encoder
*encoder
,
247 const struct drm_display_mode
*mode
,
248 struct drm_display_mode
*adjusted_mode
)
250 struct drm_device
*dev
= encoder
->dev
;
251 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
252 struct intel_lvds
*intel_lvds
= to_intel_lvds(encoder
);
253 struct intel_crtc
*intel_crtc
= intel_lvds
->base
.new_crtc
;
254 u32 pfit_control
= 0, pfit_pgm_ratios
= 0, border
= 0;
257 /* Should never happen!! */
258 if (INTEL_INFO(dev
)->gen
< 4 && intel_crtc
->pipe
== 0) {
259 DRM_ERROR("Can't support LVDS on pipe A\n");
263 if (intel_encoder_check_is_cloned(&intel_lvds
->base
))
267 * We have timings from the BIOS for the panel, put them in
268 * to the adjusted mode. The CRTC will be set up for this mode,
269 * with the panel scaling set up to source from the H/VDisplay
270 * of the original mode.
272 intel_fixed_panel_mode(intel_lvds
->fixed_mode
, adjusted_mode
);
274 if (HAS_PCH_SPLIT(dev
)) {
275 intel_pch_panel_fitting(dev
, intel_lvds
->fitting_mode
,
276 mode
, adjusted_mode
);
280 /* Native modes don't need fitting */
281 if (adjusted_mode
->hdisplay
== mode
->hdisplay
&&
282 adjusted_mode
->vdisplay
== mode
->vdisplay
)
285 /* 965+ wants fuzzy fitting */
286 if (INTEL_INFO(dev
)->gen
>= 4)
287 pfit_control
|= ((intel_crtc
->pipe
<< PFIT_PIPE_SHIFT
) |
291 * Enable automatic panel scaling for non-native modes so that they fill
292 * the screen. Should be enabled before the pipe is enabled, according
293 * to register description and PRM.
294 * Change the value here to see the borders for debugging
297 I915_WRITE(BCLRPAT(pipe
), 0);
299 drm_mode_set_crtcinfo(adjusted_mode
, 0);
301 switch (intel_lvds
->fitting_mode
) {
302 case DRM_MODE_SCALE_CENTER
:
304 * For centered modes, we have to calculate border widths &
305 * heights and modify the values programmed into the CRTC.
307 centre_horizontally(adjusted_mode
, mode
->hdisplay
);
308 centre_vertically(adjusted_mode
, mode
->vdisplay
);
309 border
= LVDS_BORDER_ENABLE
;
312 case DRM_MODE_SCALE_ASPECT
:
313 /* Scale but preserve the aspect ratio */
314 if (INTEL_INFO(dev
)->gen
>= 4) {
315 u32 scaled_width
= adjusted_mode
->hdisplay
* mode
->vdisplay
;
316 u32 scaled_height
= mode
->hdisplay
* adjusted_mode
->vdisplay
;
318 /* 965+ is easy, it does everything in hw */
319 if (scaled_width
> scaled_height
)
320 pfit_control
|= PFIT_ENABLE
| PFIT_SCALING_PILLAR
;
321 else if (scaled_width
< scaled_height
)
322 pfit_control
|= PFIT_ENABLE
| PFIT_SCALING_LETTER
;
323 else if (adjusted_mode
->hdisplay
!= mode
->hdisplay
)
324 pfit_control
|= PFIT_ENABLE
| PFIT_SCALING_AUTO
;
326 u32 scaled_width
= adjusted_mode
->hdisplay
* mode
->vdisplay
;
327 u32 scaled_height
= mode
->hdisplay
* adjusted_mode
->vdisplay
;
329 * For earlier chips we have to calculate the scaling
330 * ratio by hand and program it into the
331 * PFIT_PGM_RATIO register
333 if (scaled_width
> scaled_height
) { /* pillar */
334 centre_horizontally(adjusted_mode
, scaled_height
/ mode
->vdisplay
);
336 border
= LVDS_BORDER_ENABLE
;
337 if (mode
->vdisplay
!= adjusted_mode
->vdisplay
) {
338 u32 bits
= panel_fitter_scaling(mode
->vdisplay
, adjusted_mode
->vdisplay
);
339 pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
340 bits
<< PFIT_VERT_SCALE_SHIFT
);
341 pfit_control
|= (PFIT_ENABLE
|
342 VERT_INTERP_BILINEAR
|
343 HORIZ_INTERP_BILINEAR
);
345 } else if (scaled_width
< scaled_height
) { /* letter */
346 centre_vertically(adjusted_mode
, scaled_width
/ mode
->hdisplay
);
348 border
= LVDS_BORDER_ENABLE
;
349 if (mode
->hdisplay
!= adjusted_mode
->hdisplay
) {
350 u32 bits
= panel_fitter_scaling(mode
->hdisplay
, adjusted_mode
->hdisplay
);
351 pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
352 bits
<< PFIT_VERT_SCALE_SHIFT
);
353 pfit_control
|= (PFIT_ENABLE
|
354 VERT_INTERP_BILINEAR
|
355 HORIZ_INTERP_BILINEAR
);
358 /* Aspects match, Let hw scale both directions */
359 pfit_control
|= (PFIT_ENABLE
|
360 VERT_AUTO_SCALE
| HORIZ_AUTO_SCALE
|
361 VERT_INTERP_BILINEAR
|
362 HORIZ_INTERP_BILINEAR
);
366 case DRM_MODE_SCALE_FULLSCREEN
:
368 * Full scaling, even if it changes the aspect ratio.
369 * Fortunately this is all done for us in hw.
371 if (mode
->vdisplay
!= adjusted_mode
->vdisplay
||
372 mode
->hdisplay
!= adjusted_mode
->hdisplay
) {
373 pfit_control
|= PFIT_ENABLE
;
374 if (INTEL_INFO(dev
)->gen
>= 4)
375 pfit_control
|= PFIT_SCALING_AUTO
;
377 pfit_control
|= (VERT_AUTO_SCALE
|
378 VERT_INTERP_BILINEAR
|
380 HORIZ_INTERP_BILINEAR
);
389 /* If not enabling scaling, be consistent and always use 0. */
390 if ((pfit_control
& PFIT_ENABLE
) == 0) {
395 /* Make sure pre-965 set dither correctly */
396 if (INTEL_INFO(dev
)->gen
< 4 && dev_priv
->lvds_dither
)
397 pfit_control
|= PANEL_8TO6_DITHER_ENABLE
;
399 if (pfit_control
!= intel_lvds
->pfit_control
||
400 pfit_pgm_ratios
!= intel_lvds
->pfit_pgm_ratios
) {
401 intel_lvds
->pfit_control
= pfit_control
;
402 intel_lvds
->pfit_pgm_ratios
= pfit_pgm_ratios
;
403 intel_lvds
->pfit_dirty
= true;
405 dev_priv
->lvds_border_bits
= border
;
408 * XXX: It would be nice to support lower refresh rates on the
409 * panels to reduce power consumption, and perhaps match the
410 * user's requested refresh rate.
416 static void intel_lvds_mode_set(struct drm_encoder
*encoder
,
417 struct drm_display_mode
*mode
,
418 struct drm_display_mode
*adjusted_mode
)
421 * The LVDS pin pair will already have been turned on in the
422 * intel_crtc_mode_set since it has a large impact on the DPLL
428 * Detect the LVDS connection.
430 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
431 * connected and closed means disconnected. We also send hotplug events as
432 * needed, using lid status notification from the input layer.
434 static enum drm_connector_status
435 intel_lvds_detect(struct drm_connector
*connector
, bool force
)
437 struct drm_device
*dev
= connector
->dev
;
438 enum drm_connector_status status
;
440 status
= intel_panel_detect(dev
);
441 if (status
!= connector_status_unknown
)
444 return connector_status_connected
;
448 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
450 static int intel_lvds_get_modes(struct drm_connector
*connector
)
452 struct intel_lvds
*intel_lvds
= intel_attached_lvds(connector
);
453 struct drm_device
*dev
= connector
->dev
;
454 struct drm_display_mode
*mode
;
456 if (intel_lvds
->edid
)
457 return drm_add_edid_modes(connector
, intel_lvds
->edid
);
459 mode
= drm_mode_duplicate(dev
, intel_lvds
->fixed_mode
);
463 drm_mode_probed_add(connector
, mode
);
467 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id
*id
)
469 DRM_INFO("Skipping forced modeset for %s\n", id
->ident
);
473 /* The GPU hangs up on these systems if modeset is performed on LID open */
474 static const struct dmi_system_id intel_no_modeset_on_lid
[] = {
476 .callback
= intel_no_modeset_on_lid_dmi_callback
,
477 .ident
= "Toshiba Tecra A11",
479 DMI_MATCH(DMI_SYS_VENDOR
, "TOSHIBA"),
480 DMI_MATCH(DMI_PRODUCT_NAME
, "TECRA A11"),
484 { } /* terminating entry */
488 * Lid events. Note the use of 'modeset_on_lid':
489 * - we set it on lid close, and reset it on open
490 * - we use it as a "only once" bit (ie we ignore
491 * duplicate events where it was already properly
493 * - the suspend/resume paths will also set it to
494 * zero, since they restore the mode ("lid open").
496 static int intel_lid_notify(struct notifier_block
*nb
, unsigned long val
,
499 struct drm_i915_private
*dev_priv
=
500 container_of(nb
, struct drm_i915_private
, lid_notifier
);
501 struct drm_device
*dev
= dev_priv
->dev
;
502 struct drm_connector
*connector
= dev_priv
->int_lvds_connector
;
504 if (dev
->switch_power_state
!= DRM_SWITCH_POWER_ON
)
508 * check and update the status of LVDS connector after receiving
509 * the LID nofication event.
512 connector
->status
= connector
->funcs
->detect(connector
,
515 /* Don't force modeset on machines where it causes a GPU lockup */
516 if (dmi_check_system(intel_no_modeset_on_lid
))
518 if (!acpi_lid_open()) {
519 dev_priv
->modeset_on_lid
= 1;
523 if (!dev_priv
->modeset_on_lid
)
526 dev_priv
->modeset_on_lid
= 0;
528 mutex_lock(&dev
->mode_config
.mutex
);
529 intel_modeset_check_state(dev
);
530 mutex_unlock(&dev
->mode_config
.mutex
);
536 * intel_lvds_destroy - unregister and free LVDS structures
537 * @connector: connector to free
539 * Unregister the DDC bus for this connector then free the driver private
542 static void intel_lvds_destroy(struct drm_connector
*connector
)
544 struct drm_device
*dev
= connector
->dev
;
545 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
547 intel_panel_destroy_backlight(dev
);
549 if (dev_priv
->lid_notifier
.notifier_call
)
550 acpi_lid_notifier_unregister(&dev_priv
->lid_notifier
);
551 drm_sysfs_connector_remove(connector
);
552 drm_connector_cleanup(connector
);
556 static int intel_lvds_set_property(struct drm_connector
*connector
,
557 struct drm_property
*property
,
560 struct intel_lvds
*intel_lvds
= intel_attached_lvds(connector
);
561 struct drm_device
*dev
= connector
->dev
;
563 if (property
== dev
->mode_config
.scaling_mode_property
) {
564 struct drm_crtc
*crtc
= intel_lvds
->base
.base
.crtc
;
566 if (value
== DRM_MODE_SCALE_NONE
) {
567 DRM_DEBUG_KMS("no scaling not supported\n");
571 if (intel_lvds
->fitting_mode
== value
) {
572 /* the LVDS scaling property is not changed */
575 intel_lvds
->fitting_mode
= value
;
576 if (crtc
&& crtc
->enabled
) {
578 * If the CRTC is enabled, the display will be changed
579 * according to the new panel fitting mode.
581 intel_set_mode(crtc
, &crtc
->mode
,
582 crtc
->x
, crtc
->y
, crtc
->fb
);
589 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs
= {
590 .mode_fixup
= intel_lvds_mode_fixup
,
591 .mode_set
= intel_lvds_mode_set
,
592 .disable
= intel_encoder_noop
,
595 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
= {
596 .get_modes
= intel_lvds_get_modes
,
597 .mode_valid
= intel_lvds_mode_valid
,
598 .best_encoder
= intel_best_encoder
,
601 static const struct drm_connector_funcs intel_lvds_connector_funcs
= {
602 .dpms
= intel_connector_dpms
,
603 .detect
= intel_lvds_detect
,
604 .fill_modes
= drm_helper_probe_single_connector_modes
,
605 .set_property
= intel_lvds_set_property
,
606 .destroy
= intel_lvds_destroy
,
609 static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
610 .destroy
= intel_encoder_destroy
,
613 static int __init
intel_no_lvds_dmi_callback(const struct dmi_system_id
*id
)
615 DRM_INFO("Skipping LVDS initialization for %s\n", id
->ident
);
619 /* These systems claim to have LVDS, but really don't */
620 static const struct dmi_system_id intel_no_lvds
[] = {
622 .callback
= intel_no_lvds_dmi_callback
,
623 .ident
= "Apple Mac Mini (Core series)",
625 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
626 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini1,1"),
630 .callback
= intel_no_lvds_dmi_callback
,
631 .ident
= "Apple Mac Mini (Core 2 series)",
633 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
634 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini2,1"),
638 .callback
= intel_no_lvds_dmi_callback
,
639 .ident
= "MSI IM-945GSE-A",
641 DMI_MATCH(DMI_SYS_VENDOR
, "MSI"),
642 DMI_MATCH(DMI_PRODUCT_NAME
, "A9830IMS"),
646 .callback
= intel_no_lvds_dmi_callback
,
647 .ident
= "Dell Studio Hybrid",
649 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
650 DMI_MATCH(DMI_PRODUCT_NAME
, "Studio Hybrid 140g"),
654 .callback
= intel_no_lvds_dmi_callback
,
655 .ident
= "Dell OptiPlex FX170",
657 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
658 DMI_MATCH(DMI_PRODUCT_NAME
, "OptiPlex FX170"),
662 .callback
= intel_no_lvds_dmi_callback
,
663 .ident
= "AOpen Mini PC",
665 DMI_MATCH(DMI_SYS_VENDOR
, "AOpen"),
666 DMI_MATCH(DMI_PRODUCT_NAME
, "i965GMx-IF"),
670 .callback
= intel_no_lvds_dmi_callback
,
671 .ident
= "AOpen Mini PC MP915",
673 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
674 DMI_MATCH(DMI_BOARD_NAME
, "i915GMx-F"),
678 .callback
= intel_no_lvds_dmi_callback
,
679 .ident
= "AOpen i915GMm-HFS",
681 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
682 DMI_MATCH(DMI_BOARD_NAME
, "i915GMm-HFS"),
686 .callback
= intel_no_lvds_dmi_callback
,
687 .ident
= "AOpen i45GMx-I",
689 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
690 DMI_MATCH(DMI_BOARD_NAME
, "i45GMx-I"),
694 .callback
= intel_no_lvds_dmi_callback
,
695 .ident
= "Aopen i945GTt-VFA",
697 DMI_MATCH(DMI_PRODUCT_VERSION
, "AO00001JW"),
701 .callback
= intel_no_lvds_dmi_callback
,
702 .ident
= "Clientron U800",
704 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
705 DMI_MATCH(DMI_PRODUCT_NAME
, "U800"),
709 .callback
= intel_no_lvds_dmi_callback
,
710 .ident
= "Clientron E830",
712 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
713 DMI_MATCH(DMI_PRODUCT_NAME
, "E830"),
717 .callback
= intel_no_lvds_dmi_callback
,
718 .ident
= "Asus EeeBox PC EB1007",
720 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer INC."),
721 DMI_MATCH(DMI_PRODUCT_NAME
, "EB1007"),
725 .callback
= intel_no_lvds_dmi_callback
,
726 .ident
= "Asus AT5NM10T-I",
728 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK Computer INC."),
729 DMI_MATCH(DMI_BOARD_NAME
, "AT5NM10T-I"),
733 .callback
= intel_no_lvds_dmi_callback
,
734 .ident
= "Hewlett-Packard HP t5740e Thin Client",
736 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
737 DMI_MATCH(DMI_PRODUCT_NAME
, "HP t5740e Thin Client"),
741 .callback
= intel_no_lvds_dmi_callback
,
742 .ident
= "Hewlett-Packard t5745",
744 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
745 DMI_MATCH(DMI_PRODUCT_NAME
, "hp t5745"),
749 .callback
= intel_no_lvds_dmi_callback
,
750 .ident
= "Hewlett-Packard st5747",
752 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
753 DMI_MATCH(DMI_PRODUCT_NAME
, "hp st5747"),
757 .callback
= intel_no_lvds_dmi_callback
,
758 .ident
= "MSI Wind Box DC500",
760 DMI_MATCH(DMI_BOARD_VENDOR
, "MICRO-STAR INTERNATIONAL CO., LTD"),
761 DMI_MATCH(DMI_BOARD_NAME
, "MS-7469"),
765 .callback
= intel_no_lvds_dmi_callback
,
766 .ident
= "ZOTAC ZBOXSD-ID12/ID13",
768 DMI_MATCH(DMI_BOARD_VENDOR
, "ZOTAC"),
769 DMI_MATCH(DMI_BOARD_NAME
, "ZBOXSD-ID12/ID13"),
773 .callback
= intel_no_lvds_dmi_callback
,
774 .ident
= "Gigabyte GA-D525TUD",
776 DMI_MATCH(DMI_BOARD_VENDOR
, "Gigabyte Technology Co., Ltd."),
777 DMI_MATCH(DMI_BOARD_NAME
, "D525TUD"),
781 { } /* terminating entry */
785 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
787 * @connector: LVDS connector
789 * Find the reduced downclock for LVDS in EDID.
791 static void intel_find_lvds_downclock(struct drm_device
*dev
,
792 struct drm_display_mode
*fixed_mode
,
793 struct drm_connector
*connector
)
795 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
796 struct drm_display_mode
*scan
;
799 temp_downclock
= fixed_mode
->clock
;
800 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
802 * If one mode has the same resolution with the fixed_panel
803 * mode while they have the different refresh rate, it means
804 * that the reduced downclock is found for the LVDS. In such
805 * case we can set the different FPx0/1 to dynamically select
806 * between low and high frequency.
808 if (scan
->hdisplay
== fixed_mode
->hdisplay
&&
809 scan
->hsync_start
== fixed_mode
->hsync_start
&&
810 scan
->hsync_end
== fixed_mode
->hsync_end
&&
811 scan
->htotal
== fixed_mode
->htotal
&&
812 scan
->vdisplay
== fixed_mode
->vdisplay
&&
813 scan
->vsync_start
== fixed_mode
->vsync_start
&&
814 scan
->vsync_end
== fixed_mode
->vsync_end
&&
815 scan
->vtotal
== fixed_mode
->vtotal
) {
816 if (scan
->clock
< temp_downclock
) {
818 * The downclock is already found. But we
819 * expect to find the lower downclock.
821 temp_downclock
= scan
->clock
;
825 if (temp_downclock
< fixed_mode
->clock
&& i915_lvds_downclock
) {
826 /* We found the downclock for LVDS. */
827 dev_priv
->lvds_downclock_avail
= 1;
828 dev_priv
->lvds_downclock
= temp_downclock
;
829 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
830 "Normal clock %dKhz, downclock %dKhz\n",
831 fixed_mode
->clock
, temp_downclock
);
836 * Enumerate the child dev array parsed from VBT to check whether
837 * the LVDS is present.
838 * If it is present, return 1.
839 * If it is not present, return false.
840 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
842 static bool lvds_is_present_in_vbt(struct drm_device
*dev
,
845 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
848 if (!dev_priv
->child_dev_num
)
851 for (i
= 0; i
< dev_priv
->child_dev_num
; i
++) {
852 struct child_device_config
*child
= dev_priv
->child_dev
+ i
;
854 /* If the device type is not LFP, continue.
855 * We have to check both the new identifiers as well as the
856 * old for compatibility with some BIOSes.
858 if (child
->device_type
!= DEVICE_TYPE_INT_LFP
&&
859 child
->device_type
!= DEVICE_TYPE_LFP
)
862 if (intel_gmbus_is_port_valid(child
->i2c_pin
))
863 *i2c_pin
= child
->i2c_pin
;
865 /* However, we cannot trust the BIOS writers to populate
866 * the VBT correctly. Since LVDS requires additional
867 * information from AIM blocks, a non-zero addin offset is
868 * a good indicator that the LVDS is actually present.
870 if (child
->addin_offset
)
873 /* But even then some BIOS writers perform some black magic
874 * and instantiate the device without reference to any
875 * additional data. Trust that if the VBT was written into
876 * the OpRegion then they have validated the LVDS's existence.
878 if (dev_priv
->opregion
.vbt
)
885 static bool intel_lvds_supported(struct drm_device
*dev
)
887 /* With the introduction of the PCH we gained a dedicated
888 * LVDS presence pin, use it. */
889 if (HAS_PCH_SPLIT(dev
))
892 /* Otherwise LVDS was only attached to mobile products,
893 * except for the inglorious 830gm */
894 return IS_MOBILE(dev
) && !IS_I830(dev
);
898 * intel_lvds_init - setup LVDS connectors on this device
901 * Create the connector, register the LVDS DDC bus, and try to figure out what
902 * modes we can display on the LVDS panel (if present).
904 bool intel_lvds_init(struct drm_device
*dev
)
906 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
907 struct intel_lvds
*intel_lvds
;
908 struct intel_encoder
*intel_encoder
;
909 struct intel_connector
*intel_connector
;
910 struct drm_connector
*connector
;
911 struct drm_encoder
*encoder
;
912 struct drm_display_mode
*scan
; /* *modes, *bios_mode; */
913 struct drm_crtc
*crtc
;
918 if (!intel_lvds_supported(dev
))
921 /* Skip init on machines we know falsely report LVDS */
922 if (dmi_check_system(intel_no_lvds
))
925 pin
= GMBUS_PORT_PANEL
;
926 if (!lvds_is_present_in_vbt(dev
, &pin
)) {
927 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
931 if (HAS_PCH_SPLIT(dev
)) {
932 if ((I915_READ(PCH_LVDS
) & LVDS_DETECTED
) == 0)
934 if (dev_priv
->edp
.support
) {
935 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
940 intel_lvds
= kzalloc(sizeof(struct intel_lvds
), GFP_KERNEL
);
945 intel_connector
= kzalloc(sizeof(struct intel_connector
), GFP_KERNEL
);
946 if (!intel_connector
) {
951 if (!HAS_PCH_SPLIT(dev
)) {
952 intel_lvds
->pfit_control
= I915_READ(PFIT_CONTROL
);
955 intel_encoder
= &intel_lvds
->base
;
956 encoder
= &intel_encoder
->base
;
957 connector
= &intel_connector
->base
;
958 drm_connector_init(dev
, &intel_connector
->base
, &intel_lvds_connector_funcs
,
959 DRM_MODE_CONNECTOR_LVDS
);
961 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_lvds_enc_funcs
,
962 DRM_MODE_ENCODER_LVDS
);
964 intel_encoder
->enable
= intel_enable_lvds
;
965 intel_encoder
->disable
= intel_disable_lvds
;
966 intel_encoder
->get_hw_state
= intel_lvds_get_hw_state
;
967 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
969 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
970 intel_encoder
->type
= INTEL_OUTPUT_LVDS
;
972 intel_encoder
->cloneable
= false;
973 if (HAS_PCH_SPLIT(dev
))
974 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
975 else if (IS_GEN4(dev
))
976 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
978 intel_encoder
->crtc_mask
= (1 << 1);
980 drm_encoder_helper_add(encoder
, &intel_lvds_helper_funcs
);
981 drm_connector_helper_add(connector
, &intel_lvds_connector_helper_funcs
);
982 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
983 connector
->interlace_allowed
= false;
984 connector
->doublescan_allowed
= false;
986 /* create the scaling mode property */
987 drm_mode_create_scaling_mode_property(dev
);
989 * the initial panel fitting mode will be FULL_SCREEN.
992 drm_connector_attach_property(&intel_connector
->base
,
993 dev
->mode_config
.scaling_mode_property
,
994 DRM_MODE_SCALE_ASPECT
);
995 intel_lvds
->fitting_mode
= DRM_MODE_SCALE_ASPECT
;
998 * 1) check for EDID on DDC
999 * 2) check for VBT data
1000 * 3) check to see if LVDS is already on
1001 * if none of the above, no panel
1002 * 4) make sure lid is open
1003 * if closed, act like it's not there for now
1007 * Attempt to get the fixed panel mode from DDC. Assume that the
1008 * preferred mode is the right one.
1010 intel_lvds
->edid
= drm_get_edid(connector
,
1011 intel_gmbus_get_adapter(dev_priv
,
1013 if (intel_lvds
->edid
) {
1014 if (drm_add_edid_modes(connector
,
1015 intel_lvds
->edid
)) {
1016 drm_mode_connector_update_edid_property(connector
,
1019 kfree(intel_lvds
->edid
);
1020 intel_lvds
->edid
= NULL
;
1023 if (!intel_lvds
->edid
) {
1024 /* Didn't get an EDID, so
1025 * Set wide sync ranges so we get all modes
1026 * handed to valid_mode for checking
1028 connector
->display_info
.min_vfreq
= 0;
1029 connector
->display_info
.max_vfreq
= 200;
1030 connector
->display_info
.min_hfreq
= 0;
1031 connector
->display_info
.max_hfreq
= 200;
1034 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
1035 if (scan
->type
& DRM_MODE_TYPE_PREFERRED
) {
1036 intel_lvds
->fixed_mode
=
1037 drm_mode_duplicate(dev
, scan
);
1038 intel_find_lvds_downclock(dev
,
1039 intel_lvds
->fixed_mode
,
1045 /* Failed to get EDID, what about VBT? */
1046 if (dev_priv
->lfp_lvds_vbt_mode
) {
1047 intel_lvds
->fixed_mode
=
1048 drm_mode_duplicate(dev
, dev_priv
->lfp_lvds_vbt_mode
);
1049 if (intel_lvds
->fixed_mode
) {
1050 intel_lvds
->fixed_mode
->type
|=
1051 DRM_MODE_TYPE_PREFERRED
;
1057 * If we didn't get EDID, try checking if the panel is already turned
1058 * on. If so, assume that whatever is currently programmed is the
1062 /* Ironlake: FIXME if still fail, not try pipe mode now */
1063 if (HAS_PCH_SPLIT(dev
))
1066 lvds
= I915_READ(LVDS
);
1067 pipe
= (lvds
& LVDS_PIPEB_SELECT
) ? 1 : 0;
1068 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
1070 if (crtc
&& (lvds
& LVDS_PORT_EN
)) {
1071 intel_lvds
->fixed_mode
= intel_crtc_mode_get(dev
, crtc
);
1072 if (intel_lvds
->fixed_mode
) {
1073 intel_lvds
->fixed_mode
->type
|=
1074 DRM_MODE_TYPE_PREFERRED
;
1079 /* If we still don't have a mode after all that, give up. */
1080 if (!intel_lvds
->fixed_mode
)
1085 * Unlock registers and just
1086 * leave them unlocked
1088 if (HAS_PCH_SPLIT(dev
)) {
1089 I915_WRITE(PCH_PP_CONTROL
,
1090 I915_READ(PCH_PP_CONTROL
) | PANEL_UNLOCK_REGS
);
1092 I915_WRITE(PP_CONTROL
,
1093 I915_READ(PP_CONTROL
) | PANEL_UNLOCK_REGS
);
1095 dev_priv
->lid_notifier
.notifier_call
= intel_lid_notify
;
1096 if (acpi_lid_notifier_register(&dev_priv
->lid_notifier
)) {
1097 DRM_DEBUG_KMS("lid notifier registration failed\n");
1098 dev_priv
->lid_notifier
.notifier_call
= NULL
;
1100 /* keep the LVDS connector */
1101 dev_priv
->int_lvds_connector
= connector
;
1102 drm_sysfs_connector_add(connector
);
1104 intel_panel_setup_backlight(dev
);
1109 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1110 drm_connector_cleanup(connector
);
1111 drm_encoder_cleanup(encoder
);
1113 kfree(intel_connector
);