2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
35 #include <drm/drm_atomic_helper.h>
36 #include <drm/drm_crtc.h>
37 #include <drm/drm_edid.h>
38 #include "intel_drv.h"
39 #include <drm/i915_drm.h>
41 #include <linux/acpi.h>
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_connector
{
45 struct intel_connector base
;
47 struct notifier_block lid_notifier
;
50 struct intel_lvds_encoder
{
51 struct intel_encoder base
;
57 struct intel_lvds_connector
*attached_connector
;
60 static struct intel_lvds_encoder
*to_lvds_encoder(struct drm_encoder
*encoder
)
62 return container_of(encoder
, struct intel_lvds_encoder
, base
.base
);
65 static struct intel_lvds_connector
*to_lvds_connector(struct drm_connector
*connector
)
67 return container_of(connector
, struct intel_lvds_connector
, base
.base
);
70 static bool intel_lvds_get_hw_state(struct intel_encoder
*encoder
,
73 struct drm_device
*dev
= encoder
->base
.dev
;
74 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
75 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
76 enum intel_display_power_domain power_domain
;
79 power_domain
= intel_display_port_power_domain(encoder
);
80 if (!intel_display_power_is_enabled(dev_priv
, power_domain
))
83 tmp
= I915_READ(lvds_encoder
->reg
);
85 if (!(tmp
& LVDS_PORT_EN
))
89 *pipe
= PORT_TO_PIPE_CPT(tmp
);
91 *pipe
= PORT_TO_PIPE(tmp
);
96 static void intel_lvds_get_config(struct intel_encoder
*encoder
,
97 struct intel_crtc_state
*pipe_config
)
99 struct drm_device
*dev
= encoder
->base
.dev
;
100 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
101 u32 lvds_reg
, tmp
, flags
= 0;
104 if (HAS_PCH_SPLIT(dev
))
109 tmp
= I915_READ(lvds_reg
);
110 if (tmp
& LVDS_HSYNC_POLARITY
)
111 flags
|= DRM_MODE_FLAG_NHSYNC
;
113 flags
|= DRM_MODE_FLAG_PHSYNC
;
114 if (tmp
& LVDS_VSYNC_POLARITY
)
115 flags
|= DRM_MODE_FLAG_NVSYNC
;
117 flags
|= DRM_MODE_FLAG_PVSYNC
;
119 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
121 /* gen2/3 store dither state in pfit control, needs to match */
122 if (INTEL_INFO(dev
)->gen
< 4) {
123 tmp
= I915_READ(PFIT_CONTROL
);
125 pipe_config
->gmch_pfit
.control
|= tmp
& PANEL_8TO6_DITHER_ENABLE
;
128 dotclock
= pipe_config
->port_clock
;
130 if (HAS_PCH_SPLIT(dev_priv
->dev
))
131 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
133 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
136 static void intel_pre_enable_lvds(struct intel_encoder
*encoder
)
138 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
139 struct drm_device
*dev
= encoder
->base
.dev
;
140 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
141 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
142 const struct drm_display_mode
*adjusted_mode
=
143 &crtc
->config
->base
.adjusted_mode
;
144 int pipe
= crtc
->pipe
;
147 if (HAS_PCH_SPLIT(dev
)) {
148 assert_fdi_rx_pll_disabled(dev_priv
, pipe
);
149 assert_shared_dpll_disabled(dev_priv
,
150 intel_crtc_to_shared_dpll(crtc
));
152 assert_pll_disabled(dev_priv
, pipe
);
155 temp
= I915_READ(lvds_encoder
->reg
);
156 temp
|= LVDS_PORT_EN
| LVDS_A0A2_CLKA_POWER_UP
;
158 if (HAS_PCH_CPT(dev
)) {
159 temp
&= ~PORT_TRANS_SEL_MASK
;
160 temp
|= PORT_TRANS_SEL_CPT(pipe
);
163 temp
|= LVDS_PIPEB_SELECT
;
165 temp
&= ~LVDS_PIPEB_SELECT
;
169 /* set the corresponsding LVDS_BORDER bit */
170 temp
&= ~LVDS_BORDER_ENABLE
;
171 temp
|= crtc
->config
->gmch_pfit
.lvds_border_bits
;
172 /* Set the B0-B3 data pairs corresponding to whether we're going to
173 * set the DPLLs for dual-channel mode or not.
175 if (lvds_encoder
->is_dual_link
)
176 temp
|= LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
;
178 temp
&= ~(LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
);
180 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
181 * appropriately here, but we need to look more thoroughly into how
182 * panels behave in the two modes. For now, let's just maintain the
183 * value we got from the BIOS.
185 temp
&= ~LVDS_A3_POWER_MASK
;
186 temp
|= lvds_encoder
->a3_power
;
188 /* Set the dithering flag on LVDS as needed, note that there is no
189 * special lvds dither control bit on pch-split platforms, dithering is
190 * only controlled through the PIPECONF reg. */
191 if (INTEL_INFO(dev
)->gen
== 4) {
192 /* Bspec wording suggests that LVDS port dithering only exists
193 * for 18bpp panels. */
194 if (crtc
->config
->dither
&& crtc
->config
->pipe_bpp
== 18)
195 temp
|= LVDS_ENABLE_DITHER
;
197 temp
&= ~LVDS_ENABLE_DITHER
;
199 temp
&= ~(LVDS_HSYNC_POLARITY
| LVDS_VSYNC_POLARITY
);
200 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
201 temp
|= LVDS_HSYNC_POLARITY
;
202 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
203 temp
|= LVDS_VSYNC_POLARITY
;
205 I915_WRITE(lvds_encoder
->reg
, temp
);
209 * Sets the power state for the panel.
211 static void intel_enable_lvds(struct intel_encoder
*encoder
)
213 struct drm_device
*dev
= encoder
->base
.dev
;
214 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
215 struct intel_connector
*intel_connector
=
216 &lvds_encoder
->attached_connector
->base
;
217 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
218 u32 ctl_reg
, stat_reg
;
220 if (HAS_PCH_SPLIT(dev
)) {
221 ctl_reg
= PCH_PP_CONTROL
;
222 stat_reg
= PCH_PP_STATUS
;
224 ctl_reg
= PP_CONTROL
;
225 stat_reg
= PP_STATUS
;
228 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) | LVDS_PORT_EN
);
230 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) | POWER_TARGET_ON
);
231 POSTING_READ(lvds_encoder
->reg
);
232 if (wait_for((I915_READ(stat_reg
) & PP_ON
) != 0, 1000))
233 DRM_ERROR("timed out waiting for panel to power on\n");
235 intel_panel_enable_backlight(intel_connector
);
238 static void intel_disable_lvds(struct intel_encoder
*encoder
)
240 struct drm_device
*dev
= encoder
->base
.dev
;
241 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
242 struct intel_connector
*intel_connector
=
243 &lvds_encoder
->attached_connector
->base
;
244 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
245 u32 ctl_reg
, stat_reg
;
247 if (HAS_PCH_SPLIT(dev
)) {
248 ctl_reg
= PCH_PP_CONTROL
;
249 stat_reg
= PCH_PP_STATUS
;
251 ctl_reg
= PP_CONTROL
;
252 stat_reg
= PP_STATUS
;
255 intel_panel_disable_backlight(intel_connector
);
257 I915_WRITE(ctl_reg
, I915_READ(ctl_reg
) & ~POWER_TARGET_ON
);
258 if (wait_for((I915_READ(stat_reg
) & PP_ON
) == 0, 1000))
259 DRM_ERROR("timed out waiting for panel to power off\n");
261 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) & ~LVDS_PORT_EN
);
262 POSTING_READ(lvds_encoder
->reg
);
265 static enum drm_mode_status
266 intel_lvds_mode_valid(struct drm_connector
*connector
,
267 struct drm_display_mode
*mode
)
269 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
270 struct drm_display_mode
*fixed_mode
= intel_connector
->panel
.fixed_mode
;
272 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
274 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
280 static bool intel_lvds_compute_config(struct intel_encoder
*intel_encoder
,
281 struct intel_crtc_state
*pipe_config
)
283 struct drm_device
*dev
= intel_encoder
->base
.dev
;
284 struct intel_lvds_encoder
*lvds_encoder
=
285 to_lvds_encoder(&intel_encoder
->base
);
286 struct intel_connector
*intel_connector
=
287 &lvds_encoder
->attached_connector
->base
;
288 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
289 struct intel_crtc
*intel_crtc
= lvds_encoder
->base
.new_crtc
;
290 unsigned int lvds_bpp
;
292 /* Should never happen!! */
293 if (INTEL_INFO(dev
)->gen
< 4 && intel_crtc
->pipe
== 0) {
294 DRM_ERROR("Can't support LVDS on pipe A\n");
298 if (lvds_encoder
->a3_power
== LVDS_A3_POWER_UP
)
303 if (lvds_bpp
!= pipe_config
->pipe_bpp
&& !pipe_config
->bw_constrained
) {
304 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
305 pipe_config
->pipe_bpp
, lvds_bpp
);
306 pipe_config
->pipe_bpp
= lvds_bpp
;
310 * We have timings from the BIOS for the panel, put them in
311 * to the adjusted mode. The CRTC will be set up for this mode,
312 * with the panel scaling set up to source from the H/VDisplay
313 * of the original mode.
315 intel_fixed_panel_mode(intel_connector
->panel
.fixed_mode
,
318 if (HAS_PCH_SPLIT(dev
)) {
319 pipe_config
->has_pch_encoder
= true;
321 intel_pch_panel_fitting(intel_crtc
, pipe_config
,
322 intel_connector
->panel
.fitting_mode
);
324 intel_gmch_panel_fitting(intel_crtc
, pipe_config
,
325 intel_connector
->panel
.fitting_mode
);
330 * XXX: It would be nice to support lower refresh rates on the
331 * panels to reduce power consumption, and perhaps match the
332 * user's requested refresh rate.
339 * Detect the LVDS connection.
341 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
342 * connected and closed means disconnected. We also send hotplug events as
343 * needed, using lid status notification from the input layer.
345 static enum drm_connector_status
346 intel_lvds_detect(struct drm_connector
*connector
, bool force
)
348 struct drm_device
*dev
= connector
->dev
;
349 enum drm_connector_status status
;
351 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
352 connector
->base
.id
, connector
->name
);
354 status
= intel_panel_detect(dev
);
355 if (status
!= connector_status_unknown
)
358 return connector_status_connected
;
362 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
364 static int intel_lvds_get_modes(struct drm_connector
*connector
)
366 struct intel_lvds_connector
*lvds_connector
= to_lvds_connector(connector
);
367 struct drm_device
*dev
= connector
->dev
;
368 struct drm_display_mode
*mode
;
370 /* use cached edid if we have one */
371 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
372 return drm_add_edid_modes(connector
, lvds_connector
->base
.edid
);
374 mode
= drm_mode_duplicate(dev
, lvds_connector
->base
.panel
.fixed_mode
);
378 drm_mode_probed_add(connector
, mode
);
382 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id
*id
)
384 DRM_INFO("Skipping forced modeset for %s\n", id
->ident
);
388 /* The GPU hangs up on these systems if modeset is performed on LID open */
389 static const struct dmi_system_id intel_no_modeset_on_lid
[] = {
391 .callback
= intel_no_modeset_on_lid_dmi_callback
,
392 .ident
= "Toshiba Tecra A11",
394 DMI_MATCH(DMI_SYS_VENDOR
, "TOSHIBA"),
395 DMI_MATCH(DMI_PRODUCT_NAME
, "TECRA A11"),
399 { } /* terminating entry */
403 * Lid events. Note the use of 'modeset':
404 * - we set it to MODESET_ON_LID_OPEN on lid close,
405 * and set it to MODESET_DONE on open
406 * - we use it as a "only once" bit (ie we ignore
407 * duplicate events where it was already properly set)
408 * - the suspend/resume paths will set it to
409 * MODESET_SUSPENDED and ignore the lid open event,
410 * because they restore the mode ("lid open").
412 static int intel_lid_notify(struct notifier_block
*nb
, unsigned long val
,
415 struct intel_lvds_connector
*lvds_connector
=
416 container_of(nb
, struct intel_lvds_connector
, lid_notifier
);
417 struct drm_connector
*connector
= &lvds_connector
->base
.base
;
418 struct drm_device
*dev
= connector
->dev
;
419 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
421 if (dev
->switch_power_state
!= DRM_SWITCH_POWER_ON
)
424 mutex_lock(&dev_priv
->modeset_restore_lock
);
425 if (dev_priv
->modeset_restore
== MODESET_SUSPENDED
)
428 * check and update the status of LVDS connector after receiving
429 * the LID nofication event.
431 connector
->status
= connector
->funcs
->detect(connector
, false);
433 /* Don't force modeset on machines where it causes a GPU lockup */
434 if (dmi_check_system(intel_no_modeset_on_lid
))
436 if (!acpi_lid_open()) {
437 /* do modeset on next lid open event */
438 dev_priv
->modeset_restore
= MODESET_ON_LID_OPEN
;
442 if (dev_priv
->modeset_restore
== MODESET_DONE
)
446 * Some old platform's BIOS love to wreak havoc while the lid is closed.
447 * We try to detect this here and undo any damage. The split for PCH
448 * platforms is rather conservative and a bit arbitrary expect that on
449 * those platforms VGA disabling requires actual legacy VGA I/O access,
450 * and as part of the cleanup in the hw state restore we also redisable
453 if (!HAS_PCH_SPLIT(dev
)) {
454 drm_modeset_lock_all(dev
);
455 intel_modeset_setup_hw_state(dev
, true);
456 drm_modeset_unlock_all(dev
);
459 dev_priv
->modeset_restore
= MODESET_DONE
;
462 mutex_unlock(&dev_priv
->modeset_restore_lock
);
467 * intel_lvds_destroy - unregister and free LVDS structures
468 * @connector: connector to free
470 * Unregister the DDC bus for this connector then free the driver private
473 static void intel_lvds_destroy(struct drm_connector
*connector
)
475 struct intel_lvds_connector
*lvds_connector
=
476 to_lvds_connector(connector
);
478 if (lvds_connector
->lid_notifier
.notifier_call
)
479 acpi_lid_notifier_unregister(&lvds_connector
->lid_notifier
);
481 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
482 kfree(lvds_connector
->base
.edid
);
484 intel_panel_fini(&lvds_connector
->base
.panel
);
486 drm_connector_cleanup(connector
);
490 static int intel_lvds_set_property(struct drm_connector
*connector
,
491 struct drm_property
*property
,
494 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
495 struct drm_device
*dev
= connector
->dev
;
497 if (property
== dev
->mode_config
.scaling_mode_property
) {
498 struct drm_crtc
*crtc
;
500 if (value
== DRM_MODE_SCALE_NONE
) {
501 DRM_DEBUG_KMS("no scaling not supported\n");
505 if (intel_connector
->panel
.fitting_mode
== value
) {
506 /* the LVDS scaling property is not changed */
509 intel_connector
->panel
.fitting_mode
= value
;
511 crtc
= intel_attached_encoder(connector
)->base
.crtc
;
512 if (crtc
&& crtc
->enabled
) {
514 * If the CRTC is enabled, the display will be changed
515 * according to the new panel fitting mode.
517 intel_crtc_restore_mode(crtc
);
524 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
= {
525 .get_modes
= intel_lvds_get_modes
,
526 .mode_valid
= intel_lvds_mode_valid
,
527 .best_encoder
= intel_best_encoder
,
530 static const struct drm_connector_funcs intel_lvds_connector_funcs
= {
531 .dpms
= intel_connector_dpms
,
532 .detect
= intel_lvds_detect
,
533 .fill_modes
= drm_helper_probe_single_connector_modes
,
534 .set_property
= intel_lvds_set_property
,
535 .destroy
= intel_lvds_destroy
,
536 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
539 static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
540 .destroy
= intel_encoder_destroy
,
543 static int intel_no_lvds_dmi_callback(const struct dmi_system_id
*id
)
545 DRM_INFO("Skipping LVDS initialization for %s\n", id
->ident
);
549 /* These systems claim to have LVDS, but really don't */
550 static const struct dmi_system_id intel_no_lvds
[] = {
552 .callback
= intel_no_lvds_dmi_callback
,
553 .ident
= "Apple Mac Mini (Core series)",
555 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
556 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini1,1"),
560 .callback
= intel_no_lvds_dmi_callback
,
561 .ident
= "Apple Mac Mini (Core 2 series)",
563 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
564 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini2,1"),
568 .callback
= intel_no_lvds_dmi_callback
,
569 .ident
= "MSI IM-945GSE-A",
571 DMI_MATCH(DMI_SYS_VENDOR
, "MSI"),
572 DMI_MATCH(DMI_PRODUCT_NAME
, "A9830IMS"),
576 .callback
= intel_no_lvds_dmi_callback
,
577 .ident
= "Dell Studio Hybrid",
579 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
580 DMI_MATCH(DMI_PRODUCT_NAME
, "Studio Hybrid 140g"),
584 .callback
= intel_no_lvds_dmi_callback
,
585 .ident
= "Dell OptiPlex FX170",
587 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
588 DMI_MATCH(DMI_PRODUCT_NAME
, "OptiPlex FX170"),
592 .callback
= intel_no_lvds_dmi_callback
,
593 .ident
= "AOpen Mini PC",
595 DMI_MATCH(DMI_SYS_VENDOR
, "AOpen"),
596 DMI_MATCH(DMI_PRODUCT_NAME
, "i965GMx-IF"),
600 .callback
= intel_no_lvds_dmi_callback
,
601 .ident
= "AOpen Mini PC MP915",
603 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
604 DMI_MATCH(DMI_BOARD_NAME
, "i915GMx-F"),
608 .callback
= intel_no_lvds_dmi_callback
,
609 .ident
= "AOpen i915GMm-HFS",
611 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
612 DMI_MATCH(DMI_BOARD_NAME
, "i915GMm-HFS"),
616 .callback
= intel_no_lvds_dmi_callback
,
617 .ident
= "AOpen i45GMx-I",
619 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
620 DMI_MATCH(DMI_BOARD_NAME
, "i45GMx-I"),
624 .callback
= intel_no_lvds_dmi_callback
,
625 .ident
= "Aopen i945GTt-VFA",
627 DMI_MATCH(DMI_PRODUCT_VERSION
, "AO00001JW"),
631 .callback
= intel_no_lvds_dmi_callback
,
632 .ident
= "Clientron U800",
634 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
635 DMI_MATCH(DMI_PRODUCT_NAME
, "U800"),
639 .callback
= intel_no_lvds_dmi_callback
,
640 .ident
= "Clientron E830",
642 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
643 DMI_MATCH(DMI_PRODUCT_NAME
, "E830"),
647 .callback
= intel_no_lvds_dmi_callback
,
648 .ident
= "Asus EeeBox PC EB1007",
650 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer INC."),
651 DMI_MATCH(DMI_PRODUCT_NAME
, "EB1007"),
655 .callback
= intel_no_lvds_dmi_callback
,
656 .ident
= "Asus AT5NM10T-I",
658 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK Computer INC."),
659 DMI_MATCH(DMI_BOARD_NAME
, "AT5NM10T-I"),
663 .callback
= intel_no_lvds_dmi_callback
,
664 .ident
= "Hewlett-Packard HP t5740",
666 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
667 DMI_MATCH(DMI_PRODUCT_NAME
, " t5740"),
671 .callback
= intel_no_lvds_dmi_callback
,
672 .ident
= "Hewlett-Packard t5745",
674 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
675 DMI_MATCH(DMI_PRODUCT_NAME
, "hp t5745"),
679 .callback
= intel_no_lvds_dmi_callback
,
680 .ident
= "Hewlett-Packard st5747",
682 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
683 DMI_MATCH(DMI_PRODUCT_NAME
, "hp st5747"),
687 .callback
= intel_no_lvds_dmi_callback
,
688 .ident
= "MSI Wind Box DC500",
690 DMI_MATCH(DMI_BOARD_VENDOR
, "MICRO-STAR INTERNATIONAL CO., LTD"),
691 DMI_MATCH(DMI_BOARD_NAME
, "MS-7469"),
695 .callback
= intel_no_lvds_dmi_callback
,
696 .ident
= "Gigabyte GA-D525TUD",
698 DMI_MATCH(DMI_BOARD_VENDOR
, "Gigabyte Technology Co., Ltd."),
699 DMI_MATCH(DMI_BOARD_NAME
, "D525TUD"),
703 .callback
= intel_no_lvds_dmi_callback
,
704 .ident
= "Supermicro X7SPA-H",
706 DMI_MATCH(DMI_SYS_VENDOR
, "Supermicro"),
707 DMI_MATCH(DMI_PRODUCT_NAME
, "X7SPA-H"),
711 .callback
= intel_no_lvds_dmi_callback
,
712 .ident
= "Fujitsu Esprimo Q900",
714 DMI_MATCH(DMI_SYS_VENDOR
, "FUJITSU"),
715 DMI_MATCH(DMI_PRODUCT_NAME
, "ESPRIMO Q900"),
719 .callback
= intel_no_lvds_dmi_callback
,
720 .ident
= "Intel D410PT",
722 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
723 DMI_MATCH(DMI_BOARD_NAME
, "D410PT"),
727 .callback
= intel_no_lvds_dmi_callback
,
728 .ident
= "Intel D425KT",
730 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
731 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D425KT"),
735 .callback
= intel_no_lvds_dmi_callback
,
736 .ident
= "Intel D510MO",
738 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
739 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D510MO"),
743 .callback
= intel_no_lvds_dmi_callback
,
744 .ident
= "Intel D525MW",
746 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
747 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D525MW"),
751 { } /* terminating entry */
755 * Enumerate the child dev array parsed from VBT to check whether
756 * the LVDS is present.
757 * If it is present, return 1.
758 * If it is not present, return false.
759 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
761 static bool lvds_is_present_in_vbt(struct drm_device
*dev
,
764 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
767 if (!dev_priv
->vbt
.child_dev_num
)
770 for (i
= 0; i
< dev_priv
->vbt
.child_dev_num
; i
++) {
771 union child_device_config
*uchild
= dev_priv
->vbt
.child_dev
+ i
;
772 struct old_child_dev_config
*child
= &uchild
->old
;
774 /* If the device type is not LFP, continue.
775 * We have to check both the new identifiers as well as the
776 * old for compatibility with some BIOSes.
778 if (child
->device_type
!= DEVICE_TYPE_INT_LFP
&&
779 child
->device_type
!= DEVICE_TYPE_LFP
)
782 if (intel_gmbus_is_port_valid(child
->i2c_pin
))
783 *i2c_pin
= child
->i2c_pin
;
785 /* However, we cannot trust the BIOS writers to populate
786 * the VBT correctly. Since LVDS requires additional
787 * information from AIM blocks, a non-zero addin offset is
788 * a good indicator that the LVDS is actually present.
790 if (child
->addin_offset
)
793 /* But even then some BIOS writers perform some black magic
794 * and instantiate the device without reference to any
795 * additional data. Trust that if the VBT was written into
796 * the OpRegion then they have validated the LVDS's existence.
798 if (dev_priv
->opregion
.vbt
)
805 static int intel_dual_link_lvds_callback(const struct dmi_system_id
*id
)
807 DRM_INFO("Forcing lvds to dual link mode on %s\n", id
->ident
);
811 static const struct dmi_system_id intel_dual_link_lvds
[] = {
813 .callback
= intel_dual_link_lvds_callback
,
814 .ident
= "Apple MacBook Pro (Core i5/i7 Series)",
816 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
817 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro8,2"),
820 { } /* terminating entry */
823 bool intel_is_dual_link_lvds(struct drm_device
*dev
)
825 struct intel_encoder
*encoder
;
826 struct intel_lvds_encoder
*lvds_encoder
;
828 for_each_intel_encoder(dev
, encoder
) {
829 if (encoder
->type
== INTEL_OUTPUT_LVDS
) {
830 lvds_encoder
= to_lvds_encoder(&encoder
->base
);
832 return lvds_encoder
->is_dual_link
;
839 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder
*lvds_encoder
)
841 struct drm_device
*dev
= lvds_encoder
->base
.base
.dev
;
843 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
845 /* use the module option value if specified */
846 if (i915
.lvds_channel_mode
> 0)
847 return i915
.lvds_channel_mode
== 2;
849 if (dmi_check_system(intel_dual_link_lvds
))
852 /* BIOS should set the proper LVDS register value at boot, but
853 * in reality, it doesn't set the value when the lid is closed;
854 * we need to check "the value to be set" in VBT when LVDS
855 * register is uninitialized.
857 val
= I915_READ(lvds_encoder
->reg
);
858 if (!(val
& ~(LVDS_PIPE_MASK
| LVDS_DETECTED
)))
859 val
= dev_priv
->vbt
.bios_lvds_val
;
861 return (val
& LVDS_CLKB_POWER_MASK
) == LVDS_CLKB_POWER_UP
;
864 static bool intel_lvds_supported(struct drm_device
*dev
)
866 /* With the introduction of the PCH we gained a dedicated
867 * LVDS presence pin, use it. */
868 if (HAS_PCH_IBX(dev
) || HAS_PCH_CPT(dev
))
871 /* Otherwise LVDS was only attached to mobile products,
872 * except for the inglorious 830gm */
873 if (INTEL_INFO(dev
)->gen
<= 4 && IS_MOBILE(dev
) && !IS_I830(dev
))
880 * intel_lvds_init - setup LVDS connectors on this device
883 * Create the connector, register the LVDS DDC bus, and try to figure out what
884 * modes we can display on the LVDS panel (if present).
886 void intel_lvds_init(struct drm_device
*dev
)
888 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
889 struct intel_lvds_encoder
*lvds_encoder
;
890 struct intel_encoder
*intel_encoder
;
891 struct intel_lvds_connector
*lvds_connector
;
892 struct intel_connector
*intel_connector
;
893 struct drm_connector
*connector
;
894 struct drm_encoder
*encoder
;
895 struct drm_display_mode
*scan
; /* *modes, *bios_mode; */
896 struct drm_display_mode
*fixed_mode
= NULL
;
897 struct drm_display_mode
*downclock_mode
= NULL
;
899 struct drm_crtc
*crtc
;
905 * Unlock registers and just leave them unlocked. Do this before
906 * checking quirk lists to avoid bogus WARNINGs.
908 if (HAS_PCH_SPLIT(dev
)) {
909 I915_WRITE(PCH_PP_CONTROL
,
910 I915_READ(PCH_PP_CONTROL
) | PANEL_UNLOCK_REGS
);
912 I915_WRITE(PP_CONTROL
,
913 I915_READ(PP_CONTROL
) | PANEL_UNLOCK_REGS
);
915 if (!intel_lvds_supported(dev
))
918 /* Skip init on machines we know falsely report LVDS */
919 if (dmi_check_system(intel_no_lvds
))
922 pin
= GMBUS_PORT_PANEL
;
923 if (!lvds_is_present_in_vbt(dev
, &pin
)) {
924 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
928 if (HAS_PCH_SPLIT(dev
)) {
929 if ((I915_READ(PCH_LVDS
) & LVDS_DETECTED
) == 0)
931 if (dev_priv
->vbt
.edp_support
) {
932 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
937 lvds_encoder
= kzalloc(sizeof(*lvds_encoder
), GFP_KERNEL
);
941 lvds_connector
= kzalloc(sizeof(*lvds_connector
), GFP_KERNEL
);
942 if (!lvds_connector
) {
947 lvds_encoder
->attached_connector
= lvds_connector
;
949 intel_encoder
= &lvds_encoder
->base
;
950 encoder
= &intel_encoder
->base
;
951 intel_connector
= &lvds_connector
->base
;
952 connector
= &intel_connector
->base
;
953 drm_connector_init(dev
, &intel_connector
->base
, &intel_lvds_connector_funcs
,
954 DRM_MODE_CONNECTOR_LVDS
);
956 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_lvds_enc_funcs
,
957 DRM_MODE_ENCODER_LVDS
);
959 intel_encoder
->enable
= intel_enable_lvds
;
960 intel_encoder
->pre_enable
= intel_pre_enable_lvds
;
961 intel_encoder
->compute_config
= intel_lvds_compute_config
;
962 intel_encoder
->disable
= intel_disable_lvds
;
963 intel_encoder
->get_hw_state
= intel_lvds_get_hw_state
;
964 intel_encoder
->get_config
= intel_lvds_get_config
;
965 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
966 intel_connector
->unregister
= intel_connector_unregister
;
968 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
969 intel_encoder
->type
= INTEL_OUTPUT_LVDS
;
971 intel_encoder
->cloneable
= 0;
972 if (HAS_PCH_SPLIT(dev
))
973 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
974 else if (IS_GEN4(dev
))
975 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
977 intel_encoder
->crtc_mask
= (1 << 1);
979 drm_connector_helper_add(connector
, &intel_lvds_connector_helper_funcs
);
980 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
981 connector
->interlace_allowed
= false;
982 connector
->doublescan_allowed
= false;
984 if (HAS_PCH_SPLIT(dev
)) {
985 lvds_encoder
->reg
= PCH_LVDS
;
987 lvds_encoder
->reg
= LVDS
;
990 /* create the scaling mode property */
991 drm_mode_create_scaling_mode_property(dev
);
992 drm_object_attach_property(&connector
->base
,
993 dev
->mode_config
.scaling_mode_property
,
994 DRM_MODE_SCALE_ASPECT
);
995 intel_connector
->panel
.fitting_mode
= DRM_MODE_SCALE_ASPECT
;
998 * 1) check for EDID on DDC
999 * 2) check for VBT data
1000 * 3) check to see if LVDS is already on
1001 * if none of the above, no panel
1002 * 4) make sure lid is open
1003 * if closed, act like it's not there for now
1007 * Attempt to get the fixed panel mode from DDC. Assume that the
1008 * preferred mode is the right one.
1010 mutex_lock(&dev
->mode_config
.mutex
);
1011 edid
= drm_get_edid(connector
, intel_gmbus_get_adapter(dev_priv
, pin
));
1013 if (drm_add_edid_modes(connector
, edid
)) {
1014 drm_mode_connector_update_edid_property(connector
,
1018 edid
= ERR_PTR(-EINVAL
);
1021 edid
= ERR_PTR(-ENOENT
);
1023 lvds_connector
->base
.edid
= edid
;
1025 if (IS_ERR_OR_NULL(edid
)) {
1026 /* Didn't get an EDID, so
1027 * Set wide sync ranges so we get all modes
1028 * handed to valid_mode for checking
1030 connector
->display_info
.min_vfreq
= 0;
1031 connector
->display_info
.max_vfreq
= 200;
1032 connector
->display_info
.min_hfreq
= 0;
1033 connector
->display_info
.max_hfreq
= 200;
1036 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
1037 if (scan
->type
& DRM_MODE_TYPE_PREFERRED
) {
1038 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1039 drm_mode_debug_printmodeline(scan
);
1041 fixed_mode
= drm_mode_duplicate(dev
, scan
);
1044 intel_find_panel_downclock(dev
,
1045 fixed_mode
, connector
);
1046 if (downclock_mode
!= NULL
&&
1047 i915
.lvds_downclock
) {
1048 /* We found the downclock for LVDS. */
1049 dev_priv
->lvds_downclock_avail
= true;
1050 dev_priv
->lvds_downclock
=
1051 downclock_mode
->clock
;
1052 DRM_DEBUG_KMS("LVDS downclock is found"
1053 " in EDID. Normal clock %dKhz, "
1054 "downclock %dKhz\n",
1056 dev_priv
->lvds_downclock
);
1063 /* Failed to get EDID, what about VBT? */
1064 if (dev_priv
->vbt
.lfp_lvds_vbt_mode
) {
1065 DRM_DEBUG_KMS("using mode from VBT: ");
1066 drm_mode_debug_printmodeline(dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1068 fixed_mode
= drm_mode_duplicate(dev
, dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1070 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1076 * If we didn't get EDID, try checking if the panel is already turned
1077 * on. If so, assume that whatever is currently programmed is the
1081 /* Ironlake: FIXME if still fail, not try pipe mode now */
1082 if (HAS_PCH_SPLIT(dev
))
1085 lvds
= I915_READ(LVDS
);
1086 pipe
= (lvds
& LVDS_PIPEB_SELECT
) ? 1 : 0;
1087 crtc
= intel_get_crtc_for_pipe(dev
, pipe
);
1089 if (crtc
&& (lvds
& LVDS_PORT_EN
)) {
1090 fixed_mode
= intel_crtc_mode_get(dev
, crtc
);
1092 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1093 drm_mode_debug_printmodeline(fixed_mode
);
1094 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1099 /* If we still don't have a mode after all that, give up. */
1104 mutex_unlock(&dev
->mode_config
.mutex
);
1106 lvds_encoder
->is_dual_link
= compute_is_dual_link_lvds(lvds_encoder
);
1107 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1108 lvds_encoder
->is_dual_link
? "dual" : "single");
1110 lvds_encoder
->a3_power
= I915_READ(lvds_encoder
->reg
) &
1113 lvds_connector
->lid_notifier
.notifier_call
= intel_lid_notify
;
1114 if (acpi_lid_notifier_register(&lvds_connector
->lid_notifier
)) {
1115 DRM_DEBUG_KMS("lid notifier registration failed\n");
1116 lvds_connector
->lid_notifier
.notifier_call
= NULL
;
1118 drm_connector_register(connector
);
1120 intel_panel_init(&intel_connector
->panel
, fixed_mode
, downclock_mode
);
1121 intel_panel_setup_backlight(connector
, INVALID_PIPE
);
1126 mutex_unlock(&dev
->mode_config
.mutex
);
1128 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1129 drm_connector_cleanup(connector
);
1130 drm_encoder_cleanup(encoder
);
1131 kfree(lvds_encoder
);
1132 kfree(lvds_connector
);