2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 #include <linux/moduleparam.h>
34 #include "intel_drv.h"
36 #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
39 intel_fixed_panel_mode(const struct drm_display_mode
*fixed_mode
,
40 struct drm_display_mode
*adjusted_mode
)
42 drm_mode_copy(adjusted_mode
, fixed_mode
);
44 drm_mode_set_crtcinfo(adjusted_mode
, 0);
47 /* adjusted_mode has been preset to be the panel's fixed mode */
49 intel_pch_panel_fitting(struct intel_crtc
*intel_crtc
,
50 struct intel_crtc_config
*pipe_config
,
53 struct drm_display_mode
*adjusted_mode
;
54 int x
, y
, width
, height
;
56 adjusted_mode
= &pipe_config
->adjusted_mode
;
58 x
= y
= width
= height
= 0;
60 /* Native modes don't need fitting */
61 if (adjusted_mode
->hdisplay
== pipe_config
->pipe_src_w
&&
62 adjusted_mode
->vdisplay
== pipe_config
->pipe_src_h
)
65 switch (fitting_mode
) {
66 case DRM_MODE_SCALE_CENTER
:
67 width
= pipe_config
->pipe_src_w
;
68 height
= pipe_config
->pipe_src_h
;
69 x
= (adjusted_mode
->hdisplay
- width
+ 1)/2;
70 y
= (adjusted_mode
->vdisplay
- height
+ 1)/2;
73 case DRM_MODE_SCALE_ASPECT
:
74 /* Scale but preserve the aspect ratio */
76 u32 scaled_width
= adjusted_mode
->hdisplay
77 * pipe_config
->pipe_src_h
;
78 u32 scaled_height
= pipe_config
->pipe_src_w
79 * adjusted_mode
->vdisplay
;
80 if (scaled_width
> scaled_height
) { /* pillar */
81 width
= scaled_height
/ pipe_config
->pipe_src_h
;
84 x
= (adjusted_mode
->hdisplay
- width
+ 1) / 2;
86 height
= adjusted_mode
->vdisplay
;
87 } else if (scaled_width
< scaled_height
) { /* letter */
88 height
= scaled_width
/ pipe_config
->pipe_src_w
;
91 y
= (adjusted_mode
->vdisplay
- height
+ 1) / 2;
93 width
= adjusted_mode
->hdisplay
;
96 width
= adjusted_mode
->hdisplay
;
97 height
= adjusted_mode
->vdisplay
;
102 case DRM_MODE_SCALE_FULLSCREEN
:
104 width
= adjusted_mode
->hdisplay
;
105 height
= adjusted_mode
->vdisplay
;
109 WARN(1, "bad panel fit mode: %d\n", fitting_mode
);
114 pipe_config
->pch_pfit
.pos
= (x
<< 16) | y
;
115 pipe_config
->pch_pfit
.size
= (width
<< 16) | height
;
116 pipe_config
->pch_pfit
.enabled
= pipe_config
->pch_pfit
.size
!= 0;
120 centre_horizontally(struct drm_display_mode
*mode
,
123 u32 border
, sync_pos
, blank_width
, sync_width
;
125 /* keep the hsync and hblank widths constant */
126 sync_width
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
127 blank_width
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
128 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
130 border
= (mode
->hdisplay
- width
+ 1) / 2;
131 border
+= border
& 1; /* make the border even */
133 mode
->crtc_hdisplay
= width
;
134 mode
->crtc_hblank_start
= width
+ border
;
135 mode
->crtc_hblank_end
= mode
->crtc_hblank_start
+ blank_width
;
137 mode
->crtc_hsync_start
= mode
->crtc_hblank_start
+ sync_pos
;
138 mode
->crtc_hsync_end
= mode
->crtc_hsync_start
+ sync_width
;
142 centre_vertically(struct drm_display_mode
*mode
,
145 u32 border
, sync_pos
, blank_width
, sync_width
;
147 /* keep the vsync and vblank widths constant */
148 sync_width
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
149 blank_width
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
150 sync_pos
= (blank_width
- sync_width
+ 1) / 2;
152 border
= (mode
->vdisplay
- height
+ 1) / 2;
154 mode
->crtc_vdisplay
= height
;
155 mode
->crtc_vblank_start
= height
+ border
;
156 mode
->crtc_vblank_end
= mode
->crtc_vblank_start
+ blank_width
;
158 mode
->crtc_vsync_start
= mode
->crtc_vblank_start
+ sync_pos
;
159 mode
->crtc_vsync_end
= mode
->crtc_vsync_start
+ sync_width
;
162 static inline u32
panel_fitter_scaling(u32 source
, u32 target
)
165 * Floating point operation is not supported. So the FACTOR
166 * is defined, which can avoid the floating point computation
167 * when calculating the panel ratio.
170 #define FACTOR (1 << ACCURACY)
171 u32 ratio
= source
* FACTOR
/ target
;
172 return (FACTOR
* ratio
+ FACTOR
/2) / FACTOR
;
175 static void i965_scale_aspect(struct intel_crtc_config
*pipe_config
,
178 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
179 u32 scaled_width
= adjusted_mode
->hdisplay
*
180 pipe_config
->pipe_src_h
;
181 u32 scaled_height
= pipe_config
->pipe_src_w
*
182 adjusted_mode
->vdisplay
;
184 /* 965+ is easy, it does everything in hw */
185 if (scaled_width
> scaled_height
)
186 *pfit_control
|= PFIT_ENABLE
|
188 else if (scaled_width
< scaled_height
)
189 *pfit_control
|= PFIT_ENABLE
|
191 else if (adjusted_mode
->hdisplay
!= pipe_config
->pipe_src_w
)
192 *pfit_control
|= PFIT_ENABLE
| PFIT_SCALING_AUTO
;
195 static void i9xx_scale_aspect(struct intel_crtc_config
*pipe_config
,
196 u32
*pfit_control
, u32
*pfit_pgm_ratios
,
199 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
200 u32 scaled_width
= adjusted_mode
->hdisplay
*
201 pipe_config
->pipe_src_h
;
202 u32 scaled_height
= pipe_config
->pipe_src_w
*
203 adjusted_mode
->vdisplay
;
207 * For earlier chips we have to calculate the scaling
208 * ratio by hand and program it into the
209 * PFIT_PGM_RATIO register
211 if (scaled_width
> scaled_height
) { /* pillar */
212 centre_horizontally(adjusted_mode
,
214 pipe_config
->pipe_src_h
);
216 *border
= LVDS_BORDER_ENABLE
;
217 if (pipe_config
->pipe_src_h
!= adjusted_mode
->vdisplay
) {
218 bits
= panel_fitter_scaling(pipe_config
->pipe_src_h
,
219 adjusted_mode
->vdisplay
);
221 *pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
222 bits
<< PFIT_VERT_SCALE_SHIFT
);
223 *pfit_control
|= (PFIT_ENABLE
|
224 VERT_INTERP_BILINEAR
|
225 HORIZ_INTERP_BILINEAR
);
227 } else if (scaled_width
< scaled_height
) { /* letter */
228 centre_vertically(adjusted_mode
,
230 pipe_config
->pipe_src_w
);
232 *border
= LVDS_BORDER_ENABLE
;
233 if (pipe_config
->pipe_src_w
!= adjusted_mode
->hdisplay
) {
234 bits
= panel_fitter_scaling(pipe_config
->pipe_src_w
,
235 adjusted_mode
->hdisplay
);
237 *pfit_pgm_ratios
|= (bits
<< PFIT_HORIZ_SCALE_SHIFT
|
238 bits
<< PFIT_VERT_SCALE_SHIFT
);
239 *pfit_control
|= (PFIT_ENABLE
|
240 VERT_INTERP_BILINEAR
|
241 HORIZ_INTERP_BILINEAR
);
244 /* Aspects match, Let hw scale both directions */
245 *pfit_control
|= (PFIT_ENABLE
|
246 VERT_AUTO_SCALE
| HORIZ_AUTO_SCALE
|
247 VERT_INTERP_BILINEAR
|
248 HORIZ_INTERP_BILINEAR
);
252 void intel_gmch_panel_fitting(struct intel_crtc
*intel_crtc
,
253 struct intel_crtc_config
*pipe_config
,
256 struct drm_device
*dev
= intel_crtc
->base
.dev
;
257 u32 pfit_control
= 0, pfit_pgm_ratios
= 0, border
= 0;
258 struct drm_display_mode
*adjusted_mode
;
260 adjusted_mode
= &pipe_config
->adjusted_mode
;
262 /* Native modes don't need fitting */
263 if (adjusted_mode
->hdisplay
== pipe_config
->pipe_src_w
&&
264 adjusted_mode
->vdisplay
== pipe_config
->pipe_src_h
)
267 switch (fitting_mode
) {
268 case DRM_MODE_SCALE_CENTER
:
270 * For centered modes, we have to calculate border widths &
271 * heights and modify the values programmed into the CRTC.
273 centre_horizontally(adjusted_mode
, pipe_config
->pipe_src_w
);
274 centre_vertically(adjusted_mode
, pipe_config
->pipe_src_h
);
275 border
= LVDS_BORDER_ENABLE
;
277 case DRM_MODE_SCALE_ASPECT
:
278 /* Scale but preserve the aspect ratio */
279 if (INTEL_INFO(dev
)->gen
>= 4)
280 i965_scale_aspect(pipe_config
, &pfit_control
);
282 i9xx_scale_aspect(pipe_config
, &pfit_control
,
283 &pfit_pgm_ratios
, &border
);
285 case DRM_MODE_SCALE_FULLSCREEN
:
287 * Full scaling, even if it changes the aspect ratio.
288 * Fortunately this is all done for us in hw.
290 if (pipe_config
->pipe_src_h
!= adjusted_mode
->vdisplay
||
291 pipe_config
->pipe_src_w
!= adjusted_mode
->hdisplay
) {
292 pfit_control
|= PFIT_ENABLE
;
293 if (INTEL_INFO(dev
)->gen
>= 4)
294 pfit_control
|= PFIT_SCALING_AUTO
;
296 pfit_control
|= (VERT_AUTO_SCALE
|
297 VERT_INTERP_BILINEAR
|
299 HORIZ_INTERP_BILINEAR
);
303 WARN(1, "bad panel fit mode: %d\n", fitting_mode
);
307 /* 965+ wants fuzzy fitting */
308 /* FIXME: handle multiple panels by failing gracefully */
309 if (INTEL_INFO(dev
)->gen
>= 4)
310 pfit_control
|= ((intel_crtc
->pipe
<< PFIT_PIPE_SHIFT
) |
314 if ((pfit_control
& PFIT_ENABLE
) == 0) {
319 /* Make sure pre-965 set dither correctly for 18bpp panels. */
320 if (INTEL_INFO(dev
)->gen
< 4 && pipe_config
->pipe_bpp
== 18)
321 pfit_control
|= PANEL_8TO6_DITHER_ENABLE
;
323 pipe_config
->gmch_pfit
.control
= pfit_control
;
324 pipe_config
->gmch_pfit
.pgm_ratios
= pfit_pgm_ratios
;
325 pipe_config
->gmch_pfit
.lvds_border_bits
= border
;
328 static int is_backlight_combination_mode(struct drm_device
*dev
)
330 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
333 return I915_READ(BLC_PWM_CTL2
) & BLM_COMBINATION_MODE
;
336 return I915_READ(BLC_PWM_CTL
) & BLM_LEGACY_MODE
;
341 /* XXX: query mode clock or hardware clock and program max PWM appropriately
344 static u32
i915_read_blc_pwm_ctl(struct drm_device
*dev
, enum pipe pipe
)
346 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
349 WARN_ON_SMP(!spin_is_locked(&dev_priv
->backlight
.lock
));
351 /* Restore the CTL value if it lost, e.g. GPU reset */
353 if (HAS_PCH_SPLIT(dev_priv
->dev
)) {
354 val
= I915_READ(BLC_PWM_PCH_CTL2
);
355 if (dev_priv
->regfile
.saveBLC_PWM_CTL2
== 0) {
356 dev_priv
->regfile
.saveBLC_PWM_CTL2
= val
;
357 } else if (val
== 0) {
358 val
= dev_priv
->regfile
.saveBLC_PWM_CTL2
;
359 I915_WRITE(BLC_PWM_PCH_CTL2
, val
);
362 val
= I915_READ(BLC_PWM_CTL
);
363 if (dev_priv
->regfile
.saveBLC_PWM_CTL
== 0) {
364 dev_priv
->regfile
.saveBLC_PWM_CTL
= val
;
365 if (INTEL_INFO(dev
)->gen
>= 4)
366 dev_priv
->regfile
.saveBLC_PWM_CTL2
=
367 I915_READ(BLC_PWM_CTL2
);
368 } else if (val
== 0) {
369 val
= dev_priv
->regfile
.saveBLC_PWM_CTL
;
370 I915_WRITE(BLC_PWM_CTL
, val
);
371 if (INTEL_INFO(dev
)->gen
>= 4)
372 I915_WRITE(BLC_PWM_CTL2
,
373 dev_priv
->regfile
.saveBLC_PWM_CTL2
);
376 if (IS_VALLEYVIEW(dev
) && !val
)
383 static u32
intel_panel_get_max_backlight(struct drm_device
*dev
,
388 max
= i915_read_blc_pwm_ctl(dev
, pipe
);
390 if (HAS_PCH_SPLIT(dev
)) {
393 if (INTEL_INFO(dev
)->gen
< 4)
398 if (is_backlight_combination_mode(dev
))
402 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max
);
407 static int i915_panel_invert_brightness
;
408 MODULE_PARM_DESC(invert_brightness
, "Invert backlight brightness "
409 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
410 "report PCI device ID, subsystem vendor and subsystem device ID "
411 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
412 "It will then be included in an upcoming module version.");
413 module_param_named(invert_brightness
, i915_panel_invert_brightness
, int, 0600);
414 static u32
intel_panel_compute_brightness(struct drm_device
*dev
,
415 enum pipe pipe
, u32 val
)
417 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
419 if (i915_panel_invert_brightness
< 0)
422 if (i915_panel_invert_brightness
> 0 ||
423 dev_priv
->quirks
& QUIRK_INVERT_BRIGHTNESS
) {
424 u32 max
= intel_panel_get_max_backlight(dev
, pipe
);
432 static u32
intel_panel_get_backlight(struct drm_device
*dev
,
435 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
439 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
441 if (HAS_PCH_SPLIT(dev
)) {
442 val
= I915_READ(BLC_PWM_CPU_CTL
) & BACKLIGHT_DUTY_CYCLE_MASK
;
444 val
= I915_READ(BLC_PWM_CTL
) & BACKLIGHT_DUTY_CYCLE_MASK
;
445 if (INTEL_INFO(dev
)->gen
< 4)
448 if (is_backlight_combination_mode(dev
)) {
451 pci_read_config_byte(dev
->pdev
, PCI_LBPC
, &lbpc
);
456 val
= intel_panel_compute_brightness(dev
, pipe
, val
);
458 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
460 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val
);
464 static void intel_pch_panel_set_backlight(struct drm_device
*dev
, u32 level
)
466 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
467 u32 val
= I915_READ(BLC_PWM_CPU_CTL
) & ~BACKLIGHT_DUTY_CYCLE_MASK
;
468 I915_WRITE(BLC_PWM_CPU_CTL
, val
| level
);
471 static void intel_panel_actually_set_backlight(struct drm_device
*dev
,
472 enum pipe pipe
, u32 level
)
474 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
477 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level
);
478 level
= intel_panel_compute_brightness(dev
, pipe
, level
);
480 if (HAS_PCH_SPLIT(dev
))
481 return intel_pch_panel_set_backlight(dev
, level
);
483 if (is_backlight_combination_mode(dev
)) {
484 u32 max
= intel_panel_get_max_backlight(dev
, pipe
);
487 /* we're screwed, but keep behaviour backwards compatible */
491 lbpc
= level
* 0xfe / max
+ 1;
493 pci_write_config_byte(dev
->pdev
, PCI_LBPC
, lbpc
);
496 tmp
= I915_READ(BLC_PWM_CTL
);
497 if (INTEL_INFO(dev
)->gen
< 4)
499 tmp
&= ~BACKLIGHT_DUTY_CYCLE_MASK
;
500 I915_WRITE(BLC_PWM_CTL
, tmp
| level
);
503 /* set backlight brightness to level in range [0..max] */
504 void intel_panel_set_backlight(struct intel_connector
*connector
, u32 level
,
507 struct drm_device
*dev
= connector
->base
.dev
;
508 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
509 enum pipe pipe
= intel_get_pipe_from_connector(connector
);
513 if (pipe
== INVALID_PIPE
)
516 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
518 freq
= intel_panel_get_max_backlight(dev
, pipe
);
520 /* we are screwed, bail out */
524 /* scale to hardware, but be careful to not overflow */
526 level
= level
* freq
/ max
;
528 level
= freq
/ max
* level
;
530 dev_priv
->backlight
.level
= level
;
531 if (dev_priv
->backlight
.device
)
532 dev_priv
->backlight
.device
->props
.brightness
= level
;
534 if (dev_priv
->backlight
.enabled
)
535 intel_panel_actually_set_backlight(dev
, pipe
, level
);
537 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
540 void intel_panel_disable_backlight(struct intel_connector
*connector
)
542 struct drm_device
*dev
= connector
->base
.dev
;
543 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
544 enum pipe pipe
= intel_get_pipe_from_connector(connector
);
547 if (pipe
== INVALID_PIPE
)
551 * Do not disable backlight on the vgaswitcheroo path. When switching
552 * away from i915, the other client may depend on i915 to handle the
553 * backlight. This will leave the backlight on unnecessarily when
554 * another client is not activated.
556 if (dev
->switch_power_state
== DRM_SWITCH_POWER_CHANGING
) {
557 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
561 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
563 dev_priv
->backlight
.enabled
= false;
564 intel_panel_actually_set_backlight(dev
, pipe
, 0);
566 if (INTEL_INFO(dev
)->gen
>= 4) {
569 reg
= HAS_PCH_SPLIT(dev
) ? BLC_PWM_CPU_CTL2
: BLC_PWM_CTL2
;
571 I915_WRITE(reg
, I915_READ(reg
) & ~BLM_PWM_ENABLE
);
573 if (HAS_PCH_SPLIT(dev
)) {
574 tmp
= I915_READ(BLC_PWM_PCH_CTL1
);
575 tmp
&= ~BLM_PCH_PWM_ENABLE
;
576 I915_WRITE(BLC_PWM_PCH_CTL1
, tmp
);
580 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
583 void intel_panel_enable_backlight(struct intel_connector
*connector
)
585 struct drm_device
*dev
= connector
->base
.dev
;
586 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
587 enum pipe pipe
= intel_get_pipe_from_connector(connector
);
588 enum transcoder cpu_transcoder
=
589 intel_pipe_to_cpu_transcoder(dev_priv
, pipe
);
592 if (pipe
== INVALID_PIPE
)
595 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe
));
597 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
599 if (dev_priv
->backlight
.level
== 0) {
600 dev_priv
->backlight
.level
= intel_panel_get_max_backlight(dev
,
602 if (dev_priv
->backlight
.device
)
603 dev_priv
->backlight
.device
->props
.brightness
=
604 dev_priv
->backlight
.level
;
607 if (INTEL_INFO(dev
)->gen
>= 4) {
610 reg
= HAS_PCH_SPLIT(dev
) ? BLC_PWM_CPU_CTL2
: BLC_PWM_CTL2
;
613 tmp
= I915_READ(reg
);
615 /* Note that this can also get called through dpms changes. And
616 * we don't track the backlight dpms state, hence check whether
617 * we have to do anything first. */
618 if (tmp
& BLM_PWM_ENABLE
)
621 if (INTEL_INFO(dev
)->num_pipes
== 3)
622 tmp
&= ~BLM_PIPE_SELECT_IVB
;
624 tmp
&= ~BLM_PIPE_SELECT
;
626 if (cpu_transcoder
== TRANSCODER_EDP
)
627 tmp
|= BLM_TRANSCODER_EDP
;
629 tmp
|= BLM_PIPE(cpu_transcoder
);
630 tmp
&= ~BLM_PWM_ENABLE
;
632 I915_WRITE(reg
, tmp
);
634 I915_WRITE(reg
, tmp
| BLM_PWM_ENABLE
);
636 if (HAS_PCH_SPLIT(dev
) &&
637 !(dev_priv
->quirks
& QUIRK_NO_PCH_PWM_ENABLE
)) {
638 tmp
= I915_READ(BLC_PWM_PCH_CTL1
);
639 tmp
|= BLM_PCH_PWM_ENABLE
;
640 tmp
&= ~BLM_PCH_OVERRIDE_ENABLE
;
641 I915_WRITE(BLC_PWM_PCH_CTL1
, tmp
);
646 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
647 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
650 dev_priv
->backlight
.enabled
= true;
651 intel_panel_actually_set_backlight(dev
, pipe
,
652 dev_priv
->backlight
.level
);
654 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
657 /* FIXME: use VBT vals to init PWM_CTL and PWM_CTL2 correctly */
658 static void intel_panel_init_backlight_regs(struct drm_device
*dev
)
660 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
662 if (IS_VALLEYVIEW(dev
)) {
663 u32 cur_val
= I915_READ(BLC_PWM_CTL
) &
664 BACKLIGHT_DUTY_CYCLE_MASK
;
665 I915_WRITE(BLC_PWM_CTL
, (0xf42 << 16) | cur_val
);
669 static void intel_panel_init_backlight(struct drm_device
*dev
)
671 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
673 intel_panel_init_backlight_regs(dev
);
675 dev_priv
->backlight
.level
= intel_panel_get_backlight(dev
, 0);
676 dev_priv
->backlight
.enabled
= dev_priv
->backlight
.level
!= 0;
679 enum drm_connector_status
680 intel_panel_detect(struct drm_device
*dev
)
682 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
684 /* Assume that the BIOS does not lie through the OpRegion... */
685 if (!i915_panel_ignore_lid
&& dev_priv
->opregion
.lid_state
) {
686 return ioread32(dev_priv
->opregion
.lid_state
) & 0x1 ?
687 connector_status_connected
:
688 connector_status_disconnected
;
691 switch (i915_panel_ignore_lid
) {
693 return connector_status_connected
;
695 return connector_status_disconnected
;
697 return connector_status_unknown
;
701 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
702 static int intel_panel_update_status(struct backlight_device
*bd
)
704 struct intel_connector
*connector
= bl_get_data(bd
);
705 struct drm_device
*dev
= connector
->base
.dev
;
707 mutex_lock(&dev
->mode_config
.mutex
);
708 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
709 bd
->props
.brightness
, bd
->props
.max_brightness
);
710 intel_panel_set_backlight(connector
, bd
->props
.brightness
,
711 bd
->props
.max_brightness
);
712 mutex_unlock(&dev
->mode_config
.mutex
);
716 static int intel_panel_get_brightness(struct backlight_device
*bd
)
718 struct intel_connector
*connector
= bl_get_data(bd
);
719 struct drm_device
*dev
= connector
->base
.dev
;
722 mutex_lock(&dev
->mode_config
.mutex
);
723 pipe
= intel_get_pipe_from_connector(connector
);
724 mutex_unlock(&dev
->mode_config
.mutex
);
725 if (pipe
== INVALID_PIPE
)
728 return intel_panel_get_backlight(connector
->base
.dev
, pipe
);
731 static const struct backlight_ops intel_panel_bl_ops
= {
732 .update_status
= intel_panel_update_status
,
733 .get_brightness
= intel_panel_get_brightness
,
736 int intel_panel_setup_backlight(struct drm_connector
*connector
)
738 struct drm_device
*dev
= connector
->dev
;
739 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
740 struct backlight_properties props
;
743 intel_panel_init_backlight(dev
);
745 if (WARN_ON(dev_priv
->backlight
.device
))
748 memset(&props
, 0, sizeof(props
));
749 props
.type
= BACKLIGHT_RAW
;
750 props
.brightness
= dev_priv
->backlight
.level
;
752 spin_lock_irqsave(&dev_priv
->backlight
.lock
, flags
);
753 props
.max_brightness
= intel_panel_get_max_backlight(dev
, 0);
754 spin_unlock_irqrestore(&dev_priv
->backlight
.lock
, flags
);
756 if (props
.max_brightness
== 0) {
757 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
760 dev_priv
->backlight
.device
=
761 backlight_device_register("intel_backlight",
763 to_intel_connector(connector
),
764 &intel_panel_bl_ops
, &props
);
766 if (IS_ERR(dev_priv
->backlight
.device
)) {
767 DRM_ERROR("Failed to register backlight: %ld\n",
768 PTR_ERR(dev_priv
->backlight
.device
));
769 dev_priv
->backlight
.device
= NULL
;
775 void intel_panel_destroy_backlight(struct drm_device
*dev
)
777 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
778 if (dev_priv
->backlight
.device
) {
779 backlight_device_unregister(dev_priv
->backlight
.device
);
780 dev_priv
->backlight
.device
= NULL
;
784 int intel_panel_setup_backlight(struct drm_connector
*connector
)
786 intel_panel_init_backlight(connector
->dev
);
790 void intel_panel_destroy_backlight(struct drm_device
*dev
)
796 int intel_panel_init(struct intel_panel
*panel
,
797 struct drm_display_mode
*fixed_mode
)
799 panel
->fixed_mode
= fixed_mode
;
804 void intel_panel_fini(struct intel_panel
*panel
)
806 struct intel_connector
*intel_connector
=
807 container_of(panel
, struct intel_connector
, panel
);
809 if (panel
->fixed_mode
)
810 drm_mode_destroy(intel_connector
->base
.dev
, panel
->fixed_mode
);