drm/i915: check that we are in an RPM atomic section in GGTT PTE updaters
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_panel.c
1 /*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33 #include <linux/kernel.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pwm.h>
36 #include "intel_drv.h"
37
38 #define CRC_PMIC_PWM_PERIOD_NS 21333
39
40 void
41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43 {
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47 }
48
49 /**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev: drm device
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58 struct drm_display_mode *
59 intel_find_panel_downclock(struct drm_device *dev,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62 {
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(dev, tmp_mode);
98 else
99 return NULL;
100 }
101
102 /* adjusted_mode has been preset to be the panel's fixed mode */
103 void
104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107 {
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
127 u32 scaled_width = adjusted_mode->crtc_hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->crtc_vdisplay;
131 if (scaled_width > scaled_height) { /* pillar */
132 width = scaled_height / pipe_config->pipe_src_h;
133 if (width & 1)
134 width++;
135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->crtc_vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
139 height = scaled_width / pipe_config->pipe_src_w;
140 if (height & 1)
141 height++;
142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->crtc_hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
149 }
150 }
151 break;
152
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
157 break;
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
162 }
163
164 done:
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
168 }
169
170 static void
171 centre_horizontally(struct drm_display_mode *adjusted_mode,
172 int width)
173 {
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
187
188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
190 }
191
192 static void
193 centre_vertically(struct drm_display_mode *adjusted_mode,
194 int height)
195 {
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
204
205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
208
209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
211 }
212
213 static inline u32 panel_fitter_scaling(u32 source, u32 target)
214 {
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220 #define ACCURACY 12
221 #define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224 }
225
226 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
227 u32 *pfit_control)
228 {
229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->crtc_vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244 }
245
246 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249 {
250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->crtc_vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->crtc_vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->crtc_hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301 }
302
303 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_state *pipe_config,
305 int fitting_mode)
306 {
307 struct drm_device *dev = intel_crtc->base.dev;
308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310
311 /* Native modes don't need fitting */
312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
328 if (INTEL_INFO(dev)->gen >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
333 break;
334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_INFO(dev)->gen >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_INFO(dev)->gen >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362 out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
374 pipe_config->gmch_pfit.lvds_border_bits = border;
375 }
376
377 enum drm_connector_status
378 intel_panel_detect(struct drm_device *dev)
379 {
380 struct drm_i915_private *dev_priv = dev->dev_private;
381
382 /* Assume that the BIOS does not lie through the OpRegion... */
383 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
384 return *dev_priv->opregion.lid_state & 0x1 ?
385 connector_status_connected :
386 connector_status_disconnected;
387 }
388
389 switch (i915.panel_ignore_lid) {
390 case -2:
391 return connector_status_connected;
392 case -1:
393 return connector_status_disconnected;
394 default:
395 return connector_status_unknown;
396 }
397 }
398
399 /**
400 * scale - scale values from one range to another
401 *
402 * @source_val: value in range [@source_min..@source_max]
403 *
404 * Return @source_val in range [@source_min..@source_max] scaled to range
405 * [@target_min..@target_max].
406 */
407 static uint32_t scale(uint32_t source_val,
408 uint32_t source_min, uint32_t source_max,
409 uint32_t target_min, uint32_t target_max)
410 {
411 uint64_t target_val;
412
413 WARN_ON(source_min > source_max);
414 WARN_ON(target_min > target_max);
415
416 /* defensive */
417 source_val = clamp(source_val, source_min, source_max);
418
419 /* avoid overflows */
420 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
421 (target_max - target_min), source_max - source_min);
422 target_val += target_min;
423
424 return target_val;
425 }
426
427 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
428 static inline u32 scale_user_to_hw(struct intel_connector *connector,
429 u32 user_level, u32 user_max)
430 {
431 struct intel_panel *panel = &connector->panel;
432
433 return scale(user_level, 0, user_max,
434 panel->backlight.min, panel->backlight.max);
435 }
436
437 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
438 * to [hw_min..hw_max]. */
439 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
440 u32 user_level, u32 user_max)
441 {
442 struct intel_panel *panel = &connector->panel;
443 u32 hw_level;
444
445 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
446 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
447
448 return hw_level;
449 }
450
451 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
452 static inline u32 scale_hw_to_user(struct intel_connector *connector,
453 u32 hw_level, u32 user_max)
454 {
455 struct intel_panel *panel = &connector->panel;
456
457 return scale(hw_level, panel->backlight.min, panel->backlight.max,
458 0, user_max);
459 }
460
461 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
462 u32 val)
463 {
464 struct drm_device *dev = connector->base.dev;
465 struct drm_i915_private *dev_priv = dev->dev_private;
466 struct intel_panel *panel = &connector->panel;
467
468 WARN_ON(panel->backlight.max == 0);
469
470 if (i915.invert_brightness < 0)
471 return val;
472
473 if (i915.invert_brightness > 0 ||
474 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
475 return panel->backlight.max - val;
476 }
477
478 return val;
479 }
480
481 static u32 lpt_get_backlight(struct intel_connector *connector)
482 {
483 struct drm_device *dev = connector->base.dev;
484 struct drm_i915_private *dev_priv = dev->dev_private;
485
486 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
487 }
488
489 static u32 pch_get_backlight(struct intel_connector *connector)
490 {
491 struct drm_device *dev = connector->base.dev;
492 struct drm_i915_private *dev_priv = dev->dev_private;
493
494 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
495 }
496
497 static u32 i9xx_get_backlight(struct intel_connector *connector)
498 {
499 struct drm_device *dev = connector->base.dev;
500 struct drm_i915_private *dev_priv = dev->dev_private;
501 struct intel_panel *panel = &connector->panel;
502 u32 val;
503
504 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
505 if (INTEL_INFO(dev)->gen < 4)
506 val >>= 1;
507
508 if (panel->backlight.combination_mode) {
509 u8 lbpc;
510
511 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
512 val *= lbpc;
513 }
514
515 return val;
516 }
517
518 static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
519 {
520 struct drm_i915_private *dev_priv = dev->dev_private;
521
522 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
523 return 0;
524
525 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
526 }
527
528 static u32 vlv_get_backlight(struct intel_connector *connector)
529 {
530 struct drm_device *dev = connector->base.dev;
531 enum pipe pipe = intel_get_pipe_from_connector(connector);
532
533 return _vlv_get_backlight(dev, pipe);
534 }
535
536 static u32 bxt_get_backlight(struct intel_connector *connector)
537 {
538 struct drm_device *dev = connector->base.dev;
539 struct intel_panel *panel = &connector->panel;
540 struct drm_i915_private *dev_priv = dev->dev_private;
541
542 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
543 }
544
545 static u32 pwm_get_backlight(struct intel_connector *connector)
546 {
547 struct intel_panel *panel = &connector->panel;
548 int duty_ns;
549
550 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
551 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
552 }
553
554 static u32 intel_panel_get_backlight(struct intel_connector *connector)
555 {
556 struct drm_device *dev = connector->base.dev;
557 struct drm_i915_private *dev_priv = dev->dev_private;
558 struct intel_panel *panel = &connector->panel;
559 u32 val = 0;
560
561 mutex_lock(&dev_priv->backlight_lock);
562
563 if (panel->backlight.enabled) {
564 val = panel->backlight.get(connector);
565 val = intel_panel_compute_brightness(connector, val);
566 }
567
568 mutex_unlock(&dev_priv->backlight_lock);
569
570 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
571 return val;
572 }
573
574 static void lpt_set_backlight(struct intel_connector *connector, u32 level)
575 {
576 struct drm_device *dev = connector->base.dev;
577 struct drm_i915_private *dev_priv = dev->dev_private;
578 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
579 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
580 }
581
582 static void pch_set_backlight(struct intel_connector *connector, u32 level)
583 {
584 struct drm_device *dev = connector->base.dev;
585 struct drm_i915_private *dev_priv = dev->dev_private;
586 u32 tmp;
587
588 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
589 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
590 }
591
592 static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
593 {
594 struct drm_device *dev = connector->base.dev;
595 struct drm_i915_private *dev_priv = dev->dev_private;
596 struct intel_panel *panel = &connector->panel;
597 u32 tmp, mask;
598
599 WARN_ON(panel->backlight.max == 0);
600
601 if (panel->backlight.combination_mode) {
602 u8 lbpc;
603
604 lbpc = level * 0xfe / panel->backlight.max + 1;
605 level /= lbpc;
606 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
607 }
608
609 if (IS_GEN4(dev)) {
610 mask = BACKLIGHT_DUTY_CYCLE_MASK;
611 } else {
612 level <<= 1;
613 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
614 }
615
616 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
617 I915_WRITE(BLC_PWM_CTL, tmp | level);
618 }
619
620 static void vlv_set_backlight(struct intel_connector *connector, u32 level)
621 {
622 struct drm_device *dev = connector->base.dev;
623 struct drm_i915_private *dev_priv = dev->dev_private;
624 enum pipe pipe = intel_get_pipe_from_connector(connector);
625 u32 tmp;
626
627 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
628 return;
629
630 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
631 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
632 }
633
634 static void bxt_set_backlight(struct intel_connector *connector, u32 level)
635 {
636 struct drm_device *dev = connector->base.dev;
637 struct drm_i915_private *dev_priv = dev->dev_private;
638 struct intel_panel *panel = &connector->panel;
639
640 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
641 }
642
643 static void pwm_set_backlight(struct intel_connector *connector, u32 level)
644 {
645 struct intel_panel *panel = &connector->panel;
646 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
647
648 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
649 }
650
651 static void
652 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
653 {
654 struct intel_panel *panel = &connector->panel;
655
656 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
657
658 level = intel_panel_compute_brightness(connector, level);
659 panel->backlight.set(connector, level);
660 }
661
662 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
663 static void intel_panel_set_backlight(struct intel_connector *connector,
664 u32 user_level, u32 user_max)
665 {
666 struct drm_device *dev = connector->base.dev;
667 struct drm_i915_private *dev_priv = dev->dev_private;
668 struct intel_panel *panel = &connector->panel;
669 u32 hw_level;
670
671 if (!panel->backlight.present)
672 return;
673
674 mutex_lock(&dev_priv->backlight_lock);
675
676 WARN_ON(panel->backlight.max == 0);
677
678 hw_level = scale_user_to_hw(connector, user_level, user_max);
679 panel->backlight.level = hw_level;
680
681 if (panel->backlight.enabled)
682 intel_panel_actually_set_backlight(connector, hw_level);
683
684 mutex_unlock(&dev_priv->backlight_lock);
685 }
686
687 /* set backlight brightness to level in range [0..max], assuming hw min is
688 * respected.
689 */
690 void intel_panel_set_backlight_acpi(struct intel_connector *connector,
691 u32 user_level, u32 user_max)
692 {
693 struct drm_device *dev = connector->base.dev;
694 struct drm_i915_private *dev_priv = dev->dev_private;
695 struct intel_panel *panel = &connector->panel;
696 enum pipe pipe = intel_get_pipe_from_connector(connector);
697 u32 hw_level;
698
699 /*
700 * INVALID_PIPE may occur during driver init because
701 * connection_mutex isn't held across the entire backlight
702 * setup + modeset readout, and the BIOS can issue the
703 * requests at any time.
704 */
705 if (!panel->backlight.present || pipe == INVALID_PIPE)
706 return;
707
708 mutex_lock(&dev_priv->backlight_lock);
709
710 WARN_ON(panel->backlight.max == 0);
711
712 hw_level = clamp_user_to_hw(connector, user_level, user_max);
713 panel->backlight.level = hw_level;
714
715 if (panel->backlight.device)
716 panel->backlight.device->props.brightness =
717 scale_hw_to_user(connector,
718 panel->backlight.level,
719 panel->backlight.device->props.max_brightness);
720
721 if (panel->backlight.enabled)
722 intel_panel_actually_set_backlight(connector, hw_level);
723
724 mutex_unlock(&dev_priv->backlight_lock);
725 }
726
727 static void lpt_disable_backlight(struct intel_connector *connector)
728 {
729 struct drm_device *dev = connector->base.dev;
730 struct drm_i915_private *dev_priv = dev->dev_private;
731 u32 tmp;
732
733 intel_panel_actually_set_backlight(connector, 0);
734
735 /*
736 * Although we don't support or enable CPU PWM with LPT/SPT based
737 * systems, it may have been enabled prior to loading the
738 * driver. Disable to avoid warnings on LCPLL disable.
739 *
740 * This needs rework if we need to add support for CPU PWM on PCH split
741 * platforms.
742 */
743 tmp = I915_READ(BLC_PWM_CPU_CTL2);
744 if (tmp & BLM_PWM_ENABLE) {
745 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
746 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
747 }
748
749 tmp = I915_READ(BLC_PWM_PCH_CTL1);
750 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
751 }
752
753 static void pch_disable_backlight(struct intel_connector *connector)
754 {
755 struct drm_device *dev = connector->base.dev;
756 struct drm_i915_private *dev_priv = dev->dev_private;
757 u32 tmp;
758
759 intel_panel_actually_set_backlight(connector, 0);
760
761 tmp = I915_READ(BLC_PWM_CPU_CTL2);
762 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
763
764 tmp = I915_READ(BLC_PWM_PCH_CTL1);
765 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
766 }
767
768 static void i9xx_disable_backlight(struct intel_connector *connector)
769 {
770 intel_panel_actually_set_backlight(connector, 0);
771 }
772
773 static void i965_disable_backlight(struct intel_connector *connector)
774 {
775 struct drm_device *dev = connector->base.dev;
776 struct drm_i915_private *dev_priv = dev->dev_private;
777 u32 tmp;
778
779 intel_panel_actually_set_backlight(connector, 0);
780
781 tmp = I915_READ(BLC_PWM_CTL2);
782 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
783 }
784
785 static void vlv_disable_backlight(struct intel_connector *connector)
786 {
787 struct drm_device *dev = connector->base.dev;
788 struct drm_i915_private *dev_priv = dev->dev_private;
789 enum pipe pipe = intel_get_pipe_from_connector(connector);
790 u32 tmp;
791
792 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
793 return;
794
795 intel_panel_actually_set_backlight(connector, 0);
796
797 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
798 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
799 }
800
801 static void bxt_disable_backlight(struct intel_connector *connector)
802 {
803 struct drm_device *dev = connector->base.dev;
804 struct drm_i915_private *dev_priv = dev->dev_private;
805 struct intel_panel *panel = &connector->panel;
806 u32 tmp, val;
807
808 intel_panel_actually_set_backlight(connector, 0);
809
810 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
811 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
812 tmp & ~BXT_BLC_PWM_ENABLE);
813
814 if (panel->backlight.controller == 1) {
815 val = I915_READ(UTIL_PIN_CTL);
816 val &= ~UTIL_PIN_ENABLE;
817 I915_WRITE(UTIL_PIN_CTL, val);
818 }
819 }
820
821 static void pwm_disable_backlight(struct intel_connector *connector)
822 {
823 struct intel_panel *panel = &connector->panel;
824
825 /* Disable the backlight */
826 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
827 usleep_range(2000, 3000);
828 pwm_disable(panel->backlight.pwm);
829 }
830
831 void intel_panel_disable_backlight(struct intel_connector *connector)
832 {
833 struct drm_device *dev = connector->base.dev;
834 struct drm_i915_private *dev_priv = dev->dev_private;
835 struct intel_panel *panel = &connector->panel;
836
837 if (!panel->backlight.present)
838 return;
839
840 /*
841 * Do not disable backlight on the vga_switcheroo path. When switching
842 * away from i915, the other client may depend on i915 to handle the
843 * backlight. This will leave the backlight on unnecessarily when
844 * another client is not activated.
845 */
846 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
847 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
848 return;
849 }
850
851 mutex_lock(&dev_priv->backlight_lock);
852
853 if (panel->backlight.device)
854 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
855 panel->backlight.enabled = false;
856 panel->backlight.disable(connector);
857
858 mutex_unlock(&dev_priv->backlight_lock);
859 }
860
861 static void lpt_enable_backlight(struct intel_connector *connector)
862 {
863 struct drm_device *dev = connector->base.dev;
864 struct drm_i915_private *dev_priv = dev->dev_private;
865 struct intel_panel *panel = &connector->panel;
866 u32 pch_ctl1, pch_ctl2;
867
868 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
869 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
870 DRM_DEBUG_KMS("pch backlight already enabled\n");
871 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
872 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
873 }
874
875 pch_ctl2 = panel->backlight.max << 16;
876 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
877
878 pch_ctl1 = 0;
879 if (panel->backlight.active_low_pwm)
880 pch_ctl1 |= BLM_PCH_POLARITY;
881
882 /* After LPT, override is the default. */
883 if (HAS_PCH_LPT(dev_priv))
884 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
885
886 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
887 POSTING_READ(BLC_PWM_PCH_CTL1);
888 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
889
890 /* This won't stick until the above enable. */
891 intel_panel_actually_set_backlight(connector, panel->backlight.level);
892 }
893
894 static void pch_enable_backlight(struct intel_connector *connector)
895 {
896 struct drm_device *dev = connector->base.dev;
897 struct drm_i915_private *dev_priv = dev->dev_private;
898 struct intel_panel *panel = &connector->panel;
899 enum pipe pipe = intel_get_pipe_from_connector(connector);
900 enum transcoder cpu_transcoder =
901 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
902 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
903
904 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
905 if (cpu_ctl2 & BLM_PWM_ENABLE) {
906 DRM_DEBUG_KMS("cpu backlight already enabled\n");
907 cpu_ctl2 &= ~BLM_PWM_ENABLE;
908 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
909 }
910
911 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
912 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
913 DRM_DEBUG_KMS("pch backlight already enabled\n");
914 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
915 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
916 }
917
918 if (cpu_transcoder == TRANSCODER_EDP)
919 cpu_ctl2 = BLM_TRANSCODER_EDP;
920 else
921 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
922 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
923 POSTING_READ(BLC_PWM_CPU_CTL2);
924 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
925
926 /* This won't stick until the above enable. */
927 intel_panel_actually_set_backlight(connector, panel->backlight.level);
928
929 pch_ctl2 = panel->backlight.max << 16;
930 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
931
932 pch_ctl1 = 0;
933 if (panel->backlight.active_low_pwm)
934 pch_ctl1 |= BLM_PCH_POLARITY;
935
936 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
937 POSTING_READ(BLC_PWM_PCH_CTL1);
938 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
939 }
940
941 static void i9xx_enable_backlight(struct intel_connector *connector)
942 {
943 struct drm_device *dev = connector->base.dev;
944 struct drm_i915_private *dev_priv = dev->dev_private;
945 struct intel_panel *panel = &connector->panel;
946 u32 ctl, freq;
947
948 ctl = I915_READ(BLC_PWM_CTL);
949 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
950 DRM_DEBUG_KMS("backlight already enabled\n");
951 I915_WRITE(BLC_PWM_CTL, 0);
952 }
953
954 freq = panel->backlight.max;
955 if (panel->backlight.combination_mode)
956 freq /= 0xff;
957
958 ctl = freq << 17;
959 if (panel->backlight.combination_mode)
960 ctl |= BLM_LEGACY_MODE;
961 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
962 ctl |= BLM_POLARITY_PNV;
963
964 I915_WRITE(BLC_PWM_CTL, ctl);
965 POSTING_READ(BLC_PWM_CTL);
966
967 /* XXX: combine this into above write? */
968 intel_panel_actually_set_backlight(connector, panel->backlight.level);
969
970 /*
971 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
972 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
973 * that has backlight.
974 */
975 if (IS_GEN2(dev))
976 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
977 }
978
979 static void i965_enable_backlight(struct intel_connector *connector)
980 {
981 struct drm_device *dev = connector->base.dev;
982 struct drm_i915_private *dev_priv = dev->dev_private;
983 struct intel_panel *panel = &connector->panel;
984 enum pipe pipe = intel_get_pipe_from_connector(connector);
985 u32 ctl, ctl2, freq;
986
987 ctl2 = I915_READ(BLC_PWM_CTL2);
988 if (ctl2 & BLM_PWM_ENABLE) {
989 DRM_DEBUG_KMS("backlight already enabled\n");
990 ctl2 &= ~BLM_PWM_ENABLE;
991 I915_WRITE(BLC_PWM_CTL2, ctl2);
992 }
993
994 freq = panel->backlight.max;
995 if (panel->backlight.combination_mode)
996 freq /= 0xff;
997
998 ctl = freq << 16;
999 I915_WRITE(BLC_PWM_CTL, ctl);
1000
1001 ctl2 = BLM_PIPE(pipe);
1002 if (panel->backlight.combination_mode)
1003 ctl2 |= BLM_COMBINATION_MODE;
1004 if (panel->backlight.active_low_pwm)
1005 ctl2 |= BLM_POLARITY_I965;
1006 I915_WRITE(BLC_PWM_CTL2, ctl2);
1007 POSTING_READ(BLC_PWM_CTL2);
1008 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1009
1010 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1011 }
1012
1013 static void vlv_enable_backlight(struct intel_connector *connector)
1014 {
1015 struct drm_device *dev = connector->base.dev;
1016 struct drm_i915_private *dev_priv = dev->dev_private;
1017 struct intel_panel *panel = &connector->panel;
1018 enum pipe pipe = intel_get_pipe_from_connector(connector);
1019 u32 ctl, ctl2;
1020
1021 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1022 return;
1023
1024 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1025 if (ctl2 & BLM_PWM_ENABLE) {
1026 DRM_DEBUG_KMS("backlight already enabled\n");
1027 ctl2 &= ~BLM_PWM_ENABLE;
1028 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1029 }
1030
1031 ctl = panel->backlight.max << 16;
1032 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1033
1034 /* XXX: combine this into above write? */
1035 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1036
1037 ctl2 = 0;
1038 if (panel->backlight.active_low_pwm)
1039 ctl2 |= BLM_POLARITY_I965;
1040 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1041 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1042 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1043 }
1044
1045 static void bxt_enable_backlight(struct intel_connector *connector)
1046 {
1047 struct drm_device *dev = connector->base.dev;
1048 struct drm_i915_private *dev_priv = dev->dev_private;
1049 struct intel_panel *panel = &connector->panel;
1050 enum pipe pipe = intel_get_pipe_from_connector(connector);
1051 u32 pwm_ctl, val;
1052
1053 /* To use 2nd set of backlight registers, utility pin has to be
1054 * enabled with PWM mode.
1055 * The field should only be changed when the utility pin is disabled
1056 */
1057 if (panel->backlight.controller == 1) {
1058 val = I915_READ(UTIL_PIN_CTL);
1059 if (val & UTIL_PIN_ENABLE) {
1060 DRM_DEBUG_KMS("util pin already enabled\n");
1061 val &= ~UTIL_PIN_ENABLE;
1062 I915_WRITE(UTIL_PIN_CTL, val);
1063 }
1064
1065 val = 0;
1066 if (panel->backlight.util_pin_active_low)
1067 val |= UTIL_PIN_POLARITY;
1068 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1069 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1070 }
1071
1072 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1073 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1074 DRM_DEBUG_KMS("backlight already enabled\n");
1075 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1076 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1077 pwm_ctl);
1078 }
1079
1080 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1081 panel->backlight.max);
1082
1083 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1084
1085 pwm_ctl = 0;
1086 if (panel->backlight.active_low_pwm)
1087 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1088
1089 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1090 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1091 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1092 pwm_ctl | BXT_BLC_PWM_ENABLE);
1093 }
1094
1095 static void pwm_enable_backlight(struct intel_connector *connector)
1096 {
1097 struct intel_panel *panel = &connector->panel;
1098
1099 pwm_enable(panel->backlight.pwm);
1100 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1101 }
1102
1103 void intel_panel_enable_backlight(struct intel_connector *connector)
1104 {
1105 struct drm_device *dev = connector->base.dev;
1106 struct drm_i915_private *dev_priv = dev->dev_private;
1107 struct intel_panel *panel = &connector->panel;
1108 enum pipe pipe = intel_get_pipe_from_connector(connector);
1109
1110 if (!panel->backlight.present)
1111 return;
1112
1113 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1114
1115 mutex_lock(&dev_priv->backlight_lock);
1116
1117 WARN_ON(panel->backlight.max == 0);
1118
1119 if (panel->backlight.level <= panel->backlight.min) {
1120 panel->backlight.level = panel->backlight.max;
1121 if (panel->backlight.device)
1122 panel->backlight.device->props.brightness =
1123 scale_hw_to_user(connector,
1124 panel->backlight.level,
1125 panel->backlight.device->props.max_brightness);
1126 }
1127
1128 panel->backlight.enable(connector);
1129 panel->backlight.enabled = true;
1130 if (panel->backlight.device)
1131 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1132
1133 mutex_unlock(&dev_priv->backlight_lock);
1134 }
1135
1136 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1137 static int intel_backlight_device_update_status(struct backlight_device *bd)
1138 {
1139 struct intel_connector *connector = bl_get_data(bd);
1140 struct intel_panel *panel = &connector->panel;
1141 struct drm_device *dev = connector->base.dev;
1142
1143 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1144 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1145 bd->props.brightness, bd->props.max_brightness);
1146 intel_panel_set_backlight(connector, bd->props.brightness,
1147 bd->props.max_brightness);
1148
1149 /*
1150 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1151 * backlight class device does not make it easy to to differentiate
1152 * between callbacks for brightness and bl_power, so our backlight_power
1153 * callback needs to take this into account.
1154 */
1155 if (panel->backlight.enabled) {
1156 if (panel->backlight.power) {
1157 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1158 bd->props.brightness != 0;
1159 panel->backlight.power(connector, enable);
1160 }
1161 } else {
1162 bd->props.power = FB_BLANK_POWERDOWN;
1163 }
1164
1165 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1166 return 0;
1167 }
1168
1169 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1170 {
1171 struct intel_connector *connector = bl_get_data(bd);
1172 struct drm_device *dev = connector->base.dev;
1173 struct drm_i915_private *dev_priv = dev->dev_private;
1174 u32 hw_level;
1175 int ret;
1176
1177 intel_runtime_pm_get(dev_priv);
1178 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1179
1180 hw_level = intel_panel_get_backlight(connector);
1181 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1182
1183 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1184 intel_runtime_pm_put(dev_priv);
1185
1186 return ret;
1187 }
1188
1189 static const struct backlight_ops intel_backlight_device_ops = {
1190 .update_status = intel_backlight_device_update_status,
1191 .get_brightness = intel_backlight_device_get_brightness,
1192 };
1193
1194 static int intel_backlight_device_register(struct intel_connector *connector)
1195 {
1196 struct intel_panel *panel = &connector->panel;
1197 struct backlight_properties props;
1198
1199 if (WARN_ON(panel->backlight.device))
1200 return -ENODEV;
1201
1202 if (!panel->backlight.present)
1203 return 0;
1204
1205 WARN_ON(panel->backlight.max == 0);
1206
1207 memset(&props, 0, sizeof(props));
1208 props.type = BACKLIGHT_RAW;
1209
1210 /*
1211 * Note: Everything should work even if the backlight device max
1212 * presented to the userspace is arbitrarily chosen.
1213 */
1214 props.max_brightness = panel->backlight.max;
1215 props.brightness = scale_hw_to_user(connector,
1216 panel->backlight.level,
1217 props.max_brightness);
1218
1219 if (panel->backlight.enabled)
1220 props.power = FB_BLANK_UNBLANK;
1221 else
1222 props.power = FB_BLANK_POWERDOWN;
1223
1224 /*
1225 * Note: using the same name independent of the connector prevents
1226 * registration of multiple backlight devices in the driver.
1227 */
1228 panel->backlight.device =
1229 backlight_device_register("intel_backlight",
1230 connector->base.kdev,
1231 connector,
1232 &intel_backlight_device_ops, &props);
1233
1234 if (IS_ERR(panel->backlight.device)) {
1235 DRM_ERROR("Failed to register backlight: %ld\n",
1236 PTR_ERR(panel->backlight.device));
1237 panel->backlight.device = NULL;
1238 return -ENODEV;
1239 }
1240
1241 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1242 connector->base.name);
1243
1244 return 0;
1245 }
1246
1247 static void intel_backlight_device_unregister(struct intel_connector *connector)
1248 {
1249 struct intel_panel *panel = &connector->panel;
1250
1251 if (panel->backlight.device) {
1252 backlight_device_unregister(panel->backlight.device);
1253 panel->backlight.device = NULL;
1254 }
1255 }
1256 #else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1257 static int intel_backlight_device_register(struct intel_connector *connector)
1258 {
1259 return 0;
1260 }
1261 static void intel_backlight_device_unregister(struct intel_connector *connector)
1262 {
1263 }
1264 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1265
1266 /*
1267 * BXT: PWM clock frequency = 19.2 MHz.
1268 */
1269 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1270 {
1271 return KHz(19200) / pwm_freq_hz;
1272 }
1273
1274 /*
1275 * SPT: This value represents the period of the PWM stream in clock periods
1276 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1277 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1278 */
1279 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1280 {
1281 struct drm_device *dev = connector->base.dev;
1282 struct drm_i915_private *dev_priv = dev->dev_private;
1283 u32 mul, clock;
1284
1285 if (I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY)
1286 mul = 128;
1287 else
1288 mul = 16;
1289
1290 clock = MHz(24);
1291
1292 return clock / (pwm_freq_hz * mul);
1293 }
1294
1295 /*
1296 * LPT: This value represents the period of the PWM stream in clock periods
1297 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1298 * LPT SOUTH_CHICKEN2 register bit 5).
1299 */
1300 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1301 {
1302 struct drm_device *dev = connector->base.dev;
1303 struct drm_i915_private *dev_priv = dev->dev_private;
1304 u32 mul, clock;
1305
1306 if (I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY)
1307 mul = 16;
1308 else
1309 mul = 128;
1310
1311 if (HAS_PCH_LPT_H(dev_priv))
1312 clock = MHz(135); /* LPT:H */
1313 else
1314 clock = MHz(24); /* LPT:LP */
1315
1316 return clock / (pwm_freq_hz * mul);
1317 }
1318
1319 /*
1320 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1321 * display raw clocks multiplied by 128.
1322 */
1323 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1324 {
1325 struct drm_device *dev = connector->base.dev;
1326 int clock = MHz(intel_pch_rawclk(dev));
1327
1328 return clock / (pwm_freq_hz * 128);
1329 }
1330
1331 /*
1332 * Gen2: This field determines the number of time base events (display core
1333 * clock frequency/32) in total for a complete cycle of modulated backlight
1334 * control.
1335 *
1336 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1337 * divided by 32.
1338 */
1339 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1340 {
1341 struct drm_device *dev = connector->base.dev;
1342 struct drm_i915_private *dev_priv = dev->dev_private;
1343 int clock;
1344
1345 if (IS_PINEVIEW(dev))
1346 clock = MHz(intel_hrawclk(dev));
1347 else
1348 clock = 1000 * dev_priv->cdclk_freq;
1349
1350 return clock / (pwm_freq_hz * 32);
1351 }
1352
1353 /*
1354 * Gen4: This value represents the period of the PWM stream in display core
1355 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1356 *
1357 */
1358 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1359 {
1360 struct drm_device *dev = connector->base.dev;
1361 struct drm_i915_private *dev_priv = dev->dev_private;
1362 int clock;
1363
1364 if (IS_G4X(dev_priv))
1365 clock = MHz(intel_hrawclk(dev));
1366 else
1367 clock = 1000 * dev_priv->cdclk_freq;
1368
1369 return clock / (pwm_freq_hz * 128);
1370 }
1371
1372 /*
1373 * VLV: This value represents the period of the PWM stream in display core
1374 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1375 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1376 */
1377 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1378 {
1379 struct drm_device *dev = connector->base.dev;
1380 struct drm_i915_private *dev_priv = dev->dev_private;
1381 int clock;
1382
1383 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1384 if (IS_CHERRYVIEW(dev))
1385 return KHz(19200) / (pwm_freq_hz * 16);
1386 else
1387 return MHz(25) / (pwm_freq_hz * 16);
1388 } else {
1389 clock = intel_hrawclk(dev);
1390 return MHz(clock) / (pwm_freq_hz * 128);
1391 }
1392 }
1393
1394 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1395 {
1396 struct drm_device *dev = connector->base.dev;
1397 struct drm_i915_private *dev_priv = dev->dev_private;
1398 struct intel_panel *panel = &connector->panel;
1399 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1400 u32 pwm;
1401
1402 if (!panel->backlight.hz_to_pwm) {
1403 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1404 return 0;
1405 }
1406
1407 if (pwm_freq_hz) {
1408 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1409 pwm_freq_hz);
1410 } else {
1411 pwm_freq_hz = 200;
1412 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1413 pwm_freq_hz);
1414 }
1415
1416 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1417 if (!pwm) {
1418 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1419 return 0;
1420 }
1421
1422 return pwm;
1423 }
1424
1425 /*
1426 * Note: The setup hooks can't assume pipe is set!
1427 */
1428 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1429 {
1430 struct drm_device *dev = connector->base.dev;
1431 struct drm_i915_private *dev_priv = dev->dev_private;
1432 struct intel_panel *panel = &connector->panel;
1433 int min;
1434
1435 WARN_ON(panel->backlight.max == 0);
1436
1437 /*
1438 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1439 * to problems. There are such machines out there. Either our
1440 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1441 * against this by letting the minimum be at most (arbitrarily chosen)
1442 * 25% of the max.
1443 */
1444 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1445 if (min != dev_priv->vbt.backlight.min_brightness) {
1446 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1447 dev_priv->vbt.backlight.min_brightness, min);
1448 }
1449
1450 /* vbt value is a coefficient in range [0..255] */
1451 return scale(min, 0, 255, 0, panel->backlight.max);
1452 }
1453
1454 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1455 {
1456 struct drm_device *dev = connector->base.dev;
1457 struct drm_i915_private *dev_priv = dev->dev_private;
1458 struct intel_panel *panel = &connector->panel;
1459 u32 pch_ctl1, pch_ctl2, val;
1460
1461 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1462 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1463
1464 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1465 panel->backlight.max = pch_ctl2 >> 16;
1466
1467 if (!panel->backlight.max)
1468 panel->backlight.max = get_backlight_max_vbt(connector);
1469
1470 if (!panel->backlight.max)
1471 return -ENODEV;
1472
1473 panel->backlight.min = get_backlight_min_vbt(connector);
1474
1475 val = lpt_get_backlight(connector);
1476 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1477
1478 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1479 panel->backlight.level != 0;
1480
1481 return 0;
1482 }
1483
1484 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1485 {
1486 struct drm_device *dev = connector->base.dev;
1487 struct drm_i915_private *dev_priv = dev->dev_private;
1488 struct intel_panel *panel = &connector->panel;
1489 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1490
1491 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1492 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1493
1494 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1495 panel->backlight.max = pch_ctl2 >> 16;
1496
1497 if (!panel->backlight.max)
1498 panel->backlight.max = get_backlight_max_vbt(connector);
1499
1500 if (!panel->backlight.max)
1501 return -ENODEV;
1502
1503 panel->backlight.min = get_backlight_min_vbt(connector);
1504
1505 val = pch_get_backlight(connector);
1506 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1507
1508 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1509 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1510 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1511
1512 return 0;
1513 }
1514
1515 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1516 {
1517 struct drm_device *dev = connector->base.dev;
1518 struct drm_i915_private *dev_priv = dev->dev_private;
1519 struct intel_panel *panel = &connector->panel;
1520 u32 ctl, val;
1521
1522 ctl = I915_READ(BLC_PWM_CTL);
1523
1524 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
1525 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1526
1527 if (IS_PINEVIEW(dev))
1528 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1529
1530 panel->backlight.max = ctl >> 17;
1531
1532 if (!panel->backlight.max) {
1533 panel->backlight.max = get_backlight_max_vbt(connector);
1534 panel->backlight.max >>= 1;
1535 }
1536
1537 if (!panel->backlight.max)
1538 return -ENODEV;
1539
1540 if (panel->backlight.combination_mode)
1541 panel->backlight.max *= 0xff;
1542
1543 panel->backlight.min = get_backlight_min_vbt(connector);
1544
1545 val = i9xx_get_backlight(connector);
1546 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1547
1548 panel->backlight.enabled = panel->backlight.level != 0;
1549
1550 return 0;
1551 }
1552
1553 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1554 {
1555 struct drm_device *dev = connector->base.dev;
1556 struct drm_i915_private *dev_priv = dev->dev_private;
1557 struct intel_panel *panel = &connector->panel;
1558 u32 ctl, ctl2, val;
1559
1560 ctl2 = I915_READ(BLC_PWM_CTL2);
1561 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1562 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1563
1564 ctl = I915_READ(BLC_PWM_CTL);
1565 panel->backlight.max = ctl >> 16;
1566
1567 if (!panel->backlight.max)
1568 panel->backlight.max = get_backlight_max_vbt(connector);
1569
1570 if (!panel->backlight.max)
1571 return -ENODEV;
1572
1573 if (panel->backlight.combination_mode)
1574 panel->backlight.max *= 0xff;
1575
1576 panel->backlight.min = get_backlight_min_vbt(connector);
1577
1578 val = i9xx_get_backlight(connector);
1579 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1580
1581 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1582 panel->backlight.level != 0;
1583
1584 return 0;
1585 }
1586
1587 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1588 {
1589 struct drm_device *dev = connector->base.dev;
1590 struct drm_i915_private *dev_priv = dev->dev_private;
1591 struct intel_panel *panel = &connector->panel;
1592 u32 ctl, ctl2, val;
1593
1594 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1595 return -ENODEV;
1596
1597 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1598 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1599
1600 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1601 panel->backlight.max = ctl >> 16;
1602
1603 if (!panel->backlight.max)
1604 panel->backlight.max = get_backlight_max_vbt(connector);
1605
1606 if (!panel->backlight.max)
1607 return -ENODEV;
1608
1609 panel->backlight.min = get_backlight_min_vbt(connector);
1610
1611 val = _vlv_get_backlight(dev, pipe);
1612 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1613
1614 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1615 panel->backlight.level != 0;
1616
1617 return 0;
1618 }
1619
1620 static int
1621 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1622 {
1623 struct drm_device *dev = connector->base.dev;
1624 struct drm_i915_private *dev_priv = dev->dev_private;
1625 struct intel_panel *panel = &connector->panel;
1626 u32 pwm_ctl, val;
1627
1628 /*
1629 * For BXT hard coding the Backlight controller to 0.
1630 * TODO : Read the controller value from VBT and generalize
1631 */
1632 panel->backlight.controller = 0;
1633
1634 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1635
1636 /* Keeping the check if controller 1 is to be programmed.
1637 * This will come into affect once the VBT parsing
1638 * is fixed for controller selection, and controller 1 is used
1639 * for a prticular display configuration.
1640 */
1641 if (panel->backlight.controller == 1) {
1642 val = I915_READ(UTIL_PIN_CTL);
1643 panel->backlight.util_pin_active_low =
1644 val & UTIL_PIN_POLARITY;
1645 }
1646
1647 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1648 panel->backlight.max =
1649 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1650
1651 if (!panel->backlight.max)
1652 panel->backlight.max = get_backlight_max_vbt(connector);
1653
1654 if (!panel->backlight.max)
1655 return -ENODEV;
1656
1657 val = bxt_get_backlight(connector);
1658 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1659
1660 panel->backlight.enabled = (pwm_ctl & BXT_BLC_PWM_ENABLE) &&
1661 panel->backlight.level != 0;
1662
1663 return 0;
1664 }
1665
1666 static int pwm_setup_backlight(struct intel_connector *connector,
1667 enum pipe pipe)
1668 {
1669 struct drm_device *dev = connector->base.dev;
1670 struct intel_panel *panel = &connector->panel;
1671 int retval;
1672
1673 /* Get the PWM chip for backlight control */
1674 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1675 if (IS_ERR(panel->backlight.pwm)) {
1676 DRM_ERROR("Failed to own the pwm chip\n");
1677 panel->backlight.pwm = NULL;
1678 return -ENODEV;
1679 }
1680
1681 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1682 CRC_PMIC_PWM_PERIOD_NS);
1683 if (retval < 0) {
1684 DRM_ERROR("Failed to configure the pwm chip\n");
1685 pwm_put(panel->backlight.pwm);
1686 panel->backlight.pwm = NULL;
1687 return retval;
1688 }
1689
1690 panel->backlight.min = 0; /* 0% */
1691 panel->backlight.max = 100; /* 100% */
1692 panel->backlight.level = DIV_ROUND_UP(
1693 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1694 CRC_PMIC_PWM_PERIOD_NS);
1695 panel->backlight.enabled = panel->backlight.level != 0;
1696
1697 return 0;
1698 }
1699
1700 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1701 {
1702 struct drm_device *dev = connector->dev;
1703 struct drm_i915_private *dev_priv = dev->dev_private;
1704 struct intel_connector *intel_connector = to_intel_connector(connector);
1705 struct intel_panel *panel = &intel_connector->panel;
1706 int ret;
1707
1708 if (!dev_priv->vbt.backlight.present) {
1709 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1710 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1711 } else {
1712 DRM_DEBUG_KMS("no backlight present per VBT\n");
1713 return 0;
1714 }
1715 }
1716
1717 /* ensure intel_panel has been initialized first */
1718 if (WARN_ON(!panel->backlight.setup))
1719 return -ENODEV;
1720
1721 /* set level and max in panel struct */
1722 mutex_lock(&dev_priv->backlight_lock);
1723 ret = panel->backlight.setup(intel_connector, pipe);
1724 mutex_unlock(&dev_priv->backlight_lock);
1725
1726 if (ret) {
1727 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1728 connector->name);
1729 return ret;
1730 }
1731
1732 panel->backlight.present = true;
1733
1734 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1735 connector->name,
1736 panel->backlight.enabled ? "enabled" : "disabled",
1737 panel->backlight.level, panel->backlight.max);
1738
1739 return 0;
1740 }
1741
1742 void intel_panel_destroy_backlight(struct drm_connector *connector)
1743 {
1744 struct intel_connector *intel_connector = to_intel_connector(connector);
1745 struct intel_panel *panel = &intel_connector->panel;
1746
1747 /* dispose of the pwm */
1748 if (panel->backlight.pwm)
1749 pwm_put(panel->backlight.pwm);
1750
1751 panel->backlight.present = false;
1752 }
1753
1754 /* Set up chip specific backlight functions */
1755 static void
1756 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1757 {
1758 struct intel_connector *intel_connector =
1759 container_of(panel, struct intel_connector, panel);
1760 struct drm_device *dev = intel_connector->base.dev;
1761 struct drm_i915_private *dev_priv = dev->dev_private;
1762
1763 if (IS_BROXTON(dev)) {
1764 panel->backlight.setup = bxt_setup_backlight;
1765 panel->backlight.enable = bxt_enable_backlight;
1766 panel->backlight.disable = bxt_disable_backlight;
1767 panel->backlight.set = bxt_set_backlight;
1768 panel->backlight.get = bxt_get_backlight;
1769 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1770 } else if (HAS_PCH_LPT(dev) || HAS_PCH_SPT(dev)) {
1771 panel->backlight.setup = lpt_setup_backlight;
1772 panel->backlight.enable = lpt_enable_backlight;
1773 panel->backlight.disable = lpt_disable_backlight;
1774 panel->backlight.set = lpt_set_backlight;
1775 panel->backlight.get = lpt_get_backlight;
1776 if (HAS_PCH_LPT(dev))
1777 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1778 else
1779 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1780 } else if (HAS_PCH_SPLIT(dev)) {
1781 panel->backlight.setup = pch_setup_backlight;
1782 panel->backlight.enable = pch_enable_backlight;
1783 panel->backlight.disable = pch_disable_backlight;
1784 panel->backlight.set = pch_set_backlight;
1785 panel->backlight.get = pch_get_backlight;
1786 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1787 } else if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
1788 if (dev_priv->vbt.has_mipi) {
1789 panel->backlight.setup = pwm_setup_backlight;
1790 panel->backlight.enable = pwm_enable_backlight;
1791 panel->backlight.disable = pwm_disable_backlight;
1792 panel->backlight.set = pwm_set_backlight;
1793 panel->backlight.get = pwm_get_backlight;
1794 } else {
1795 panel->backlight.setup = vlv_setup_backlight;
1796 panel->backlight.enable = vlv_enable_backlight;
1797 panel->backlight.disable = vlv_disable_backlight;
1798 panel->backlight.set = vlv_set_backlight;
1799 panel->backlight.get = vlv_get_backlight;
1800 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1801 }
1802 } else if (IS_GEN4(dev)) {
1803 panel->backlight.setup = i965_setup_backlight;
1804 panel->backlight.enable = i965_enable_backlight;
1805 panel->backlight.disable = i965_disable_backlight;
1806 panel->backlight.set = i9xx_set_backlight;
1807 panel->backlight.get = i9xx_get_backlight;
1808 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1809 } else {
1810 panel->backlight.setup = i9xx_setup_backlight;
1811 panel->backlight.enable = i9xx_enable_backlight;
1812 panel->backlight.disable = i9xx_disable_backlight;
1813 panel->backlight.set = i9xx_set_backlight;
1814 panel->backlight.get = i9xx_get_backlight;
1815 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1816 }
1817 }
1818
1819 int intel_panel_init(struct intel_panel *panel,
1820 struct drm_display_mode *fixed_mode,
1821 struct drm_display_mode *downclock_mode)
1822 {
1823 intel_panel_init_backlight_funcs(panel);
1824
1825 panel->fixed_mode = fixed_mode;
1826 panel->downclock_mode = downclock_mode;
1827
1828 return 0;
1829 }
1830
1831 void intel_panel_fini(struct intel_panel *panel)
1832 {
1833 struct intel_connector *intel_connector =
1834 container_of(panel, struct intel_connector, panel);
1835
1836 if (panel->fixed_mode)
1837 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1838
1839 if (panel->downclock_mode)
1840 drm_mode_destroy(intel_connector->base.dev,
1841 panel->downclock_mode);
1842 }
1843
1844 void intel_backlight_register(struct drm_device *dev)
1845 {
1846 struct intel_connector *connector;
1847
1848 for_each_intel_connector(dev, connector)
1849 intel_backlight_device_register(connector);
1850 }
1851
1852 void intel_backlight_unregister(struct drm_device *dev)
1853 {
1854 struct intel_connector *connector;
1855
1856 for_each_intel_connector(dev, connector)
1857 intel_backlight_device_unregister(connector);
1858 }
This page took 0.069797 seconds and 5 git commands to generate.