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drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLs
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68 struct intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 uint32_t sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * intel_sdvo_get_capabilities()
84 */
85 struct intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /*
97 * Hotplug activation bits for this device
98 */
99 uint16_t hotplug_active;
100
101 /**
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106 bool color_range_auto;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
120 /* This is for current tv format name */
121 int tv_format_index;
122
123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
129 bool rgb_quant_range_selectable;
130
131 /**
132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
134 */
135 bool is_lvds;
136
137 /**
138 * This is sdvo fixed pannel mode pointer
139 */
140 struct drm_display_mode *sdvo_lvds_fixed_mode;
141
142 /* DDC bus used by this SDVO encoder */
143 uint8_t ddc_bus;
144
145 /*
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
147 */
148 uint8_t dtd_sdvo_flags;
149 };
150
151 struct intel_sdvo_connector {
152 struct intel_connector base;
153
154 /* Mark the type of connector */
155 uint16_t output_flag;
156
157 enum hdmi_force_audio force_audio;
158
159 /* This contains all current supported TV format */
160 u8 tv_format_supported[TV_FORMAT_NUM];
161 int format_supported_num;
162 struct drm_property *tv_format;
163
164 /* add the property for the SDVO-TV */
165 struct drm_property *left;
166 struct drm_property *right;
167 struct drm_property *top;
168 struct drm_property *bottom;
169 struct drm_property *hpos;
170 struct drm_property *vpos;
171 struct drm_property *contrast;
172 struct drm_property *saturation;
173 struct drm_property *hue;
174 struct drm_property *sharpness;
175 struct drm_property *flicker_filter;
176 struct drm_property *flicker_filter_adaptive;
177 struct drm_property *flicker_filter_2d;
178 struct drm_property *tv_chroma_filter;
179 struct drm_property *tv_luma_filter;
180 struct drm_property *dot_crawl;
181
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property *brightness;
184
185 /* Add variable to record current setting for the above property */
186 u32 left_margin, right_margin, top_margin, bottom_margin;
187
188 /* this is to get the range of margin.*/
189 u32 max_hscan, max_vscan;
190 u32 max_hpos, cur_hpos;
191 u32 max_vpos, cur_vpos;
192 u32 cur_brightness, max_brightness;
193 u32 cur_contrast, max_contrast;
194 u32 cur_saturation, max_saturation;
195 u32 cur_hue, max_hue;
196 u32 cur_sharpness, max_sharpness;
197 u32 cur_flicker_filter, max_flicker_filter;
198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
199 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
200 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
201 u32 cur_tv_luma_filter, max_tv_luma_filter;
202 u32 cur_dot_crawl, max_dot_crawl;
203 };
204
205 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
206 {
207 return container_of(encoder, struct intel_sdvo, base);
208 }
209
210 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211 {
212 return to_sdvo(intel_attached_encoder(connector));
213 }
214
215 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
216 {
217 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
218 }
219
220 static bool
221 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
222 static bool
223 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
224 struct intel_sdvo_connector *intel_sdvo_connector,
225 int type);
226 static bool
227 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
228 struct intel_sdvo_connector *intel_sdvo_connector);
229
230 /**
231 * Writes the SDVOB or SDVOC with the given value, but always writes both
232 * SDVOB and SDVOC to work around apparent hardware issues (according to
233 * comments in the BIOS).
234 */
235 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
236 {
237 struct drm_device *dev = intel_sdvo->base.base.dev;
238 struct drm_i915_private *dev_priv = dev->dev_private;
239 u32 bval = val, cval = val;
240 int i;
241
242 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
243 I915_WRITE(intel_sdvo->sdvo_reg, val);
244 I915_READ(intel_sdvo->sdvo_reg);
245 return;
246 }
247
248 if (intel_sdvo->sdvo_reg == GEN3_SDVOB)
249 cval = I915_READ(GEN3_SDVOC);
250 else
251 bval = I915_READ(GEN3_SDVOB);
252
253 /*
254 * Write the registers twice for luck. Sometimes,
255 * writing them only once doesn't appear to 'stick'.
256 * The BIOS does this too. Yay, magic
257 */
258 for (i = 0; i < 2; i++)
259 {
260 I915_WRITE(GEN3_SDVOB, bval);
261 I915_READ(GEN3_SDVOB);
262 I915_WRITE(GEN3_SDVOC, cval);
263 I915_READ(GEN3_SDVOC);
264 }
265 }
266
267 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
268 {
269 struct i2c_msg msgs[] = {
270 {
271 .addr = intel_sdvo->slave_addr,
272 .flags = 0,
273 .len = 1,
274 .buf = &addr,
275 },
276 {
277 .addr = intel_sdvo->slave_addr,
278 .flags = I2C_M_RD,
279 .len = 1,
280 .buf = ch,
281 }
282 };
283 int ret;
284
285 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
286 return true;
287
288 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
289 return false;
290 }
291
292 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
293 /** Mapping of command numbers to names, for debug output */
294 static const struct _sdvo_cmd_name {
295 u8 cmd;
296 const char *name;
297 } sdvo_cmd_names[] = {
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
341
342 /* Add the op code for SDVO enhancements */
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
387
388 /* HDMI op code */
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
409 };
410
411 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
412
413 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
414 const void *args, int args_len)
415 {
416 int i;
417
418 DRM_DEBUG_KMS("%s: W: %02X ",
419 SDVO_NAME(intel_sdvo), cmd);
420 for (i = 0; i < args_len; i++)
421 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
422 for (; i < 8; i++)
423 DRM_LOG_KMS(" ");
424 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
425 if (cmd == sdvo_cmd_names[i].cmd) {
426 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
427 break;
428 }
429 }
430 if (i == ARRAY_SIZE(sdvo_cmd_names))
431 DRM_LOG_KMS("(%02X)", cmd);
432 DRM_LOG_KMS("\n");
433 }
434
435 static const char *cmd_status_names[] = {
436 "Power on",
437 "Success",
438 "Not supported",
439 "Invalid arg",
440 "Pending",
441 "Target not specified",
442 "Scaling not supported"
443 };
444
445 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
446 const void *args, int args_len)
447 {
448 u8 *buf, status;
449 struct i2c_msg *msgs;
450 int i, ret = true;
451
452 /* Would be simpler to allocate both in one go ? */
453 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
454 if (!buf)
455 return false;
456
457 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
458 if (!msgs) {
459 kfree(buf);
460 return false;
461 }
462
463 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
464
465 for (i = 0; i < args_len; i++) {
466 msgs[i].addr = intel_sdvo->slave_addr;
467 msgs[i].flags = 0;
468 msgs[i].len = 2;
469 msgs[i].buf = buf + 2 *i;
470 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
471 buf[2*i + 1] = ((u8*)args)[i];
472 }
473 msgs[i].addr = intel_sdvo->slave_addr;
474 msgs[i].flags = 0;
475 msgs[i].len = 2;
476 msgs[i].buf = buf + 2*i;
477 buf[2*i + 0] = SDVO_I2C_OPCODE;
478 buf[2*i + 1] = cmd;
479
480 /* the following two are to read the response */
481 status = SDVO_I2C_CMD_STATUS;
482 msgs[i+1].addr = intel_sdvo->slave_addr;
483 msgs[i+1].flags = 0;
484 msgs[i+1].len = 1;
485 msgs[i+1].buf = &status;
486
487 msgs[i+2].addr = intel_sdvo->slave_addr;
488 msgs[i+2].flags = I2C_M_RD;
489 msgs[i+2].len = 1;
490 msgs[i+2].buf = &status;
491
492 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
493 if (ret < 0) {
494 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
495 ret = false;
496 goto out;
497 }
498 if (ret != i+3) {
499 /* failure in I2C transfer */
500 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
501 ret = false;
502 }
503
504 out:
505 kfree(msgs);
506 kfree(buf);
507 return ret;
508 }
509
510 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
511 void *response, int response_len)
512 {
513 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
514 u8 status;
515 int i;
516
517 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
518
519 /*
520 * The documentation states that all commands will be
521 * processed within 15µs, and that we need only poll
522 * the status byte a maximum of 3 times in order for the
523 * command to be complete.
524 *
525 * Check 5 times in case the hardware failed to read the docs.
526 *
527 * Also beware that the first response by many devices is to
528 * reply PENDING and stall for time. TVs are notorious for
529 * requiring longer than specified to complete their replies.
530 * Originally (in the DDX long ago), the delay was only ever 15ms
531 * with an additional delay of 30ms applied for TVs added later after
532 * many experiments. To accommodate both sets of delays, we do a
533 * sequence of slow checks if the device is falling behind and fails
534 * to reply within 5*15µs.
535 */
536 if (!intel_sdvo_read_byte(intel_sdvo,
537 SDVO_I2C_CMD_STATUS,
538 &status))
539 goto log_fail;
540
541 while ((status == SDVO_CMD_STATUS_PENDING ||
542 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
543 if (retry < 10)
544 msleep(15);
545 else
546 udelay(15);
547
548 if (!intel_sdvo_read_byte(intel_sdvo,
549 SDVO_I2C_CMD_STATUS,
550 &status))
551 goto log_fail;
552 }
553
554 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
555 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
556 else
557 DRM_LOG_KMS("(??? %d)", status);
558
559 if (status != SDVO_CMD_STATUS_SUCCESS)
560 goto log_fail;
561
562 /* Read the command response */
563 for (i = 0; i < response_len; i++) {
564 if (!intel_sdvo_read_byte(intel_sdvo,
565 SDVO_I2C_RETURN_0 + i,
566 &((u8 *)response)[i]))
567 goto log_fail;
568 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
569 }
570 DRM_LOG_KMS("\n");
571 return true;
572
573 log_fail:
574 DRM_LOG_KMS("... failed\n");
575 return false;
576 }
577
578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
579 {
580 if (mode->clock >= 100000)
581 return 1;
582 else if (mode->clock >= 50000)
583 return 2;
584 else
585 return 4;
586 }
587
588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
589 u8 ddc_bus)
590 {
591 /* This must be the immediately preceding write before the i2c xfer */
592 return intel_sdvo_write_cmd(intel_sdvo,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
594 &ddc_bus, 1);
595 }
596
597 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
598 {
599 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
600 return false;
601
602 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
603 }
604
605 static bool
606 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
607 {
608 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
609 return false;
610
611 return intel_sdvo_read_response(intel_sdvo, value, len);
612 }
613
614 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
615 {
616 struct intel_sdvo_set_target_input_args targets = {0};
617 return intel_sdvo_set_value(intel_sdvo,
618 SDVO_CMD_SET_TARGET_INPUT,
619 &targets, sizeof(targets));
620 }
621
622 /**
623 * Return whether each input is trained.
624 *
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
627 */
628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
629 {
630 struct intel_sdvo_get_trained_inputs_response response;
631
632 BUILD_BUG_ON(sizeof(response) != 1);
633 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
634 &response, sizeof(response)))
635 return false;
636
637 *input_1 = response.input0_trained;
638 *input_2 = response.input1_trained;
639 return true;
640 }
641
642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
643 u16 outputs)
644 {
645 return intel_sdvo_set_value(intel_sdvo,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS,
647 &outputs, sizeof(outputs));
648 }
649
650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
651 u16 *outputs)
652 {
653 return intel_sdvo_get_value(intel_sdvo,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS,
655 outputs, sizeof(*outputs));
656 }
657
658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
659 int mode)
660 {
661 u8 state = SDVO_ENCODER_STATE_ON;
662
663 switch (mode) {
664 case DRM_MODE_DPMS_ON:
665 state = SDVO_ENCODER_STATE_ON;
666 break;
667 case DRM_MODE_DPMS_STANDBY:
668 state = SDVO_ENCODER_STATE_STANDBY;
669 break;
670 case DRM_MODE_DPMS_SUSPEND:
671 state = SDVO_ENCODER_STATE_SUSPEND;
672 break;
673 case DRM_MODE_DPMS_OFF:
674 state = SDVO_ENCODER_STATE_OFF;
675 break;
676 }
677
678 return intel_sdvo_set_value(intel_sdvo,
679 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
680 }
681
682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
683 int *clock_min,
684 int *clock_max)
685 {
686 struct intel_sdvo_pixel_clock_range clocks;
687
688 BUILD_BUG_ON(sizeof(clocks) != 4);
689 if (!intel_sdvo_get_value(intel_sdvo,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
691 &clocks, sizeof(clocks)))
692 return false;
693
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min = clocks.min * 10;
696 *clock_max = clocks.max * 10;
697 return true;
698 }
699
700 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
701 u16 outputs)
702 {
703 return intel_sdvo_set_value(intel_sdvo,
704 SDVO_CMD_SET_TARGET_OUTPUT,
705 &outputs, sizeof(outputs));
706 }
707
708 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
709 struct intel_sdvo_dtd *dtd)
710 {
711 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
712 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
713 }
714
715 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
716 struct intel_sdvo_dtd *dtd)
717 {
718 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
719 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
720 }
721
722 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
723 struct intel_sdvo_dtd *dtd)
724 {
725 return intel_sdvo_set_timing(intel_sdvo,
726 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
727 }
728
729 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
730 struct intel_sdvo_dtd *dtd)
731 {
732 return intel_sdvo_set_timing(intel_sdvo,
733 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
734 }
735
736 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
737 struct intel_sdvo_dtd *dtd)
738 {
739 return intel_sdvo_get_timing(intel_sdvo,
740 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
741 }
742
743 static bool
744 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
745 uint16_t clock,
746 uint16_t width,
747 uint16_t height)
748 {
749 struct intel_sdvo_preferred_input_timing_args args;
750
751 memset(&args, 0, sizeof(args));
752 args.clock = clock;
753 args.width = width;
754 args.height = height;
755 args.interlace = 0;
756
757 if (intel_sdvo->is_lvds &&
758 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
759 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
760 args.scaled = 1;
761
762 return intel_sdvo_set_value(intel_sdvo,
763 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
764 &args, sizeof(args));
765 }
766
767 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
768 struct intel_sdvo_dtd *dtd)
769 {
770 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
771 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
772 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
773 &dtd->part1, sizeof(dtd->part1)) &&
774 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
775 &dtd->part2, sizeof(dtd->part2));
776 }
777
778 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
779 {
780 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
781 }
782
783 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
784 const struct drm_display_mode *mode)
785 {
786 uint16_t width, height;
787 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
788 uint16_t h_sync_offset, v_sync_offset;
789 int mode_clock;
790
791 width = mode->hdisplay;
792 height = mode->vdisplay;
793
794 /* do some mode translations */
795 h_blank_len = mode->htotal - mode->hdisplay;
796 h_sync_len = mode->hsync_end - mode->hsync_start;
797
798 v_blank_len = mode->vtotal - mode->vdisplay;
799 v_sync_len = mode->vsync_end - mode->vsync_start;
800
801 h_sync_offset = mode->hsync_start - mode->hdisplay;
802 v_sync_offset = mode->vsync_start - mode->vdisplay;
803
804 mode_clock = mode->clock;
805 mode_clock /= 10;
806 dtd->part1.clock = mode_clock;
807
808 dtd->part1.h_active = width & 0xff;
809 dtd->part1.h_blank = h_blank_len & 0xff;
810 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
811 ((h_blank_len >> 8) & 0xf);
812 dtd->part1.v_active = height & 0xff;
813 dtd->part1.v_blank = v_blank_len & 0xff;
814 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
815 ((v_blank_len >> 8) & 0xf);
816
817 dtd->part2.h_sync_off = h_sync_offset & 0xff;
818 dtd->part2.h_sync_width = h_sync_len & 0xff;
819 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
820 (v_sync_len & 0xf);
821 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
822 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
823 ((v_sync_len & 0x30) >> 4);
824
825 dtd->part2.dtd_flags = 0x18;
826 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
827 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
828 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
829 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
830 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
831 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
832
833 dtd->part2.sdvo_flags = 0;
834 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
835 dtd->part2.reserved = 0;
836 }
837
838 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
839 const struct intel_sdvo_dtd *dtd)
840 {
841 mode->hdisplay = dtd->part1.h_active;
842 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
843 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
844 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
845 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
846 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
847 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
848 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
849
850 mode->vdisplay = dtd->part1.v_active;
851 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
852 mode->vsync_start = mode->vdisplay;
853 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
854 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
855 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
856 mode->vsync_end = mode->vsync_start +
857 (dtd->part2.v_sync_off_width & 0xf);
858 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
859 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
860 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
861
862 mode->clock = dtd->part1.clock * 10;
863
864 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
865 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
866 mode->flags |= DRM_MODE_FLAG_INTERLACE;
867 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
868 mode->flags |= DRM_MODE_FLAG_PHSYNC;
869 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
870 mode->flags |= DRM_MODE_FLAG_PVSYNC;
871 }
872
873 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
874 {
875 struct intel_sdvo_encode encode;
876
877 BUILD_BUG_ON(sizeof(encode) != 2);
878 return intel_sdvo_get_value(intel_sdvo,
879 SDVO_CMD_GET_SUPP_ENCODE,
880 &encode, sizeof(encode));
881 }
882
883 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
884 uint8_t mode)
885 {
886 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
887 }
888
889 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
890 uint8_t mode)
891 {
892 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
893 }
894
895 #if 0
896 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
897 {
898 int i, j;
899 uint8_t set_buf_index[2];
900 uint8_t av_split;
901 uint8_t buf_size;
902 uint8_t buf[48];
903 uint8_t *pos;
904
905 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
906
907 for (i = 0; i <= av_split; i++) {
908 set_buf_index[0] = i; set_buf_index[1] = 0;
909 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
910 set_buf_index, 2);
911 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
912 intel_sdvo_read_response(encoder, &buf_size, 1);
913
914 pos = buf;
915 for (j = 0; j <= buf_size; j += 8) {
916 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
917 NULL, 0);
918 intel_sdvo_read_response(encoder, pos, 8);
919 pos += 8;
920 }
921 }
922 }
923 #endif
924
925 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
926 unsigned if_index, uint8_t tx_rate,
927 uint8_t *data, unsigned length)
928 {
929 uint8_t set_buf_index[2] = { if_index, 0 };
930 uint8_t hbuf_size, tmp[8];
931 int i;
932
933 if (!intel_sdvo_set_value(intel_sdvo,
934 SDVO_CMD_SET_HBUF_INDEX,
935 set_buf_index, 2))
936 return false;
937
938 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
939 &hbuf_size, 1))
940 return false;
941
942 /* Buffer size is 0 based, hooray! */
943 hbuf_size++;
944
945 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
946 if_index, length, hbuf_size);
947
948 for (i = 0; i < hbuf_size; i += 8) {
949 memset(tmp, 0, 8);
950 if (i < length)
951 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
952
953 if (!intel_sdvo_set_value(intel_sdvo,
954 SDVO_CMD_SET_HBUF_DATA,
955 tmp, 8))
956 return false;
957 }
958
959 return intel_sdvo_set_value(intel_sdvo,
960 SDVO_CMD_SET_HBUF_TXRATE,
961 &tx_rate, 1);
962 }
963
964 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
965 const struct drm_display_mode *adjusted_mode)
966 {
967 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
968 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
969 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
970 union hdmi_infoframe frame;
971 int ret;
972 ssize_t len;
973
974 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
975 adjusted_mode);
976 if (ret < 0) {
977 DRM_ERROR("couldn't fill AVI infoframe\n");
978 return false;
979 }
980
981 if (intel_sdvo->rgb_quant_range_selectable) {
982 if (intel_crtc->config.limited_color_range)
983 frame.avi.quantization_range =
984 HDMI_QUANTIZATION_RANGE_LIMITED;
985 else
986 frame.avi.quantization_range =
987 HDMI_QUANTIZATION_RANGE_FULL;
988 }
989
990 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
991 if (len < 0)
992 return false;
993
994 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
995 SDVO_HBUF_TX_VSYNC,
996 sdvo_data, sizeof(sdvo_data));
997 }
998
999 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
1000 {
1001 struct intel_sdvo_tv_format format;
1002 uint32_t format_map;
1003
1004 format_map = 1 << intel_sdvo->tv_format_index;
1005 memset(&format, 0, sizeof(format));
1006 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1007
1008 BUILD_BUG_ON(sizeof(format) != 6);
1009 return intel_sdvo_set_value(intel_sdvo,
1010 SDVO_CMD_SET_TV_FORMAT,
1011 &format, sizeof(format));
1012 }
1013
1014 static bool
1015 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1016 const struct drm_display_mode *mode)
1017 {
1018 struct intel_sdvo_dtd output_dtd;
1019
1020 if (!intel_sdvo_set_target_output(intel_sdvo,
1021 intel_sdvo->attached_output))
1022 return false;
1023
1024 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1025 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1026 return false;
1027
1028 return true;
1029 }
1030
1031 /* Asks the sdvo controller for the preferred input mode given the output mode.
1032 * Unfortunately we have to set up the full output mode to do that. */
1033 static bool
1034 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1035 const struct drm_display_mode *mode,
1036 struct drm_display_mode *adjusted_mode)
1037 {
1038 struct intel_sdvo_dtd input_dtd;
1039
1040 /* Reset the input timing to the screen. Assume always input 0. */
1041 if (!intel_sdvo_set_target_input(intel_sdvo))
1042 return false;
1043
1044 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1045 mode->clock / 10,
1046 mode->hdisplay,
1047 mode->vdisplay))
1048 return false;
1049
1050 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1051 &input_dtd))
1052 return false;
1053
1054 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1055 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1056
1057 return true;
1058 }
1059
1060 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
1061 {
1062 unsigned dotclock = pipe_config->port_clock;
1063 struct dpll *clock = &pipe_config->dpll;
1064
1065 /* SDVO TV has fixed PLL values depend on its clock range,
1066 this mirrors vbios setting. */
1067 if (dotclock >= 100000 && dotclock < 140500) {
1068 clock->p1 = 2;
1069 clock->p2 = 10;
1070 clock->n = 3;
1071 clock->m1 = 16;
1072 clock->m2 = 8;
1073 } else if (dotclock >= 140500 && dotclock <= 200000) {
1074 clock->p1 = 1;
1075 clock->p2 = 10;
1076 clock->n = 6;
1077 clock->m1 = 12;
1078 clock->m2 = 8;
1079 } else {
1080 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1081 }
1082
1083 pipe_config->clock_set = true;
1084 }
1085
1086 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1087 struct intel_crtc_config *pipe_config)
1088 {
1089 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1090 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1091 struct drm_display_mode *mode = &pipe_config->requested_mode;
1092
1093 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1094 pipe_config->pipe_bpp = 8*3;
1095
1096 if (HAS_PCH_SPLIT(encoder->base.dev))
1097 pipe_config->has_pch_encoder = true;
1098
1099 /* We need to construct preferred input timings based on our
1100 * output timings. To do that, we have to set the output
1101 * timings, even though this isn't really the right place in
1102 * the sequence to do it. Oh well.
1103 */
1104 if (intel_sdvo->is_tv) {
1105 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1106 return false;
1107
1108 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1109 mode,
1110 adjusted_mode);
1111 pipe_config->sdvo_tv_clock = true;
1112 } else if (intel_sdvo->is_lvds) {
1113 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1114 intel_sdvo->sdvo_lvds_fixed_mode))
1115 return false;
1116
1117 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1118 mode,
1119 adjusted_mode);
1120 }
1121
1122 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1123 * SDVO device will factor out the multiplier during mode_set.
1124 */
1125 pipe_config->pixel_multiplier =
1126 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1127
1128 if (intel_sdvo->color_range_auto) {
1129 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1130 /* FIXME: This bit is only valid when using TMDS encoding and 8
1131 * bit per color mode. */
1132 if (intel_sdvo->has_hdmi_monitor &&
1133 drm_match_cea_mode(adjusted_mode) > 1)
1134 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
1135 else
1136 intel_sdvo->color_range = 0;
1137 }
1138
1139 if (intel_sdvo->color_range)
1140 pipe_config->limited_color_range = true;
1141
1142 /* Clock computation needs to happen after pixel multiplier. */
1143 if (intel_sdvo->is_tv)
1144 i9xx_adjust_sdvo_tv_clock(pipe_config);
1145
1146 return true;
1147 }
1148
1149 static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1150 {
1151 struct drm_device *dev = intel_encoder->base.dev;
1152 struct drm_i915_private *dev_priv = dev->dev_private;
1153 struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
1154 struct drm_display_mode *adjusted_mode =
1155 &crtc->config.adjusted_mode;
1156 struct drm_display_mode *mode = &crtc->config.requested_mode;
1157 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1158 u32 sdvox;
1159 struct intel_sdvo_in_out_map in_out;
1160 struct intel_sdvo_dtd input_dtd, output_dtd;
1161 int rate;
1162
1163 if (!mode)
1164 return;
1165
1166 /* First, set the input mapping for the first input to our controlled
1167 * output. This is only correct if we're a single-input device, in
1168 * which case the first input is the output from the appropriate SDVO
1169 * channel on the motherboard. In a two-input device, the first input
1170 * will be SDVOB and the second SDVOC.
1171 */
1172 in_out.in0 = intel_sdvo->attached_output;
1173 in_out.in1 = 0;
1174
1175 intel_sdvo_set_value(intel_sdvo,
1176 SDVO_CMD_SET_IN_OUT_MAP,
1177 &in_out, sizeof(in_out));
1178
1179 /* Set the output timings to the screen */
1180 if (!intel_sdvo_set_target_output(intel_sdvo,
1181 intel_sdvo->attached_output))
1182 return;
1183
1184 /* lvds has a special fixed output timing. */
1185 if (intel_sdvo->is_lvds)
1186 intel_sdvo_get_dtd_from_mode(&output_dtd,
1187 intel_sdvo->sdvo_lvds_fixed_mode);
1188 else
1189 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1190 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1191 DRM_INFO("Setting output timings on %s failed\n",
1192 SDVO_NAME(intel_sdvo));
1193
1194 /* Set the input timing to the screen. Assume always input 0. */
1195 if (!intel_sdvo_set_target_input(intel_sdvo))
1196 return;
1197
1198 if (intel_sdvo->has_hdmi_monitor) {
1199 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1200 intel_sdvo_set_colorimetry(intel_sdvo,
1201 SDVO_COLORIMETRY_RGB256);
1202 intel_sdvo_set_avi_infoframe(intel_sdvo, adjusted_mode);
1203 } else
1204 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1205
1206 if (intel_sdvo->is_tv &&
1207 !intel_sdvo_set_tv_format(intel_sdvo))
1208 return;
1209
1210 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1211
1212 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1213 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1214 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1215 DRM_INFO("Setting input timings on %s failed\n",
1216 SDVO_NAME(intel_sdvo));
1217
1218 switch (crtc->config.pixel_multiplier) {
1219 default:
1220 WARN(1, "unknown pixel mutlipler specified\n");
1221 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1222 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1223 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1224 }
1225 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1226 return;
1227
1228 /* Set the SDVO control regs. */
1229 if (INTEL_INFO(dev)->gen >= 4) {
1230 /* The real mode polarity is set by the SDVO commands, using
1231 * struct intel_sdvo_dtd. */
1232 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1233 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi)
1234 sdvox |= intel_sdvo->color_range;
1235 if (INTEL_INFO(dev)->gen < 5)
1236 sdvox |= SDVO_BORDER_ENABLE;
1237 } else {
1238 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1239 switch (intel_sdvo->sdvo_reg) {
1240 case GEN3_SDVOB:
1241 sdvox &= SDVOB_PRESERVE_MASK;
1242 break;
1243 case GEN3_SDVOC:
1244 sdvox &= SDVOC_PRESERVE_MASK;
1245 break;
1246 }
1247 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1248 }
1249
1250 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1251 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1252 else
1253 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1254
1255 if (intel_sdvo->has_hdmi_audio)
1256 sdvox |= SDVO_AUDIO_ENABLE;
1257
1258 if (INTEL_INFO(dev)->gen >= 4) {
1259 /* done in crtc_mode_set as the dpll_md reg must be written early */
1260 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1261 /* done in crtc_mode_set as it lives inside the dpll register */
1262 } else {
1263 sdvox |= (crtc->config.pixel_multiplier - 1)
1264 << SDVO_PORT_MULTIPLY_SHIFT;
1265 }
1266
1267 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1268 INTEL_INFO(dev)->gen < 5)
1269 sdvox |= SDVO_STALL_SELECT;
1270 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1271 }
1272
1273 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1274 {
1275 struct intel_sdvo_connector *intel_sdvo_connector =
1276 to_intel_sdvo_connector(&connector->base);
1277 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1278 u16 active_outputs = 0;
1279
1280 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1281
1282 if (active_outputs & intel_sdvo_connector->output_flag)
1283 return true;
1284 else
1285 return false;
1286 }
1287
1288 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1289 enum pipe *pipe)
1290 {
1291 struct drm_device *dev = encoder->base.dev;
1292 struct drm_i915_private *dev_priv = dev->dev_private;
1293 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1294 u16 active_outputs = 0;
1295 u32 tmp;
1296
1297 tmp = I915_READ(intel_sdvo->sdvo_reg);
1298 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1299
1300 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1301 return false;
1302
1303 if (HAS_PCH_CPT(dev))
1304 *pipe = PORT_TO_PIPE_CPT(tmp);
1305 else
1306 *pipe = PORT_TO_PIPE(tmp);
1307
1308 return true;
1309 }
1310
1311 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1312 struct intel_crtc_config *pipe_config)
1313 {
1314 struct drm_device *dev = encoder->base.dev;
1315 struct drm_i915_private *dev_priv = dev->dev_private;
1316 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1317 struct intel_sdvo_dtd dtd;
1318 int encoder_pixel_multiplier = 0;
1319 u32 flags = 0, sdvox;
1320 u8 val;
1321 bool ret;
1322
1323 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1324 if (!ret) {
1325 /* Some sdvo encoders are not spec compliant and don't
1326 * implement the mandatory get_timings function. */
1327 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1328 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1329 } else {
1330 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1331 flags |= DRM_MODE_FLAG_PHSYNC;
1332 else
1333 flags |= DRM_MODE_FLAG_NHSYNC;
1334
1335 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1336 flags |= DRM_MODE_FLAG_PVSYNC;
1337 else
1338 flags |= DRM_MODE_FLAG_NVSYNC;
1339 }
1340
1341 pipe_config->adjusted_mode.flags |= flags;
1342
1343 /*
1344 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1345 * the sdvo port register, on all other platforms it is part of the dpll
1346 * state. Since the general pipe state readout happens before the
1347 * encoder->get_config we so already have a valid pixel multplier on all
1348 * other platfroms.
1349 */
1350 if (IS_I915G(dev) || IS_I915GM(dev)) {
1351 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1352 pipe_config->pixel_multiplier =
1353 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1354 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1355 }
1356
1357 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1358 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1359 &val, 1)) {
1360 switch (val) {
1361 case SDVO_CLOCK_RATE_MULT_1X:
1362 encoder_pixel_multiplier = 1;
1363 break;
1364 case SDVO_CLOCK_RATE_MULT_2X:
1365 encoder_pixel_multiplier = 2;
1366 break;
1367 case SDVO_CLOCK_RATE_MULT_4X:
1368 encoder_pixel_multiplier = 4;
1369 break;
1370 }
1371 }
1372
1373 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1374 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1375 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1376 }
1377
1378 static void intel_disable_sdvo(struct intel_encoder *encoder)
1379 {
1380 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1381 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1382 u32 temp;
1383
1384 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1385 if (0)
1386 intel_sdvo_set_encoder_power_state(intel_sdvo,
1387 DRM_MODE_DPMS_OFF);
1388
1389 temp = I915_READ(intel_sdvo->sdvo_reg);
1390 if ((temp & SDVO_ENABLE) != 0) {
1391 /* HW workaround for IBX, we need to move the port to
1392 * transcoder A before disabling it. */
1393 if (HAS_PCH_IBX(encoder->base.dev)) {
1394 struct drm_crtc *crtc = encoder->base.crtc;
1395 int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
1396
1397 if (temp & SDVO_PIPE_B_SELECT) {
1398 temp &= ~SDVO_PIPE_B_SELECT;
1399 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1400 POSTING_READ(intel_sdvo->sdvo_reg);
1401
1402 /* Again we need to write this twice. */
1403 I915_WRITE(intel_sdvo->sdvo_reg, temp);
1404 POSTING_READ(intel_sdvo->sdvo_reg);
1405
1406 /* Transcoder selection bits only update
1407 * effectively on vblank. */
1408 if (crtc)
1409 intel_wait_for_vblank(encoder->base.dev, pipe);
1410 else
1411 msleep(50);
1412 }
1413 }
1414
1415 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1416 }
1417 }
1418
1419 static void intel_enable_sdvo(struct intel_encoder *encoder)
1420 {
1421 struct drm_device *dev = encoder->base.dev;
1422 struct drm_i915_private *dev_priv = dev->dev_private;
1423 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1424 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1425 u32 temp;
1426 bool input1, input2;
1427 int i;
1428 u8 status;
1429
1430 temp = I915_READ(intel_sdvo->sdvo_reg);
1431 if ((temp & SDVO_ENABLE) == 0) {
1432 /* HW workaround for IBX, we need to move the port
1433 * to transcoder A before disabling it, so restore it here. */
1434 if (HAS_PCH_IBX(dev))
1435 temp |= SDVO_PIPE_SEL(intel_crtc->pipe);
1436
1437 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1438 }
1439 for (i = 0; i < 2; i++)
1440 intel_wait_for_vblank(dev, intel_crtc->pipe);
1441
1442 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1443 /* Warn if the device reported failure to sync.
1444 * A lot of SDVO devices fail to notify of sync, but it's
1445 * a given it the status is a success, we succeeded.
1446 */
1447 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1448 DRM_DEBUG_KMS("First %s output reported failure to "
1449 "sync\n", SDVO_NAME(intel_sdvo));
1450 }
1451
1452 if (0)
1453 intel_sdvo_set_encoder_power_state(intel_sdvo,
1454 DRM_MODE_DPMS_ON);
1455 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1456 }
1457
1458 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1459 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1460 {
1461 struct drm_crtc *crtc;
1462 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1463
1464 /* dvo supports only 2 dpms states. */
1465 if (mode != DRM_MODE_DPMS_ON)
1466 mode = DRM_MODE_DPMS_OFF;
1467
1468 if (mode == connector->dpms)
1469 return;
1470
1471 connector->dpms = mode;
1472
1473 /* Only need to change hw state when actually enabled */
1474 crtc = intel_sdvo->base.base.crtc;
1475 if (!crtc) {
1476 intel_sdvo->base.connectors_active = false;
1477 return;
1478 }
1479
1480 /* We set active outputs manually below in case pipe dpms doesn't change
1481 * due to cloning. */
1482 if (mode != DRM_MODE_DPMS_ON) {
1483 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1484 if (0)
1485 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1486
1487 intel_sdvo->base.connectors_active = false;
1488
1489 intel_crtc_update_dpms(crtc);
1490 } else {
1491 intel_sdvo->base.connectors_active = true;
1492
1493 intel_crtc_update_dpms(crtc);
1494
1495 if (0)
1496 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1497 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1498 }
1499
1500 intel_modeset_check_state(connector->dev);
1501 }
1502
1503 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1504 struct drm_display_mode *mode)
1505 {
1506 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1507
1508 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1509 return MODE_NO_DBLESCAN;
1510
1511 if (intel_sdvo->pixel_clock_min > mode->clock)
1512 return MODE_CLOCK_LOW;
1513
1514 if (intel_sdvo->pixel_clock_max < mode->clock)
1515 return MODE_CLOCK_HIGH;
1516
1517 if (intel_sdvo->is_lvds) {
1518 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1519 return MODE_PANEL;
1520
1521 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1522 return MODE_PANEL;
1523 }
1524
1525 return MODE_OK;
1526 }
1527
1528 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1529 {
1530 BUILD_BUG_ON(sizeof(*caps) != 8);
1531 if (!intel_sdvo_get_value(intel_sdvo,
1532 SDVO_CMD_GET_DEVICE_CAPS,
1533 caps, sizeof(*caps)))
1534 return false;
1535
1536 DRM_DEBUG_KMS("SDVO capabilities:\n"
1537 " vendor_id: %d\n"
1538 " device_id: %d\n"
1539 " device_rev_id: %d\n"
1540 " sdvo_version_major: %d\n"
1541 " sdvo_version_minor: %d\n"
1542 " sdvo_inputs_mask: %d\n"
1543 " smooth_scaling: %d\n"
1544 " sharp_scaling: %d\n"
1545 " up_scaling: %d\n"
1546 " down_scaling: %d\n"
1547 " stall_support: %d\n"
1548 " output_flags: %d\n",
1549 caps->vendor_id,
1550 caps->device_id,
1551 caps->device_rev_id,
1552 caps->sdvo_version_major,
1553 caps->sdvo_version_minor,
1554 caps->sdvo_inputs_mask,
1555 caps->smooth_scaling,
1556 caps->sharp_scaling,
1557 caps->up_scaling,
1558 caps->down_scaling,
1559 caps->stall_support,
1560 caps->output_flags);
1561
1562 return true;
1563 }
1564
1565 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1566 {
1567 struct drm_device *dev = intel_sdvo->base.base.dev;
1568 uint16_t hotplug;
1569
1570 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1571 * on the line. */
1572 if (IS_I945G(dev) || IS_I945GM(dev))
1573 return 0;
1574
1575 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1576 &hotplug, sizeof(hotplug)))
1577 return 0;
1578
1579 return hotplug;
1580 }
1581
1582 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1583 {
1584 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1585
1586 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1587 &intel_sdvo->hotplug_active, 2);
1588 }
1589
1590 static bool
1591 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1592 {
1593 /* Is there more than one type of output? */
1594 return hweight16(intel_sdvo->caps.output_flags) > 1;
1595 }
1596
1597 static struct edid *
1598 intel_sdvo_get_edid(struct drm_connector *connector)
1599 {
1600 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1601 return drm_get_edid(connector, &sdvo->ddc);
1602 }
1603
1604 /* Mac mini hack -- use the same DDC as the analog connector */
1605 static struct edid *
1606 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1607 {
1608 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1609
1610 return drm_get_edid(connector,
1611 intel_gmbus_get_adapter(dev_priv,
1612 dev_priv->vbt.crt_ddc_pin));
1613 }
1614
1615 static enum drm_connector_status
1616 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1617 {
1618 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1619 enum drm_connector_status status;
1620 struct edid *edid;
1621
1622 edid = intel_sdvo_get_edid(connector);
1623
1624 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1625 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1626
1627 /*
1628 * Don't use the 1 as the argument of DDC bus switch to get
1629 * the EDID. It is used for SDVO SPD ROM.
1630 */
1631 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1632 intel_sdvo->ddc_bus = ddc;
1633 edid = intel_sdvo_get_edid(connector);
1634 if (edid)
1635 break;
1636 }
1637 /*
1638 * If we found the EDID on the other bus,
1639 * assume that is the correct DDC bus.
1640 */
1641 if (edid == NULL)
1642 intel_sdvo->ddc_bus = saved_ddc;
1643 }
1644
1645 /*
1646 * When there is no edid and no monitor is connected with VGA
1647 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1648 */
1649 if (edid == NULL)
1650 edid = intel_sdvo_get_analog_edid(connector);
1651
1652 status = connector_status_unknown;
1653 if (edid != NULL) {
1654 /* DDC bus is shared, match EDID to connector type */
1655 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1656 status = connector_status_connected;
1657 if (intel_sdvo->is_hdmi) {
1658 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1659 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1660 intel_sdvo->rgb_quant_range_selectable =
1661 drm_rgb_quant_range_selectable(edid);
1662 }
1663 } else
1664 status = connector_status_disconnected;
1665 kfree(edid);
1666 }
1667
1668 if (status == connector_status_connected) {
1669 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1670 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1671 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1672 }
1673
1674 return status;
1675 }
1676
1677 static bool
1678 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1679 struct edid *edid)
1680 {
1681 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1682 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1683
1684 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1685 connector_is_digital, monitor_is_digital);
1686 return connector_is_digital == monitor_is_digital;
1687 }
1688
1689 static enum drm_connector_status
1690 intel_sdvo_detect(struct drm_connector *connector, bool force)
1691 {
1692 uint16_t response;
1693 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1694 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1695 enum drm_connector_status ret;
1696
1697 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1698 connector->base.id, drm_get_connector_name(connector));
1699
1700 if (!intel_sdvo_get_value(intel_sdvo,
1701 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1702 &response, 2))
1703 return connector_status_unknown;
1704
1705 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1706 response & 0xff, response >> 8,
1707 intel_sdvo_connector->output_flag);
1708
1709 if (response == 0)
1710 return connector_status_disconnected;
1711
1712 intel_sdvo->attached_output = response;
1713
1714 intel_sdvo->has_hdmi_monitor = false;
1715 intel_sdvo->has_hdmi_audio = false;
1716 intel_sdvo->rgb_quant_range_selectable = false;
1717
1718 if ((intel_sdvo_connector->output_flag & response) == 0)
1719 ret = connector_status_disconnected;
1720 else if (IS_TMDS(intel_sdvo_connector))
1721 ret = intel_sdvo_tmds_sink_detect(connector);
1722 else {
1723 struct edid *edid;
1724
1725 /* if we have an edid check it matches the connection */
1726 edid = intel_sdvo_get_edid(connector);
1727 if (edid == NULL)
1728 edid = intel_sdvo_get_analog_edid(connector);
1729 if (edid != NULL) {
1730 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1731 edid))
1732 ret = connector_status_connected;
1733 else
1734 ret = connector_status_disconnected;
1735
1736 kfree(edid);
1737 } else
1738 ret = connector_status_connected;
1739 }
1740
1741 /* May update encoder flag for like clock for SDVO TV, etc.*/
1742 if (ret == connector_status_connected) {
1743 intel_sdvo->is_tv = false;
1744 intel_sdvo->is_lvds = false;
1745
1746 if (response & SDVO_TV_MASK)
1747 intel_sdvo->is_tv = true;
1748 if (response & SDVO_LVDS_MASK)
1749 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1750 }
1751
1752 return ret;
1753 }
1754
1755 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1756 {
1757 struct edid *edid;
1758
1759 /* set the bus switch and get the modes */
1760 edid = intel_sdvo_get_edid(connector);
1761
1762 /*
1763 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1764 * link between analog and digital outputs. So, if the regular SDVO
1765 * DDC fails, check to see if the analog output is disconnected, in
1766 * which case we'll look there for the digital DDC data.
1767 */
1768 if (edid == NULL)
1769 edid = intel_sdvo_get_analog_edid(connector);
1770
1771 if (edid != NULL) {
1772 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1773 edid)) {
1774 drm_mode_connector_update_edid_property(connector, edid);
1775 drm_add_edid_modes(connector, edid);
1776 }
1777
1778 kfree(edid);
1779 }
1780 }
1781
1782 /*
1783 * Set of SDVO TV modes.
1784 * Note! This is in reply order (see loop in get_tv_modes).
1785 * XXX: all 60Hz refresh?
1786 */
1787 static const struct drm_display_mode sdvo_tv_modes[] = {
1788 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1789 416, 0, 200, 201, 232, 233, 0,
1790 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1791 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1792 416, 0, 240, 241, 272, 273, 0,
1793 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1794 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1795 496, 0, 300, 301, 332, 333, 0,
1796 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1797 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1798 736, 0, 350, 351, 382, 383, 0,
1799 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1800 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1801 736, 0, 400, 401, 432, 433, 0,
1802 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1803 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1804 736, 0, 480, 481, 512, 513, 0,
1805 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1806 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1807 800, 0, 480, 481, 512, 513, 0,
1808 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1809 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1810 800, 0, 576, 577, 608, 609, 0,
1811 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1812 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1813 816, 0, 350, 351, 382, 383, 0,
1814 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1815 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1816 816, 0, 400, 401, 432, 433, 0,
1817 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1818 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1819 816, 0, 480, 481, 512, 513, 0,
1820 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1821 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1822 816, 0, 540, 541, 572, 573, 0,
1823 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1824 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1825 816, 0, 576, 577, 608, 609, 0,
1826 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1827 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1828 864, 0, 576, 577, 608, 609, 0,
1829 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1830 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1831 896, 0, 600, 601, 632, 633, 0,
1832 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1833 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1834 928, 0, 624, 625, 656, 657, 0,
1835 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1836 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1837 1016, 0, 766, 767, 798, 799, 0,
1838 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1839 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1840 1120, 0, 768, 769, 800, 801, 0,
1841 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1842 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1843 1376, 0, 1024, 1025, 1056, 1057, 0,
1844 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1845 };
1846
1847 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1848 {
1849 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1850 struct intel_sdvo_sdtv_resolution_request tv_res;
1851 uint32_t reply = 0, format_map = 0;
1852 int i;
1853
1854 /* Read the list of supported input resolutions for the selected TV
1855 * format.
1856 */
1857 format_map = 1 << intel_sdvo->tv_format_index;
1858 memcpy(&tv_res, &format_map,
1859 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1860
1861 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1862 return;
1863
1864 BUILD_BUG_ON(sizeof(tv_res) != 3);
1865 if (!intel_sdvo_write_cmd(intel_sdvo,
1866 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1867 &tv_res, sizeof(tv_res)))
1868 return;
1869 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1870 return;
1871
1872 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1873 if (reply & (1 << i)) {
1874 struct drm_display_mode *nmode;
1875 nmode = drm_mode_duplicate(connector->dev,
1876 &sdvo_tv_modes[i]);
1877 if (nmode)
1878 drm_mode_probed_add(connector, nmode);
1879 }
1880 }
1881
1882 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1883 {
1884 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1885 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1886 struct drm_display_mode *newmode;
1887
1888 /*
1889 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1890 * SDVO->LVDS transcoders can't cope with the EDID mode.
1891 */
1892 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1893 newmode = drm_mode_duplicate(connector->dev,
1894 dev_priv->vbt.sdvo_lvds_vbt_mode);
1895 if (newmode != NULL) {
1896 /* Guarantee the mode is preferred */
1897 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1898 DRM_MODE_TYPE_DRIVER);
1899 drm_mode_probed_add(connector, newmode);
1900 }
1901 }
1902
1903 /*
1904 * Attempt to get the mode list from DDC.
1905 * Assume that the preferred modes are
1906 * arranged in priority order.
1907 */
1908 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
1909
1910 list_for_each_entry(newmode, &connector->probed_modes, head) {
1911 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1912 intel_sdvo->sdvo_lvds_fixed_mode =
1913 drm_mode_duplicate(connector->dev, newmode);
1914
1915 intel_sdvo->is_lvds = true;
1916 break;
1917 }
1918 }
1919
1920 }
1921
1922 static int intel_sdvo_get_modes(struct drm_connector *connector)
1923 {
1924 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1925
1926 if (IS_TV(intel_sdvo_connector))
1927 intel_sdvo_get_tv_modes(connector);
1928 else if (IS_LVDS(intel_sdvo_connector))
1929 intel_sdvo_get_lvds_modes(connector);
1930 else
1931 intel_sdvo_get_ddc_modes(connector);
1932
1933 return !list_empty(&connector->probed_modes);
1934 }
1935
1936 static void
1937 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1938 {
1939 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1940 struct drm_device *dev = connector->dev;
1941
1942 if (intel_sdvo_connector->left)
1943 drm_property_destroy(dev, intel_sdvo_connector->left);
1944 if (intel_sdvo_connector->right)
1945 drm_property_destroy(dev, intel_sdvo_connector->right);
1946 if (intel_sdvo_connector->top)
1947 drm_property_destroy(dev, intel_sdvo_connector->top);
1948 if (intel_sdvo_connector->bottom)
1949 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1950 if (intel_sdvo_connector->hpos)
1951 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1952 if (intel_sdvo_connector->vpos)
1953 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1954 if (intel_sdvo_connector->saturation)
1955 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1956 if (intel_sdvo_connector->contrast)
1957 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1958 if (intel_sdvo_connector->hue)
1959 drm_property_destroy(dev, intel_sdvo_connector->hue);
1960 if (intel_sdvo_connector->sharpness)
1961 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1962 if (intel_sdvo_connector->flicker_filter)
1963 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1964 if (intel_sdvo_connector->flicker_filter_2d)
1965 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1966 if (intel_sdvo_connector->flicker_filter_adaptive)
1967 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1968 if (intel_sdvo_connector->tv_luma_filter)
1969 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1970 if (intel_sdvo_connector->tv_chroma_filter)
1971 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1972 if (intel_sdvo_connector->dot_crawl)
1973 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1974 if (intel_sdvo_connector->brightness)
1975 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1976 }
1977
1978 static void intel_sdvo_destroy(struct drm_connector *connector)
1979 {
1980 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1981
1982 if (intel_sdvo_connector->tv_format)
1983 drm_property_destroy(connector->dev,
1984 intel_sdvo_connector->tv_format);
1985
1986 intel_sdvo_destroy_enhance_property(connector);
1987 drm_sysfs_connector_remove(connector);
1988 drm_connector_cleanup(connector);
1989 kfree(intel_sdvo_connector);
1990 }
1991
1992 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1993 {
1994 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1995 struct edid *edid;
1996 bool has_audio = false;
1997
1998 if (!intel_sdvo->is_hdmi)
1999 return false;
2000
2001 edid = intel_sdvo_get_edid(connector);
2002 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
2003 has_audio = drm_detect_monitor_audio(edid);
2004 kfree(edid);
2005
2006 return has_audio;
2007 }
2008
2009 static int
2010 intel_sdvo_set_property(struct drm_connector *connector,
2011 struct drm_property *property,
2012 uint64_t val)
2013 {
2014 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
2015 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2016 struct drm_i915_private *dev_priv = connector->dev->dev_private;
2017 uint16_t temp_value;
2018 uint8_t cmd;
2019 int ret;
2020
2021 ret = drm_object_property_set_value(&connector->base, property, val);
2022 if (ret)
2023 return ret;
2024
2025 if (property == dev_priv->force_audio_property) {
2026 int i = val;
2027 bool has_audio;
2028
2029 if (i == intel_sdvo_connector->force_audio)
2030 return 0;
2031
2032 intel_sdvo_connector->force_audio = i;
2033
2034 if (i == HDMI_AUDIO_AUTO)
2035 has_audio = intel_sdvo_detect_hdmi_audio(connector);
2036 else
2037 has_audio = (i == HDMI_AUDIO_ON);
2038
2039 if (has_audio == intel_sdvo->has_hdmi_audio)
2040 return 0;
2041
2042 intel_sdvo->has_hdmi_audio = has_audio;
2043 goto done;
2044 }
2045
2046 if (property == dev_priv->broadcast_rgb_property) {
2047 bool old_auto = intel_sdvo->color_range_auto;
2048 uint32_t old_range = intel_sdvo->color_range;
2049
2050 switch (val) {
2051 case INTEL_BROADCAST_RGB_AUTO:
2052 intel_sdvo->color_range_auto = true;
2053 break;
2054 case INTEL_BROADCAST_RGB_FULL:
2055 intel_sdvo->color_range_auto = false;
2056 intel_sdvo->color_range = 0;
2057 break;
2058 case INTEL_BROADCAST_RGB_LIMITED:
2059 intel_sdvo->color_range_auto = false;
2060 /* FIXME: this bit is only valid when using TMDS
2061 * encoding and 8 bit per color mode. */
2062 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235;
2063 break;
2064 default:
2065 return -EINVAL;
2066 }
2067
2068 if (old_auto == intel_sdvo->color_range_auto &&
2069 old_range == intel_sdvo->color_range)
2070 return 0;
2071
2072 goto done;
2073 }
2074
2075 #define CHECK_PROPERTY(name, NAME) \
2076 if (intel_sdvo_connector->name == property) { \
2077 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2078 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2079 cmd = SDVO_CMD_SET_##NAME; \
2080 intel_sdvo_connector->cur_##name = temp_value; \
2081 goto set_value; \
2082 }
2083
2084 if (property == intel_sdvo_connector->tv_format) {
2085 if (val >= TV_FORMAT_NUM)
2086 return -EINVAL;
2087
2088 if (intel_sdvo->tv_format_index ==
2089 intel_sdvo_connector->tv_format_supported[val])
2090 return 0;
2091
2092 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
2093 goto done;
2094 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
2095 temp_value = val;
2096 if (intel_sdvo_connector->left == property) {
2097 drm_object_property_set_value(&connector->base,
2098 intel_sdvo_connector->right, val);
2099 if (intel_sdvo_connector->left_margin == temp_value)
2100 return 0;
2101
2102 intel_sdvo_connector->left_margin = temp_value;
2103 intel_sdvo_connector->right_margin = temp_value;
2104 temp_value = intel_sdvo_connector->max_hscan -
2105 intel_sdvo_connector->left_margin;
2106 cmd = SDVO_CMD_SET_OVERSCAN_H;
2107 goto set_value;
2108 } else if (intel_sdvo_connector->right == property) {
2109 drm_object_property_set_value(&connector->base,
2110 intel_sdvo_connector->left, val);
2111 if (intel_sdvo_connector->right_margin == temp_value)
2112 return 0;
2113
2114 intel_sdvo_connector->left_margin = temp_value;
2115 intel_sdvo_connector->right_margin = temp_value;
2116 temp_value = intel_sdvo_connector->max_hscan -
2117 intel_sdvo_connector->left_margin;
2118 cmd = SDVO_CMD_SET_OVERSCAN_H;
2119 goto set_value;
2120 } else if (intel_sdvo_connector->top == property) {
2121 drm_object_property_set_value(&connector->base,
2122 intel_sdvo_connector->bottom, val);
2123 if (intel_sdvo_connector->top_margin == temp_value)
2124 return 0;
2125
2126 intel_sdvo_connector->top_margin = temp_value;
2127 intel_sdvo_connector->bottom_margin = temp_value;
2128 temp_value = intel_sdvo_connector->max_vscan -
2129 intel_sdvo_connector->top_margin;
2130 cmd = SDVO_CMD_SET_OVERSCAN_V;
2131 goto set_value;
2132 } else if (intel_sdvo_connector->bottom == property) {
2133 drm_object_property_set_value(&connector->base,
2134 intel_sdvo_connector->top, val);
2135 if (intel_sdvo_connector->bottom_margin == temp_value)
2136 return 0;
2137
2138 intel_sdvo_connector->top_margin = temp_value;
2139 intel_sdvo_connector->bottom_margin = temp_value;
2140 temp_value = intel_sdvo_connector->max_vscan -
2141 intel_sdvo_connector->top_margin;
2142 cmd = SDVO_CMD_SET_OVERSCAN_V;
2143 goto set_value;
2144 }
2145 CHECK_PROPERTY(hpos, HPOS)
2146 CHECK_PROPERTY(vpos, VPOS)
2147 CHECK_PROPERTY(saturation, SATURATION)
2148 CHECK_PROPERTY(contrast, CONTRAST)
2149 CHECK_PROPERTY(hue, HUE)
2150 CHECK_PROPERTY(brightness, BRIGHTNESS)
2151 CHECK_PROPERTY(sharpness, SHARPNESS)
2152 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
2153 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
2154 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
2155 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
2156 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
2157 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
2158 }
2159
2160 return -EINVAL; /* unknown property */
2161
2162 set_value:
2163 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
2164 return -EIO;
2165
2166
2167 done:
2168 if (intel_sdvo->base.base.crtc)
2169 intel_crtc_restore_mode(intel_sdvo->base.base.crtc);
2170
2171 return 0;
2172 #undef CHECK_PROPERTY
2173 }
2174
2175 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2176 .dpms = intel_sdvo_dpms,
2177 .detect = intel_sdvo_detect,
2178 .fill_modes = drm_helper_probe_single_connector_modes,
2179 .set_property = intel_sdvo_set_property,
2180 .destroy = intel_sdvo_destroy,
2181 };
2182
2183 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2184 .get_modes = intel_sdvo_get_modes,
2185 .mode_valid = intel_sdvo_mode_valid,
2186 .best_encoder = intel_best_encoder,
2187 };
2188
2189 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2190 {
2191 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2192
2193 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2194 drm_mode_destroy(encoder->dev,
2195 intel_sdvo->sdvo_lvds_fixed_mode);
2196
2197 i2c_del_adapter(&intel_sdvo->ddc);
2198 intel_encoder_destroy(encoder);
2199 }
2200
2201 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2202 .destroy = intel_sdvo_enc_destroy,
2203 };
2204
2205 static void
2206 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2207 {
2208 uint16_t mask = 0;
2209 unsigned int num_bits;
2210
2211 /* Make a mask of outputs less than or equal to our own priority in the
2212 * list.
2213 */
2214 switch (sdvo->controlled_output) {
2215 case SDVO_OUTPUT_LVDS1:
2216 mask |= SDVO_OUTPUT_LVDS1;
2217 case SDVO_OUTPUT_LVDS0:
2218 mask |= SDVO_OUTPUT_LVDS0;
2219 case SDVO_OUTPUT_TMDS1:
2220 mask |= SDVO_OUTPUT_TMDS1;
2221 case SDVO_OUTPUT_TMDS0:
2222 mask |= SDVO_OUTPUT_TMDS0;
2223 case SDVO_OUTPUT_RGB1:
2224 mask |= SDVO_OUTPUT_RGB1;
2225 case SDVO_OUTPUT_RGB0:
2226 mask |= SDVO_OUTPUT_RGB0;
2227 break;
2228 }
2229
2230 /* Count bits to find what number we are in the priority list. */
2231 mask &= sdvo->caps.output_flags;
2232 num_bits = hweight16(mask);
2233 /* If more than 3 outputs, default to DDC bus 3 for now. */
2234 if (num_bits > 3)
2235 num_bits = 3;
2236
2237 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2238 sdvo->ddc_bus = 1 << num_bits;
2239 }
2240
2241 /**
2242 * Choose the appropriate DDC bus for control bus switch command for this
2243 * SDVO output based on the controlled output.
2244 *
2245 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2246 * outputs, then LVDS outputs.
2247 */
2248 static void
2249 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2250 struct intel_sdvo *sdvo, u32 reg)
2251 {
2252 struct sdvo_device_mapping *mapping;
2253
2254 if (sdvo->is_sdvob)
2255 mapping = &(dev_priv->sdvo_mappings[0]);
2256 else
2257 mapping = &(dev_priv->sdvo_mappings[1]);
2258
2259 if (mapping->initialized)
2260 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2261 else
2262 intel_sdvo_guess_ddc_bus(sdvo);
2263 }
2264
2265 static void
2266 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2267 struct intel_sdvo *sdvo, u32 reg)
2268 {
2269 struct sdvo_device_mapping *mapping;
2270 u8 pin;
2271
2272 if (sdvo->is_sdvob)
2273 mapping = &dev_priv->sdvo_mappings[0];
2274 else
2275 mapping = &dev_priv->sdvo_mappings[1];
2276
2277 if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
2278 pin = mapping->i2c_pin;
2279 else
2280 pin = GMBUS_PORT_DPB;
2281
2282 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2283
2284 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2285 * our code totally fails once we start using gmbus. Hence fall back to
2286 * bit banging for now. */
2287 intel_gmbus_force_bit(sdvo->i2c, true);
2288 }
2289
2290 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2291 static void
2292 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2293 {
2294 intel_gmbus_force_bit(sdvo->i2c, false);
2295 }
2296
2297 static bool
2298 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2299 {
2300 return intel_sdvo_check_supp_encode(intel_sdvo);
2301 }
2302
2303 static u8
2304 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2305 {
2306 struct drm_i915_private *dev_priv = dev->dev_private;
2307 struct sdvo_device_mapping *my_mapping, *other_mapping;
2308
2309 if (sdvo->is_sdvob) {
2310 my_mapping = &dev_priv->sdvo_mappings[0];
2311 other_mapping = &dev_priv->sdvo_mappings[1];
2312 } else {
2313 my_mapping = &dev_priv->sdvo_mappings[1];
2314 other_mapping = &dev_priv->sdvo_mappings[0];
2315 }
2316
2317 /* If the BIOS described our SDVO device, take advantage of it. */
2318 if (my_mapping->slave_addr)
2319 return my_mapping->slave_addr;
2320
2321 /* If the BIOS only described a different SDVO device, use the
2322 * address that it isn't using.
2323 */
2324 if (other_mapping->slave_addr) {
2325 if (other_mapping->slave_addr == 0x70)
2326 return 0x72;
2327 else
2328 return 0x70;
2329 }
2330
2331 /* No SDVO device info is found for another DVO port,
2332 * so use mapping assumption we had before BIOS parsing.
2333 */
2334 if (sdvo->is_sdvob)
2335 return 0x70;
2336 else
2337 return 0x72;
2338 }
2339
2340 static void
2341 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2342 struct intel_sdvo *encoder)
2343 {
2344 drm_connector_init(encoder->base.base.dev,
2345 &connector->base.base,
2346 &intel_sdvo_connector_funcs,
2347 connector->base.base.connector_type);
2348
2349 drm_connector_helper_add(&connector->base.base,
2350 &intel_sdvo_connector_helper_funcs);
2351
2352 connector->base.base.interlace_allowed = 1;
2353 connector->base.base.doublescan_allowed = 0;
2354 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2355 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2356
2357 intel_connector_attach_encoder(&connector->base, &encoder->base);
2358 drm_sysfs_connector_add(&connector->base.base);
2359 }
2360
2361 static void
2362 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2363 struct intel_sdvo_connector *connector)
2364 {
2365 struct drm_device *dev = connector->base.base.dev;
2366
2367 intel_attach_force_audio_property(&connector->base.base);
2368 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) {
2369 intel_attach_broadcast_rgb_property(&connector->base.base);
2370 intel_sdvo->color_range_auto = true;
2371 }
2372 }
2373
2374 static bool
2375 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2376 {
2377 struct drm_encoder *encoder = &intel_sdvo->base.base;
2378 struct drm_connector *connector;
2379 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2380 struct intel_connector *intel_connector;
2381 struct intel_sdvo_connector *intel_sdvo_connector;
2382
2383 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2384 if (!intel_sdvo_connector)
2385 return false;
2386
2387 if (device == 0) {
2388 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2389 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2390 } else if (device == 1) {
2391 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2392 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2393 }
2394
2395 intel_connector = &intel_sdvo_connector->base;
2396 connector = &intel_connector->base;
2397 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2398 intel_sdvo_connector->output_flag) {
2399 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2400 /* Some SDVO devices have one-shot hotplug interrupts.
2401 * Ensure that they get re-enabled when an interrupt happens.
2402 */
2403 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2404 intel_sdvo_enable_hotplug(intel_encoder);
2405 } else {
2406 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2407 }
2408 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2409 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2410
2411 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2412 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2413 intel_sdvo->is_hdmi = true;
2414 }
2415
2416 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2417 if (intel_sdvo->is_hdmi)
2418 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2419
2420 return true;
2421 }
2422
2423 static bool
2424 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2425 {
2426 struct drm_encoder *encoder = &intel_sdvo->base.base;
2427 struct drm_connector *connector;
2428 struct intel_connector *intel_connector;
2429 struct intel_sdvo_connector *intel_sdvo_connector;
2430
2431 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2432 if (!intel_sdvo_connector)
2433 return false;
2434
2435 intel_connector = &intel_sdvo_connector->base;
2436 connector = &intel_connector->base;
2437 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2438 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2439
2440 intel_sdvo->controlled_output |= type;
2441 intel_sdvo_connector->output_flag = type;
2442
2443 intel_sdvo->is_tv = true;
2444
2445 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2446
2447 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2448 goto err;
2449
2450 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2451 goto err;
2452
2453 return true;
2454
2455 err:
2456 intel_sdvo_destroy(connector);
2457 return false;
2458 }
2459
2460 static bool
2461 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2462 {
2463 struct drm_encoder *encoder = &intel_sdvo->base.base;
2464 struct drm_connector *connector;
2465 struct intel_connector *intel_connector;
2466 struct intel_sdvo_connector *intel_sdvo_connector;
2467
2468 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2469 if (!intel_sdvo_connector)
2470 return false;
2471
2472 intel_connector = &intel_sdvo_connector->base;
2473 connector = &intel_connector->base;
2474 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2475 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2476 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2477
2478 if (device == 0) {
2479 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2480 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2481 } else if (device == 1) {
2482 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2483 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2484 }
2485
2486 intel_sdvo_connector_init(intel_sdvo_connector,
2487 intel_sdvo);
2488 return true;
2489 }
2490
2491 static bool
2492 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2493 {
2494 struct drm_encoder *encoder = &intel_sdvo->base.base;
2495 struct drm_connector *connector;
2496 struct intel_connector *intel_connector;
2497 struct intel_sdvo_connector *intel_sdvo_connector;
2498
2499 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2500 if (!intel_sdvo_connector)
2501 return false;
2502
2503 intel_connector = &intel_sdvo_connector->base;
2504 connector = &intel_connector->base;
2505 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2506 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2507
2508 if (device == 0) {
2509 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2510 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2511 } else if (device == 1) {
2512 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2513 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2514 }
2515
2516 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2517 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2518 goto err;
2519
2520 return true;
2521
2522 err:
2523 intel_sdvo_destroy(connector);
2524 return false;
2525 }
2526
2527 static bool
2528 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2529 {
2530 intel_sdvo->is_tv = false;
2531 intel_sdvo->is_lvds = false;
2532
2533 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2534
2535 if (flags & SDVO_OUTPUT_TMDS0)
2536 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2537 return false;
2538
2539 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2540 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2541 return false;
2542
2543 /* TV has no XXX1 function block */
2544 if (flags & SDVO_OUTPUT_SVID0)
2545 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2546 return false;
2547
2548 if (flags & SDVO_OUTPUT_CVBS0)
2549 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2550 return false;
2551
2552 if (flags & SDVO_OUTPUT_YPRPB0)
2553 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2554 return false;
2555
2556 if (flags & SDVO_OUTPUT_RGB0)
2557 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2558 return false;
2559
2560 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2561 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2562 return false;
2563
2564 if (flags & SDVO_OUTPUT_LVDS0)
2565 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2566 return false;
2567
2568 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2569 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2570 return false;
2571
2572 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2573 unsigned char bytes[2];
2574
2575 intel_sdvo->controlled_output = 0;
2576 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2577 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2578 SDVO_NAME(intel_sdvo),
2579 bytes[0], bytes[1]);
2580 return false;
2581 }
2582 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2583
2584 return true;
2585 }
2586
2587 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2588 {
2589 struct drm_device *dev = intel_sdvo->base.base.dev;
2590 struct drm_connector *connector, *tmp;
2591
2592 list_for_each_entry_safe(connector, tmp,
2593 &dev->mode_config.connector_list, head) {
2594 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2595 intel_sdvo_destroy(connector);
2596 }
2597 }
2598
2599 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2600 struct intel_sdvo_connector *intel_sdvo_connector,
2601 int type)
2602 {
2603 struct drm_device *dev = intel_sdvo->base.base.dev;
2604 struct intel_sdvo_tv_format format;
2605 uint32_t format_map, i;
2606
2607 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2608 return false;
2609
2610 BUILD_BUG_ON(sizeof(format) != 6);
2611 if (!intel_sdvo_get_value(intel_sdvo,
2612 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2613 &format, sizeof(format)))
2614 return false;
2615
2616 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2617
2618 if (format_map == 0)
2619 return false;
2620
2621 intel_sdvo_connector->format_supported_num = 0;
2622 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2623 if (format_map & (1 << i))
2624 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2625
2626
2627 intel_sdvo_connector->tv_format =
2628 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2629 "mode", intel_sdvo_connector->format_supported_num);
2630 if (!intel_sdvo_connector->tv_format)
2631 return false;
2632
2633 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2634 drm_property_add_enum(
2635 intel_sdvo_connector->tv_format, i,
2636 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2637
2638 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2639 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2640 intel_sdvo_connector->tv_format, 0);
2641 return true;
2642
2643 }
2644
2645 #define ENHANCEMENT(name, NAME) do { \
2646 if (enhancements.name) { \
2647 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2648 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2649 return false; \
2650 intel_sdvo_connector->max_##name = data_value[0]; \
2651 intel_sdvo_connector->cur_##name = response; \
2652 intel_sdvo_connector->name = \
2653 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2654 if (!intel_sdvo_connector->name) return false; \
2655 drm_object_attach_property(&connector->base, \
2656 intel_sdvo_connector->name, \
2657 intel_sdvo_connector->cur_##name); \
2658 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2659 data_value[0], data_value[1], response); \
2660 } \
2661 } while (0)
2662
2663 static bool
2664 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2665 struct intel_sdvo_connector *intel_sdvo_connector,
2666 struct intel_sdvo_enhancements_reply enhancements)
2667 {
2668 struct drm_device *dev = intel_sdvo->base.base.dev;
2669 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2670 uint16_t response, data_value[2];
2671
2672 /* when horizontal overscan is supported, Add the left/right property */
2673 if (enhancements.overscan_h) {
2674 if (!intel_sdvo_get_value(intel_sdvo,
2675 SDVO_CMD_GET_MAX_OVERSCAN_H,
2676 &data_value, 4))
2677 return false;
2678
2679 if (!intel_sdvo_get_value(intel_sdvo,
2680 SDVO_CMD_GET_OVERSCAN_H,
2681 &response, 2))
2682 return false;
2683
2684 intel_sdvo_connector->max_hscan = data_value[0];
2685 intel_sdvo_connector->left_margin = data_value[0] - response;
2686 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2687 intel_sdvo_connector->left =
2688 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2689 if (!intel_sdvo_connector->left)
2690 return false;
2691
2692 drm_object_attach_property(&connector->base,
2693 intel_sdvo_connector->left,
2694 intel_sdvo_connector->left_margin);
2695
2696 intel_sdvo_connector->right =
2697 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2698 if (!intel_sdvo_connector->right)
2699 return false;
2700
2701 drm_object_attach_property(&connector->base,
2702 intel_sdvo_connector->right,
2703 intel_sdvo_connector->right_margin);
2704 DRM_DEBUG_KMS("h_overscan: max %d, "
2705 "default %d, current %d\n",
2706 data_value[0], data_value[1], response);
2707 }
2708
2709 if (enhancements.overscan_v) {
2710 if (!intel_sdvo_get_value(intel_sdvo,
2711 SDVO_CMD_GET_MAX_OVERSCAN_V,
2712 &data_value, 4))
2713 return false;
2714
2715 if (!intel_sdvo_get_value(intel_sdvo,
2716 SDVO_CMD_GET_OVERSCAN_V,
2717 &response, 2))
2718 return false;
2719
2720 intel_sdvo_connector->max_vscan = data_value[0];
2721 intel_sdvo_connector->top_margin = data_value[0] - response;
2722 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2723 intel_sdvo_connector->top =
2724 drm_property_create_range(dev, 0,
2725 "top_margin", 0, data_value[0]);
2726 if (!intel_sdvo_connector->top)
2727 return false;
2728
2729 drm_object_attach_property(&connector->base,
2730 intel_sdvo_connector->top,
2731 intel_sdvo_connector->top_margin);
2732
2733 intel_sdvo_connector->bottom =
2734 drm_property_create_range(dev, 0,
2735 "bottom_margin", 0, data_value[0]);
2736 if (!intel_sdvo_connector->bottom)
2737 return false;
2738
2739 drm_object_attach_property(&connector->base,
2740 intel_sdvo_connector->bottom,
2741 intel_sdvo_connector->bottom_margin);
2742 DRM_DEBUG_KMS("v_overscan: max %d, "
2743 "default %d, current %d\n",
2744 data_value[0], data_value[1], response);
2745 }
2746
2747 ENHANCEMENT(hpos, HPOS);
2748 ENHANCEMENT(vpos, VPOS);
2749 ENHANCEMENT(saturation, SATURATION);
2750 ENHANCEMENT(contrast, CONTRAST);
2751 ENHANCEMENT(hue, HUE);
2752 ENHANCEMENT(sharpness, SHARPNESS);
2753 ENHANCEMENT(brightness, BRIGHTNESS);
2754 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2755 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2756 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2757 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2758 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2759
2760 if (enhancements.dot_crawl) {
2761 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2762 return false;
2763
2764 intel_sdvo_connector->max_dot_crawl = 1;
2765 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2766 intel_sdvo_connector->dot_crawl =
2767 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2768 if (!intel_sdvo_connector->dot_crawl)
2769 return false;
2770
2771 drm_object_attach_property(&connector->base,
2772 intel_sdvo_connector->dot_crawl,
2773 intel_sdvo_connector->cur_dot_crawl);
2774 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2775 }
2776
2777 return true;
2778 }
2779
2780 static bool
2781 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2782 struct intel_sdvo_connector *intel_sdvo_connector,
2783 struct intel_sdvo_enhancements_reply enhancements)
2784 {
2785 struct drm_device *dev = intel_sdvo->base.base.dev;
2786 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2787 uint16_t response, data_value[2];
2788
2789 ENHANCEMENT(brightness, BRIGHTNESS);
2790
2791 return true;
2792 }
2793 #undef ENHANCEMENT
2794
2795 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2796 struct intel_sdvo_connector *intel_sdvo_connector)
2797 {
2798 union {
2799 struct intel_sdvo_enhancements_reply reply;
2800 uint16_t response;
2801 } enhancements;
2802
2803 BUILD_BUG_ON(sizeof(enhancements) != 2);
2804
2805 enhancements.response = 0;
2806 intel_sdvo_get_value(intel_sdvo,
2807 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2808 &enhancements, sizeof(enhancements));
2809 if (enhancements.response == 0) {
2810 DRM_DEBUG_KMS("No enhancement is supported\n");
2811 return true;
2812 }
2813
2814 if (IS_TV(intel_sdvo_connector))
2815 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2816 else if (IS_LVDS(intel_sdvo_connector))
2817 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2818 else
2819 return true;
2820 }
2821
2822 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2823 struct i2c_msg *msgs,
2824 int num)
2825 {
2826 struct intel_sdvo *sdvo = adapter->algo_data;
2827
2828 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2829 return -EIO;
2830
2831 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2832 }
2833
2834 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2835 {
2836 struct intel_sdvo *sdvo = adapter->algo_data;
2837 return sdvo->i2c->algo->functionality(sdvo->i2c);
2838 }
2839
2840 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2841 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2842 .functionality = intel_sdvo_ddc_proxy_func
2843 };
2844
2845 static bool
2846 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2847 struct drm_device *dev)
2848 {
2849 sdvo->ddc.owner = THIS_MODULE;
2850 sdvo->ddc.class = I2C_CLASS_DDC;
2851 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2852 sdvo->ddc.dev.parent = &dev->pdev->dev;
2853 sdvo->ddc.algo_data = sdvo;
2854 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2855
2856 return i2c_add_adapter(&sdvo->ddc) == 0;
2857 }
2858
2859 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2860 {
2861 struct drm_i915_private *dev_priv = dev->dev_private;
2862 struct intel_encoder *intel_encoder;
2863 struct intel_sdvo *intel_sdvo;
2864 int i;
2865 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2866 if (!intel_sdvo)
2867 return false;
2868
2869 intel_sdvo->sdvo_reg = sdvo_reg;
2870 intel_sdvo->is_sdvob = is_sdvob;
2871 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2872 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2873 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
2874 goto err_i2c_bus;
2875
2876 /* encoder type will be decided later */
2877 intel_encoder = &intel_sdvo->base;
2878 intel_encoder->type = INTEL_OUTPUT_SDVO;
2879 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2880
2881 /* Read the regs to test if we can talk to the device */
2882 for (i = 0; i < 0x40; i++) {
2883 u8 byte;
2884
2885 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2886 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2887 SDVO_NAME(intel_sdvo));
2888 goto err;
2889 }
2890 }
2891
2892 intel_encoder->compute_config = intel_sdvo_compute_config;
2893 intel_encoder->disable = intel_disable_sdvo;
2894 intel_encoder->mode_set = intel_sdvo_mode_set;
2895 intel_encoder->enable = intel_enable_sdvo;
2896 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2897 intel_encoder->get_config = intel_sdvo_get_config;
2898
2899 /* In default case sdvo lvds is false */
2900 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2901 goto err;
2902
2903 if (intel_sdvo_output_setup(intel_sdvo,
2904 intel_sdvo->caps.output_flags) != true) {
2905 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2906 SDVO_NAME(intel_sdvo));
2907 /* Output_setup can leave behind connectors! */
2908 goto err_output;
2909 }
2910
2911 /* Only enable the hotplug irq if we need it, to work around noisy
2912 * hotplug lines.
2913 */
2914 if (intel_sdvo->hotplug_active) {
2915 intel_encoder->hpd_pin =
2916 intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C;
2917 }
2918
2919 /*
2920 * Cloning SDVO with anything is often impossible, since the SDVO
2921 * encoder can request a special input timing mode. And even if that's
2922 * not the case we have evidence that cloning a plain unscaled mode with
2923 * VGA doesn't really work. Furthermore the cloning flags are way too
2924 * simplistic anyway to express such constraints, so just give up on
2925 * cloning for SDVO encoders.
2926 */
2927 intel_sdvo->base.cloneable = false;
2928
2929 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2930
2931 /* Set the input timing to the screen. Assume always input 0. */
2932 if (!intel_sdvo_set_target_input(intel_sdvo))
2933 goto err_output;
2934
2935 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2936 &intel_sdvo->pixel_clock_min,
2937 &intel_sdvo->pixel_clock_max))
2938 goto err_output;
2939
2940 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2941 "clock range %dMHz - %dMHz, "
2942 "input 1: %c, input 2: %c, "
2943 "output 1: %c, output 2: %c\n",
2944 SDVO_NAME(intel_sdvo),
2945 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2946 intel_sdvo->caps.device_rev_id,
2947 intel_sdvo->pixel_clock_min / 1000,
2948 intel_sdvo->pixel_clock_max / 1000,
2949 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2950 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2951 /* check currently supported outputs */
2952 intel_sdvo->caps.output_flags &
2953 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2954 intel_sdvo->caps.output_flags &
2955 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2956 return true;
2957
2958 err_output:
2959 intel_sdvo_output_cleanup(intel_sdvo);
2960
2961 err:
2962 drm_encoder_cleanup(&intel_encoder->base);
2963 i2c_del_adapter(&intel_sdvo->ddc);
2964 err_i2c_bus:
2965 intel_sdvo_unselect_i2c_bus(intel_sdvo);
2966 kfree(intel_sdvo);
2967
2968 return false;
2969 }
Linux kernel - Deliverables
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