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Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into...
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 uint32_t sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint16_t hotplug_active;
101
102 /**
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
120 /* This is for current tv format name */
121 int tv_format_index;
122
123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
129
130 /**
131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
133 */
134 bool is_lvds;
135
136 /**
137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141 /* DDC bus used by this SDVO encoder */
142 uint8_t ddc_bus;
143 };
144
145 struct intel_sdvo_connector {
146 struct intel_connector base;
147
148 /* Mark the type of connector */
149 uint16_t output_flag;
150
151 enum hdmi_force_audio force_audio;
152
153 /* This contains all current supported TV format */
154 u8 tv_format_supported[TV_FORMAT_NUM];
155 int format_supported_num;
156 struct drm_property *tv_format;
157
158 /* add the property for the SDVO-TV */
159 struct drm_property *left;
160 struct drm_property *right;
161 struct drm_property *top;
162 struct drm_property *bottom;
163 struct drm_property *hpos;
164 struct drm_property *vpos;
165 struct drm_property *contrast;
166 struct drm_property *saturation;
167 struct drm_property *hue;
168 struct drm_property *sharpness;
169 struct drm_property *flicker_filter;
170 struct drm_property *flicker_filter_adaptive;
171 struct drm_property *flicker_filter_2d;
172 struct drm_property *tv_chroma_filter;
173 struct drm_property *tv_luma_filter;
174 struct drm_property *dot_crawl;
175
176 /* add the property for the SDVO-TV/LVDS */
177 struct drm_property *brightness;
178
179 /* Add variable to record current setting for the above property */
180 u32 left_margin, right_margin, top_margin, bottom_margin;
181
182 /* this is to get the range of margin.*/
183 u32 max_hscan, max_vscan;
184 u32 max_hpos, cur_hpos;
185 u32 max_vpos, cur_vpos;
186 u32 cur_brightness, max_brightness;
187 u32 cur_contrast, max_contrast;
188 u32 cur_saturation, max_saturation;
189 u32 cur_hue, max_hue;
190 u32 cur_sharpness, max_sharpness;
191 u32 cur_flicker_filter, max_flicker_filter;
192 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
193 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
194 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
195 u32 cur_tv_luma_filter, max_tv_luma_filter;
196 u32 cur_dot_crawl, max_dot_crawl;
197 };
198
199 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
200 {
201 return container_of(encoder, struct intel_sdvo, base.base);
202 }
203
204 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
205 {
206 return container_of(intel_attached_encoder(connector),
207 struct intel_sdvo, base);
208 }
209
210 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
211 {
212 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
213 }
214
215 static bool
216 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
217 static bool
218 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
219 struct intel_sdvo_connector *intel_sdvo_connector,
220 int type);
221 static bool
222 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector);
224
225 /**
226 * Writes the SDVOB or SDVOC with the given value, but always writes both
227 * SDVOB and SDVOC to work around apparent hardware issues (according to
228 * comments in the BIOS).
229 */
230 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
231 {
232 struct drm_device *dev = intel_sdvo->base.base.dev;
233 struct drm_i915_private *dev_priv = dev->dev_private;
234 u32 bval = val, cval = val;
235 int i;
236
237 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
238 I915_WRITE(intel_sdvo->sdvo_reg, val);
239 I915_READ(intel_sdvo->sdvo_reg);
240 return;
241 }
242
243 if (intel_sdvo->sdvo_reg == SDVOB) {
244 cval = I915_READ(SDVOC);
245 } else {
246 bval = I915_READ(SDVOB);
247 }
248 /*
249 * Write the registers twice for luck. Sometimes,
250 * writing them only once doesn't appear to 'stick'.
251 * The BIOS does this too. Yay, magic
252 */
253 for (i = 0; i < 2; i++)
254 {
255 I915_WRITE(SDVOB, bval);
256 I915_READ(SDVOB);
257 I915_WRITE(SDVOC, cval);
258 I915_READ(SDVOC);
259 }
260 }
261
262 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
263 {
264 struct i2c_msg msgs[] = {
265 {
266 .addr = intel_sdvo->slave_addr,
267 .flags = 0,
268 .len = 1,
269 .buf = &addr,
270 },
271 {
272 .addr = intel_sdvo->slave_addr,
273 .flags = I2C_M_RD,
274 .len = 1,
275 .buf = ch,
276 }
277 };
278 int ret;
279
280 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
281 return true;
282
283 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
284 return false;
285 }
286
287 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
288 /** Mapping of command numbers to names, for debug output */
289 static const struct _sdvo_cmd_name {
290 u8 cmd;
291 const char *name;
292 } sdvo_cmd_names[] = {
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
336
337 /* Add the op code for SDVO enhancements */
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
382
383 /* HDMI op code */
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
404 };
405
406 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
407
408 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
409 const void *args, int args_len)
410 {
411 int i;
412
413 DRM_DEBUG_KMS("%s: W: %02X ",
414 SDVO_NAME(intel_sdvo), cmd);
415 for (i = 0; i < args_len; i++)
416 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
417 for (; i < 8; i++)
418 DRM_LOG_KMS(" ");
419 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
420 if (cmd == sdvo_cmd_names[i].cmd) {
421 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
422 break;
423 }
424 }
425 if (i == ARRAY_SIZE(sdvo_cmd_names))
426 DRM_LOG_KMS("(%02X)", cmd);
427 DRM_LOG_KMS("\n");
428 }
429
430 static const char *cmd_status_names[] = {
431 "Power on",
432 "Success",
433 "Not supported",
434 "Invalid arg",
435 "Pending",
436 "Target not specified",
437 "Scaling not supported"
438 };
439
440 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
441 const void *args, int args_len)
442 {
443 u8 *buf, status;
444 struct i2c_msg *msgs;
445 int i, ret = true;
446
447 /* Would be simpler to allocate both in one go ? */
448 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
449 if (!buf)
450 return false;
451
452 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
453 if (!msgs) {
454 kfree(buf);
455 return false;
456 }
457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
490 ret = false;
491 goto out;
492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
496 ret = false;
497 }
498
499 out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
503 }
504
505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
507 {
508 u8 retry = 5;
509 u8 status;
510 int i;
511
512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
532 goto log_fail;
533 }
534
535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
537 else
538 DRM_LOG_KMS("(??? %d)", status);
539
540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
542
543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
550 }
551 DRM_LOG_KMS("\n");
552 return true;
553
554 log_fail:
555 DRM_LOG_KMS("... failed\n");
556 return false;
557 }
558
559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
560 {
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567 }
568
569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
571 {
572 /* This must be the immediately preceding write before the i2c xfer */
573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
576 }
577
578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579 {
580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
584 }
585
586 static bool
587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588 {
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593 }
594
595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
596 {
597 struct intel_sdvo_set_target_input_args targets = {0};
598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
601 }
602
603 /**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
610 {
611 struct intel_sdvo_get_trained_inputs_response response;
612
613 BUILD_BUG_ON(sizeof(response) != 1);
614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621 }
622
623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
624 u16 outputs)
625 {
626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
629 }
630
631 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
632 u16 *outputs)
633 {
634 return intel_sdvo_get_value(intel_sdvo,
635 SDVO_CMD_GET_ACTIVE_OUTPUTS,
636 outputs, sizeof(*outputs));
637 }
638
639 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
640 int mode)
641 {
642 u8 state = SDVO_ENCODER_STATE_ON;
643
644 switch (mode) {
645 case DRM_MODE_DPMS_ON:
646 state = SDVO_ENCODER_STATE_ON;
647 break;
648 case DRM_MODE_DPMS_STANDBY:
649 state = SDVO_ENCODER_STATE_STANDBY;
650 break;
651 case DRM_MODE_DPMS_SUSPEND:
652 state = SDVO_ENCODER_STATE_SUSPEND;
653 break;
654 case DRM_MODE_DPMS_OFF:
655 state = SDVO_ENCODER_STATE_OFF;
656 break;
657 }
658
659 return intel_sdvo_set_value(intel_sdvo,
660 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
661 }
662
663 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
664 int *clock_min,
665 int *clock_max)
666 {
667 struct intel_sdvo_pixel_clock_range clocks;
668
669 BUILD_BUG_ON(sizeof(clocks) != 4);
670 if (!intel_sdvo_get_value(intel_sdvo,
671 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
672 &clocks, sizeof(clocks)))
673 return false;
674
675 /* Convert the values from units of 10 kHz to kHz. */
676 *clock_min = clocks.min * 10;
677 *clock_max = clocks.max * 10;
678 return true;
679 }
680
681 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
682 u16 outputs)
683 {
684 return intel_sdvo_set_value(intel_sdvo,
685 SDVO_CMD_SET_TARGET_OUTPUT,
686 &outputs, sizeof(outputs));
687 }
688
689 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
690 struct intel_sdvo_dtd *dtd)
691 {
692 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
693 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
694 }
695
696 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
697 struct intel_sdvo_dtd *dtd)
698 {
699 return intel_sdvo_set_timing(intel_sdvo,
700 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
701 }
702
703 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
704 struct intel_sdvo_dtd *dtd)
705 {
706 return intel_sdvo_set_timing(intel_sdvo,
707 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
708 }
709
710 static bool
711 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
712 uint16_t clock,
713 uint16_t width,
714 uint16_t height)
715 {
716 struct intel_sdvo_preferred_input_timing_args args;
717
718 memset(&args, 0, sizeof(args));
719 args.clock = clock;
720 args.width = width;
721 args.height = height;
722 args.interlace = 0;
723
724 if (intel_sdvo->is_lvds &&
725 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
726 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
727 args.scaled = 1;
728
729 return intel_sdvo_set_value(intel_sdvo,
730 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
731 &args, sizeof(args));
732 }
733
734 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
735 struct intel_sdvo_dtd *dtd)
736 {
737 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
738 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
739 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
740 &dtd->part1, sizeof(dtd->part1)) &&
741 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
742 &dtd->part2, sizeof(dtd->part2));
743 }
744
745 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
746 {
747 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
748 }
749
750 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
751 const struct drm_display_mode *mode)
752 {
753 uint16_t width, height;
754 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
755 uint16_t h_sync_offset, v_sync_offset;
756 int mode_clock;
757
758 width = mode->hdisplay;
759 height = mode->vdisplay;
760
761 /* do some mode translations */
762 h_blank_len = mode->htotal - mode->hdisplay;
763 h_sync_len = mode->hsync_end - mode->hsync_start;
764
765 v_blank_len = mode->vtotal - mode->vdisplay;
766 v_sync_len = mode->vsync_end - mode->vsync_start;
767
768 h_sync_offset = mode->hsync_start - mode->hdisplay;
769 v_sync_offset = mode->vsync_start - mode->vdisplay;
770
771 mode_clock = mode->clock;
772 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
773 mode_clock /= 10;
774 dtd->part1.clock = mode_clock;
775
776 dtd->part1.h_active = width & 0xff;
777 dtd->part1.h_blank = h_blank_len & 0xff;
778 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
779 ((h_blank_len >> 8) & 0xf);
780 dtd->part1.v_active = height & 0xff;
781 dtd->part1.v_blank = v_blank_len & 0xff;
782 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
783 ((v_blank_len >> 8) & 0xf);
784
785 dtd->part2.h_sync_off = h_sync_offset & 0xff;
786 dtd->part2.h_sync_width = h_sync_len & 0xff;
787 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
788 (v_sync_len & 0xf);
789 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
790 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
791 ((v_sync_len & 0x30) >> 4);
792
793 dtd->part2.dtd_flags = 0x18;
794 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
795 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
796 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
797 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
798 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
799 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
800
801 dtd->part2.sdvo_flags = 0;
802 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
803 dtd->part2.reserved = 0;
804 }
805
806 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
807 const struct intel_sdvo_dtd *dtd)
808 {
809 mode->hdisplay = dtd->part1.h_active;
810 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
811 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
812 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
813 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
814 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
815 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
816 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
817
818 mode->vdisplay = dtd->part1.v_active;
819 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
820 mode->vsync_start = mode->vdisplay;
821 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
822 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
823 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
824 mode->vsync_end = mode->vsync_start +
825 (dtd->part2.v_sync_off_width & 0xf);
826 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
827 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
828 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
829
830 mode->clock = dtd->part1.clock * 10;
831
832 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
833 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
834 mode->flags |= DRM_MODE_FLAG_INTERLACE;
835 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
836 mode->flags |= DRM_MODE_FLAG_PHSYNC;
837 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
838 mode->flags |= DRM_MODE_FLAG_PVSYNC;
839 }
840
841 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
842 {
843 struct intel_sdvo_encode encode;
844
845 BUILD_BUG_ON(sizeof(encode) != 2);
846 return intel_sdvo_get_value(intel_sdvo,
847 SDVO_CMD_GET_SUPP_ENCODE,
848 &encode, sizeof(encode));
849 }
850
851 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
852 uint8_t mode)
853 {
854 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
855 }
856
857 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
858 uint8_t mode)
859 {
860 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
861 }
862
863 #if 0
864 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
865 {
866 int i, j;
867 uint8_t set_buf_index[2];
868 uint8_t av_split;
869 uint8_t buf_size;
870 uint8_t buf[48];
871 uint8_t *pos;
872
873 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
874
875 for (i = 0; i <= av_split; i++) {
876 set_buf_index[0] = i; set_buf_index[1] = 0;
877 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
878 set_buf_index, 2);
879 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
880 intel_sdvo_read_response(encoder, &buf_size, 1);
881
882 pos = buf;
883 for (j = 0; j <= buf_size; j += 8) {
884 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
885 NULL, 0);
886 intel_sdvo_read_response(encoder, pos, 8);
887 pos += 8;
888 }
889 }
890 }
891 #endif
892
893 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
894 {
895 struct dip_infoframe avi_if = {
896 .type = DIP_TYPE_AVI,
897 .ver = DIP_VERSION_AVI,
898 .len = DIP_LEN_AVI,
899 };
900 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
901 uint8_t set_buf_index[2] = { 1, 0 };
902 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
903 uint64_t *data = (uint64_t *)sdvo_data;
904 unsigned i;
905
906 intel_dip_infoframe_csum(&avi_if);
907
908 /* sdvo spec says that the ecc is handled by the hw, and it looks like
909 * we must not send the ecc field, either. */
910 memcpy(sdvo_data, &avi_if, 3);
911 sdvo_data[3] = avi_if.checksum;
912 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
913
914 if (!intel_sdvo_set_value(intel_sdvo,
915 SDVO_CMD_SET_HBUF_INDEX,
916 set_buf_index, 2))
917 return false;
918
919 for (i = 0; i < sizeof(sdvo_data); i += 8) {
920 if (!intel_sdvo_set_value(intel_sdvo,
921 SDVO_CMD_SET_HBUF_DATA,
922 data, 8))
923 return false;
924 data++;
925 }
926
927 return intel_sdvo_set_value(intel_sdvo,
928 SDVO_CMD_SET_HBUF_TXRATE,
929 &tx_rate, 1);
930 }
931
932 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
933 {
934 struct intel_sdvo_tv_format format;
935 uint32_t format_map;
936
937 format_map = 1 << intel_sdvo->tv_format_index;
938 memset(&format, 0, sizeof(format));
939 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
940
941 BUILD_BUG_ON(sizeof(format) != 6);
942 return intel_sdvo_set_value(intel_sdvo,
943 SDVO_CMD_SET_TV_FORMAT,
944 &format, sizeof(format));
945 }
946
947 static bool
948 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
949 const struct drm_display_mode *mode)
950 {
951 struct intel_sdvo_dtd output_dtd;
952
953 if (!intel_sdvo_set_target_output(intel_sdvo,
954 intel_sdvo->attached_output))
955 return false;
956
957 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
958 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
959 return false;
960
961 return true;
962 }
963
964 /* Asks the sdvo controller for the preferred input mode given the output mode.
965 * Unfortunately we have to set up the full output mode to do that. */
966 static bool
967 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
968 const struct drm_display_mode *mode,
969 struct drm_display_mode *adjusted_mode)
970 {
971 struct intel_sdvo_dtd input_dtd;
972
973 /* Reset the input timing to the screen. Assume always input 0. */
974 if (!intel_sdvo_set_target_input(intel_sdvo))
975 return false;
976
977 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
978 mode->clock / 10,
979 mode->hdisplay,
980 mode->vdisplay))
981 return false;
982
983 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
984 &input_dtd))
985 return false;
986
987 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
988
989 return true;
990 }
991
992 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
993 const struct drm_display_mode *mode,
994 struct drm_display_mode *adjusted_mode)
995 {
996 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
997 int multiplier;
998
999 /* We need to construct preferred input timings based on our
1000 * output timings. To do that, we have to set the output
1001 * timings, even though this isn't really the right place in
1002 * the sequence to do it. Oh well.
1003 */
1004 if (intel_sdvo->is_tv) {
1005 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1006 return false;
1007
1008 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1009 mode,
1010 adjusted_mode);
1011 } else if (intel_sdvo->is_lvds) {
1012 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1013 intel_sdvo->sdvo_lvds_fixed_mode))
1014 return false;
1015
1016 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1017 mode,
1018 adjusted_mode);
1019 }
1020
1021 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1022 * SDVO device will factor out the multiplier during mode_set.
1023 */
1024 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1025 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1026
1027 return true;
1028 }
1029
1030 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1031 struct drm_display_mode *mode,
1032 struct drm_display_mode *adjusted_mode)
1033 {
1034 struct drm_device *dev = encoder->dev;
1035 struct drm_i915_private *dev_priv = dev->dev_private;
1036 struct drm_crtc *crtc = encoder->crtc;
1037 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1038 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1039 u32 sdvox;
1040 struct intel_sdvo_in_out_map in_out;
1041 struct intel_sdvo_dtd input_dtd, output_dtd;
1042 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1043 int rate;
1044
1045 if (!mode)
1046 return;
1047
1048 /* First, set the input mapping for the first input to our controlled
1049 * output. This is only correct if we're a single-input device, in
1050 * which case the first input is the output from the appropriate SDVO
1051 * channel on the motherboard. In a two-input device, the first input
1052 * will be SDVOB and the second SDVOC.
1053 */
1054 in_out.in0 = intel_sdvo->attached_output;
1055 in_out.in1 = 0;
1056
1057 intel_sdvo_set_value(intel_sdvo,
1058 SDVO_CMD_SET_IN_OUT_MAP,
1059 &in_out, sizeof(in_out));
1060
1061 /* Set the output timings to the screen */
1062 if (!intel_sdvo_set_target_output(intel_sdvo,
1063 intel_sdvo->attached_output))
1064 return;
1065
1066 /* lvds has a special fixed output timing. */
1067 if (intel_sdvo->is_lvds)
1068 intel_sdvo_get_dtd_from_mode(&output_dtd,
1069 intel_sdvo->sdvo_lvds_fixed_mode);
1070 else
1071 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1072 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1073 DRM_INFO("Setting output timings on %s failed\n",
1074 SDVO_NAME(intel_sdvo));
1075
1076 /* Set the input timing to the screen. Assume always input 0. */
1077 if (!intel_sdvo_set_target_input(intel_sdvo))
1078 return;
1079
1080 if (intel_sdvo->has_hdmi_monitor) {
1081 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1082 intel_sdvo_set_colorimetry(intel_sdvo,
1083 SDVO_COLORIMETRY_RGB256);
1084 intel_sdvo_set_avi_infoframe(intel_sdvo);
1085 } else
1086 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1087
1088 if (intel_sdvo->is_tv &&
1089 !intel_sdvo_set_tv_format(intel_sdvo))
1090 return;
1091
1092 /* We have tried to get input timing in mode_fixup, and filled into
1093 * adjusted_mode.
1094 */
1095 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1096 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1097 DRM_INFO("Setting input timings on %s failed\n",
1098 SDVO_NAME(intel_sdvo));
1099
1100 switch (pixel_multiplier) {
1101 default:
1102 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1103 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1104 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1105 }
1106 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1107 return;
1108
1109 /* Set the SDVO control regs. */
1110 if (INTEL_INFO(dev)->gen >= 4) {
1111 /* The real mode polarity is set by the SDVO commands, using
1112 * struct intel_sdvo_dtd. */
1113 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1114 if (intel_sdvo->is_hdmi)
1115 sdvox |= intel_sdvo->color_range;
1116 if (INTEL_INFO(dev)->gen < 5)
1117 sdvox |= SDVO_BORDER_ENABLE;
1118 } else {
1119 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1120 switch (intel_sdvo->sdvo_reg) {
1121 case SDVOB:
1122 sdvox &= SDVOB_PRESERVE_MASK;
1123 break;
1124 case SDVOC:
1125 sdvox &= SDVOC_PRESERVE_MASK;
1126 break;
1127 }
1128 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1129 }
1130
1131 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1132 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1133 else
1134 sdvox |= TRANSCODER(intel_crtc->pipe);
1135
1136 if (intel_sdvo->has_hdmi_audio)
1137 sdvox |= SDVO_AUDIO_ENABLE;
1138
1139 if (INTEL_INFO(dev)->gen >= 4) {
1140 /* done in crtc_mode_set as the dpll_md reg must be written early */
1141 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1142 /* done in crtc_mode_set as it lives inside the dpll register */
1143 } else {
1144 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1145 }
1146
1147 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1148 INTEL_INFO(dev)->gen < 5)
1149 sdvox |= SDVO_STALL_SELECT;
1150 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1151 }
1152
1153 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1154 {
1155 struct intel_sdvo_connector *intel_sdvo_connector =
1156 to_intel_sdvo_connector(&connector->base);
1157 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1158 u16 active_outputs;
1159
1160 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1161
1162 if (active_outputs & intel_sdvo_connector->output_flag)
1163 return true;
1164 else
1165 return false;
1166 }
1167
1168 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1169 enum pipe *pipe)
1170 {
1171 struct drm_device *dev = encoder->base.dev;
1172 struct drm_i915_private *dev_priv = dev->dev_private;
1173 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1174 u32 tmp;
1175
1176 tmp = I915_READ(intel_sdvo->sdvo_reg);
1177
1178 if (!(tmp & SDVO_ENABLE))
1179 return false;
1180
1181 if (HAS_PCH_CPT(dev))
1182 *pipe = PORT_TO_PIPE_CPT(tmp);
1183 else
1184 *pipe = PORT_TO_PIPE(tmp);
1185
1186 return true;
1187 }
1188
1189 static void intel_disable_sdvo(struct intel_encoder *encoder)
1190 {
1191 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1192 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1193 u32 temp;
1194
1195 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1196 if (0)
1197 intel_sdvo_set_encoder_power_state(intel_sdvo,
1198 DRM_MODE_DPMS_OFF);
1199
1200 temp = I915_READ(intel_sdvo->sdvo_reg);
1201 if ((temp & SDVO_ENABLE) != 0) {
1202 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1203 }
1204 }
1205
1206 static void intel_enable_sdvo(struct intel_encoder *encoder)
1207 {
1208 struct drm_device *dev = encoder->base.dev;
1209 struct drm_i915_private *dev_priv = dev->dev_private;
1210 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1211 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1212 u32 temp;
1213 bool input1, input2;
1214 int i;
1215 u8 status;
1216
1217 temp = I915_READ(intel_sdvo->sdvo_reg);
1218 if ((temp & SDVO_ENABLE) == 0)
1219 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1220 for (i = 0; i < 2; i++)
1221 intel_wait_for_vblank(dev, intel_crtc->pipe);
1222
1223 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1224 /* Warn if the device reported failure to sync.
1225 * A lot of SDVO devices fail to notify of sync, but it's
1226 * a given it the status is a success, we succeeded.
1227 */
1228 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1229 DRM_DEBUG_KMS("First %s output reported failure to "
1230 "sync\n", SDVO_NAME(intel_sdvo));
1231 }
1232
1233 if (0)
1234 intel_sdvo_set_encoder_power_state(intel_sdvo,
1235 DRM_MODE_DPMS_ON);
1236 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1237 }
1238
1239 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1240 {
1241 struct drm_crtc *crtc;
1242 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1243
1244 /* dvo supports only 2 dpms states. */
1245 if (mode != DRM_MODE_DPMS_ON)
1246 mode = DRM_MODE_DPMS_OFF;
1247
1248 if (mode == connector->dpms)
1249 return;
1250
1251 connector->dpms = mode;
1252
1253 /* Only need to change hw state when actually enabled */
1254 crtc = intel_sdvo->base.base.crtc;
1255 if (!crtc) {
1256 intel_sdvo->base.connectors_active = false;
1257 return;
1258 }
1259
1260 if (mode != DRM_MODE_DPMS_ON) {
1261 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1262 if (0)
1263 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1264
1265 intel_sdvo->base.connectors_active = false;
1266
1267 intel_crtc_update_dpms(crtc);
1268 } else {
1269 intel_sdvo->base.connectors_active = true;
1270
1271 intel_crtc_update_dpms(crtc);
1272
1273 if (0)
1274 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1275 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1276 }
1277
1278 intel_modeset_check_state(connector->dev);
1279 }
1280
1281 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1282 struct drm_display_mode *mode)
1283 {
1284 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1285
1286 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1287 return MODE_NO_DBLESCAN;
1288
1289 if (intel_sdvo->pixel_clock_min > mode->clock)
1290 return MODE_CLOCK_LOW;
1291
1292 if (intel_sdvo->pixel_clock_max < mode->clock)
1293 return MODE_CLOCK_HIGH;
1294
1295 if (intel_sdvo->is_lvds) {
1296 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1297 return MODE_PANEL;
1298
1299 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1300 return MODE_PANEL;
1301 }
1302
1303 return MODE_OK;
1304 }
1305
1306 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1307 {
1308 BUILD_BUG_ON(sizeof(*caps) != 8);
1309 if (!intel_sdvo_get_value(intel_sdvo,
1310 SDVO_CMD_GET_DEVICE_CAPS,
1311 caps, sizeof(*caps)))
1312 return false;
1313
1314 DRM_DEBUG_KMS("SDVO capabilities:\n"
1315 " vendor_id: %d\n"
1316 " device_id: %d\n"
1317 " device_rev_id: %d\n"
1318 " sdvo_version_major: %d\n"
1319 " sdvo_version_minor: %d\n"
1320 " sdvo_inputs_mask: %d\n"
1321 " smooth_scaling: %d\n"
1322 " sharp_scaling: %d\n"
1323 " up_scaling: %d\n"
1324 " down_scaling: %d\n"
1325 " stall_support: %d\n"
1326 " output_flags: %d\n",
1327 caps->vendor_id,
1328 caps->device_id,
1329 caps->device_rev_id,
1330 caps->sdvo_version_major,
1331 caps->sdvo_version_minor,
1332 caps->sdvo_inputs_mask,
1333 caps->smooth_scaling,
1334 caps->sharp_scaling,
1335 caps->up_scaling,
1336 caps->down_scaling,
1337 caps->stall_support,
1338 caps->output_flags);
1339
1340 return true;
1341 }
1342
1343 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1344 {
1345 struct drm_device *dev = intel_sdvo->base.base.dev;
1346 uint16_t hotplug;
1347
1348 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1349 * on the line. */
1350 if (IS_I945G(dev) || IS_I945GM(dev))
1351 return 0;
1352
1353 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1354 &hotplug, sizeof(hotplug)))
1355 return 0;
1356
1357 return hotplug;
1358 }
1359
1360 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1361 {
1362 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1363
1364 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1365 &intel_sdvo->hotplug_active, 2);
1366 }
1367
1368 static bool
1369 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1370 {
1371 /* Is there more than one type of output? */
1372 return hweight16(intel_sdvo->caps.output_flags) > 1;
1373 }
1374
1375 static struct edid *
1376 intel_sdvo_get_edid(struct drm_connector *connector)
1377 {
1378 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1379 return drm_get_edid(connector, &sdvo->ddc);
1380 }
1381
1382 /* Mac mini hack -- use the same DDC as the analog connector */
1383 static struct edid *
1384 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1385 {
1386 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1387
1388 return drm_get_edid(connector,
1389 intel_gmbus_get_adapter(dev_priv,
1390 dev_priv->crt_ddc_pin));
1391 }
1392
1393 static enum drm_connector_status
1394 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1395 {
1396 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1397 enum drm_connector_status status;
1398 struct edid *edid;
1399
1400 edid = intel_sdvo_get_edid(connector);
1401
1402 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1403 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1404
1405 /*
1406 * Don't use the 1 as the argument of DDC bus switch to get
1407 * the EDID. It is used for SDVO SPD ROM.
1408 */
1409 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1410 intel_sdvo->ddc_bus = ddc;
1411 edid = intel_sdvo_get_edid(connector);
1412 if (edid)
1413 break;
1414 }
1415 /*
1416 * If we found the EDID on the other bus,
1417 * assume that is the correct DDC bus.
1418 */
1419 if (edid == NULL)
1420 intel_sdvo->ddc_bus = saved_ddc;
1421 }
1422
1423 /*
1424 * When there is no edid and no monitor is connected with VGA
1425 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1426 */
1427 if (edid == NULL)
1428 edid = intel_sdvo_get_analog_edid(connector);
1429
1430 status = connector_status_unknown;
1431 if (edid != NULL) {
1432 /* DDC bus is shared, match EDID to connector type */
1433 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1434 status = connector_status_connected;
1435 if (intel_sdvo->is_hdmi) {
1436 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1437 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1438 }
1439 } else
1440 status = connector_status_disconnected;
1441 kfree(edid);
1442 }
1443
1444 if (status == connector_status_connected) {
1445 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1446 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1447 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1448 }
1449
1450 return status;
1451 }
1452
1453 static bool
1454 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1455 struct edid *edid)
1456 {
1457 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1458 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1459
1460 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1461 connector_is_digital, monitor_is_digital);
1462 return connector_is_digital == monitor_is_digital;
1463 }
1464
1465 static enum drm_connector_status
1466 intel_sdvo_detect(struct drm_connector *connector, bool force)
1467 {
1468 uint16_t response;
1469 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1470 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1471 enum drm_connector_status ret;
1472
1473 if (!intel_sdvo_write_cmd(intel_sdvo,
1474 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1475 return connector_status_unknown;
1476
1477 /* add 30ms delay when the output type might be TV */
1478 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1479 msleep(30);
1480
1481 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1482 return connector_status_unknown;
1483
1484 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1485 response & 0xff, response >> 8,
1486 intel_sdvo_connector->output_flag);
1487
1488 if (response == 0)
1489 return connector_status_disconnected;
1490
1491 intel_sdvo->attached_output = response;
1492
1493 intel_sdvo->has_hdmi_monitor = false;
1494 intel_sdvo->has_hdmi_audio = false;
1495
1496 if ((intel_sdvo_connector->output_flag & response) == 0)
1497 ret = connector_status_disconnected;
1498 else if (IS_TMDS(intel_sdvo_connector))
1499 ret = intel_sdvo_tmds_sink_detect(connector);
1500 else {
1501 struct edid *edid;
1502
1503 /* if we have an edid check it matches the connection */
1504 edid = intel_sdvo_get_edid(connector);
1505 if (edid == NULL)
1506 edid = intel_sdvo_get_analog_edid(connector);
1507 if (edid != NULL) {
1508 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1509 edid))
1510 ret = connector_status_connected;
1511 else
1512 ret = connector_status_disconnected;
1513
1514 kfree(edid);
1515 } else
1516 ret = connector_status_connected;
1517 }
1518
1519 /* May update encoder flag for like clock for SDVO TV, etc.*/
1520 if (ret == connector_status_connected) {
1521 intel_sdvo->is_tv = false;
1522 intel_sdvo->is_lvds = false;
1523 intel_sdvo->base.needs_tv_clock = false;
1524
1525 if (response & SDVO_TV_MASK) {
1526 intel_sdvo->is_tv = true;
1527 intel_sdvo->base.needs_tv_clock = true;
1528 }
1529 if (response & SDVO_LVDS_MASK)
1530 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1531 }
1532
1533 return ret;
1534 }
1535
1536 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1537 {
1538 struct edid *edid;
1539
1540 /* set the bus switch and get the modes */
1541 edid = intel_sdvo_get_edid(connector);
1542
1543 /*
1544 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1545 * link between analog and digital outputs. So, if the regular SDVO
1546 * DDC fails, check to see if the analog output is disconnected, in
1547 * which case we'll look there for the digital DDC data.
1548 */
1549 if (edid == NULL)
1550 edid = intel_sdvo_get_analog_edid(connector);
1551
1552 if (edid != NULL) {
1553 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1554 edid)) {
1555 drm_mode_connector_update_edid_property(connector, edid);
1556 drm_add_edid_modes(connector, edid);
1557 }
1558
1559 kfree(edid);
1560 }
1561 }
1562
1563 /*
1564 * Set of SDVO TV modes.
1565 * Note! This is in reply order (see loop in get_tv_modes).
1566 * XXX: all 60Hz refresh?
1567 */
1568 static const struct drm_display_mode sdvo_tv_modes[] = {
1569 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1570 416, 0, 200, 201, 232, 233, 0,
1571 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1572 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1573 416, 0, 240, 241, 272, 273, 0,
1574 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1575 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1576 496, 0, 300, 301, 332, 333, 0,
1577 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1578 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1579 736, 0, 350, 351, 382, 383, 0,
1580 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1581 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1582 736, 0, 400, 401, 432, 433, 0,
1583 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1584 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1585 736, 0, 480, 481, 512, 513, 0,
1586 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1587 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1588 800, 0, 480, 481, 512, 513, 0,
1589 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1590 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1591 800, 0, 576, 577, 608, 609, 0,
1592 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1593 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1594 816, 0, 350, 351, 382, 383, 0,
1595 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1596 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1597 816, 0, 400, 401, 432, 433, 0,
1598 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1599 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1600 816, 0, 480, 481, 512, 513, 0,
1601 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1602 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1603 816, 0, 540, 541, 572, 573, 0,
1604 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1605 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1606 816, 0, 576, 577, 608, 609, 0,
1607 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1608 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1609 864, 0, 576, 577, 608, 609, 0,
1610 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1611 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1612 896, 0, 600, 601, 632, 633, 0,
1613 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1614 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1615 928, 0, 624, 625, 656, 657, 0,
1616 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1617 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1618 1016, 0, 766, 767, 798, 799, 0,
1619 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1620 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1621 1120, 0, 768, 769, 800, 801, 0,
1622 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1623 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1624 1376, 0, 1024, 1025, 1056, 1057, 0,
1625 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1626 };
1627
1628 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1629 {
1630 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1631 struct intel_sdvo_sdtv_resolution_request tv_res;
1632 uint32_t reply = 0, format_map = 0;
1633 int i;
1634
1635 /* Read the list of supported input resolutions for the selected TV
1636 * format.
1637 */
1638 format_map = 1 << intel_sdvo->tv_format_index;
1639 memcpy(&tv_res, &format_map,
1640 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1641
1642 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1643 return;
1644
1645 BUILD_BUG_ON(sizeof(tv_res) != 3);
1646 if (!intel_sdvo_write_cmd(intel_sdvo,
1647 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1648 &tv_res, sizeof(tv_res)))
1649 return;
1650 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1651 return;
1652
1653 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1654 if (reply & (1 << i)) {
1655 struct drm_display_mode *nmode;
1656 nmode = drm_mode_duplicate(connector->dev,
1657 &sdvo_tv_modes[i]);
1658 if (nmode)
1659 drm_mode_probed_add(connector, nmode);
1660 }
1661 }
1662
1663 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1664 {
1665 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1666 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1667 struct drm_display_mode *newmode;
1668
1669 /*
1670 * Attempt to get the mode list from DDC.
1671 * Assume that the preferred modes are
1672 * arranged in priority order.
1673 */
1674 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1675 if (list_empty(&connector->probed_modes) == false)
1676 goto end;
1677
1678 /* Fetch modes from VBT */
1679 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1680 newmode = drm_mode_duplicate(connector->dev,
1681 dev_priv->sdvo_lvds_vbt_mode);
1682 if (newmode != NULL) {
1683 /* Guarantee the mode is preferred */
1684 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1685 DRM_MODE_TYPE_DRIVER);
1686 drm_mode_probed_add(connector, newmode);
1687 }
1688 }
1689
1690 end:
1691 list_for_each_entry(newmode, &connector->probed_modes, head) {
1692 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1693 intel_sdvo->sdvo_lvds_fixed_mode =
1694 drm_mode_duplicate(connector->dev, newmode);
1695
1696 intel_sdvo->is_lvds = true;
1697 break;
1698 }
1699 }
1700
1701 }
1702
1703 static int intel_sdvo_get_modes(struct drm_connector *connector)
1704 {
1705 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1706
1707 if (IS_TV(intel_sdvo_connector))
1708 intel_sdvo_get_tv_modes(connector);
1709 else if (IS_LVDS(intel_sdvo_connector))
1710 intel_sdvo_get_lvds_modes(connector);
1711 else
1712 intel_sdvo_get_ddc_modes(connector);
1713
1714 return !list_empty(&connector->probed_modes);
1715 }
1716
1717 static void
1718 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1719 {
1720 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1721 struct drm_device *dev = connector->dev;
1722
1723 if (intel_sdvo_connector->left)
1724 drm_property_destroy(dev, intel_sdvo_connector->left);
1725 if (intel_sdvo_connector->right)
1726 drm_property_destroy(dev, intel_sdvo_connector->right);
1727 if (intel_sdvo_connector->top)
1728 drm_property_destroy(dev, intel_sdvo_connector->top);
1729 if (intel_sdvo_connector->bottom)
1730 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1731 if (intel_sdvo_connector->hpos)
1732 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1733 if (intel_sdvo_connector->vpos)
1734 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1735 if (intel_sdvo_connector->saturation)
1736 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1737 if (intel_sdvo_connector->contrast)
1738 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1739 if (intel_sdvo_connector->hue)
1740 drm_property_destroy(dev, intel_sdvo_connector->hue);
1741 if (intel_sdvo_connector->sharpness)
1742 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1743 if (intel_sdvo_connector->flicker_filter)
1744 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1745 if (intel_sdvo_connector->flicker_filter_2d)
1746 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1747 if (intel_sdvo_connector->flicker_filter_adaptive)
1748 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1749 if (intel_sdvo_connector->tv_luma_filter)
1750 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1751 if (intel_sdvo_connector->tv_chroma_filter)
1752 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1753 if (intel_sdvo_connector->dot_crawl)
1754 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1755 if (intel_sdvo_connector->brightness)
1756 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1757 }
1758
1759 static void intel_sdvo_destroy(struct drm_connector *connector)
1760 {
1761 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1762
1763 if (intel_sdvo_connector->tv_format)
1764 drm_property_destroy(connector->dev,
1765 intel_sdvo_connector->tv_format);
1766
1767 intel_sdvo_destroy_enhance_property(connector);
1768 drm_sysfs_connector_remove(connector);
1769 drm_connector_cleanup(connector);
1770 kfree(connector);
1771 }
1772
1773 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1774 {
1775 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1776 struct edid *edid;
1777 bool has_audio = false;
1778
1779 if (!intel_sdvo->is_hdmi)
1780 return false;
1781
1782 edid = intel_sdvo_get_edid(connector);
1783 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1784 has_audio = drm_detect_monitor_audio(edid);
1785 kfree(edid);
1786
1787 return has_audio;
1788 }
1789
1790 static int
1791 intel_sdvo_set_property(struct drm_connector *connector,
1792 struct drm_property *property,
1793 uint64_t val)
1794 {
1795 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1796 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1797 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1798 uint16_t temp_value;
1799 uint8_t cmd;
1800 int ret;
1801
1802 ret = drm_connector_property_set_value(connector, property, val);
1803 if (ret)
1804 return ret;
1805
1806 if (property == dev_priv->force_audio_property) {
1807 int i = val;
1808 bool has_audio;
1809
1810 if (i == intel_sdvo_connector->force_audio)
1811 return 0;
1812
1813 intel_sdvo_connector->force_audio = i;
1814
1815 if (i == HDMI_AUDIO_AUTO)
1816 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1817 else
1818 has_audio = (i == HDMI_AUDIO_ON);
1819
1820 if (has_audio == intel_sdvo->has_hdmi_audio)
1821 return 0;
1822
1823 intel_sdvo->has_hdmi_audio = has_audio;
1824 goto done;
1825 }
1826
1827 if (property == dev_priv->broadcast_rgb_property) {
1828 if (val == !!intel_sdvo->color_range)
1829 return 0;
1830
1831 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1832 goto done;
1833 }
1834
1835 #define CHECK_PROPERTY(name, NAME) \
1836 if (intel_sdvo_connector->name == property) { \
1837 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1838 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1839 cmd = SDVO_CMD_SET_##NAME; \
1840 intel_sdvo_connector->cur_##name = temp_value; \
1841 goto set_value; \
1842 }
1843
1844 if (property == intel_sdvo_connector->tv_format) {
1845 if (val >= TV_FORMAT_NUM)
1846 return -EINVAL;
1847
1848 if (intel_sdvo->tv_format_index ==
1849 intel_sdvo_connector->tv_format_supported[val])
1850 return 0;
1851
1852 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1853 goto done;
1854 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1855 temp_value = val;
1856 if (intel_sdvo_connector->left == property) {
1857 drm_connector_property_set_value(connector,
1858 intel_sdvo_connector->right, val);
1859 if (intel_sdvo_connector->left_margin == temp_value)
1860 return 0;
1861
1862 intel_sdvo_connector->left_margin = temp_value;
1863 intel_sdvo_connector->right_margin = temp_value;
1864 temp_value = intel_sdvo_connector->max_hscan -
1865 intel_sdvo_connector->left_margin;
1866 cmd = SDVO_CMD_SET_OVERSCAN_H;
1867 goto set_value;
1868 } else if (intel_sdvo_connector->right == property) {
1869 drm_connector_property_set_value(connector,
1870 intel_sdvo_connector->left, val);
1871 if (intel_sdvo_connector->right_margin == temp_value)
1872 return 0;
1873
1874 intel_sdvo_connector->left_margin = temp_value;
1875 intel_sdvo_connector->right_margin = temp_value;
1876 temp_value = intel_sdvo_connector->max_hscan -
1877 intel_sdvo_connector->left_margin;
1878 cmd = SDVO_CMD_SET_OVERSCAN_H;
1879 goto set_value;
1880 } else if (intel_sdvo_connector->top == property) {
1881 drm_connector_property_set_value(connector,
1882 intel_sdvo_connector->bottom, val);
1883 if (intel_sdvo_connector->top_margin == temp_value)
1884 return 0;
1885
1886 intel_sdvo_connector->top_margin = temp_value;
1887 intel_sdvo_connector->bottom_margin = temp_value;
1888 temp_value = intel_sdvo_connector->max_vscan -
1889 intel_sdvo_connector->top_margin;
1890 cmd = SDVO_CMD_SET_OVERSCAN_V;
1891 goto set_value;
1892 } else if (intel_sdvo_connector->bottom == property) {
1893 drm_connector_property_set_value(connector,
1894 intel_sdvo_connector->top, val);
1895 if (intel_sdvo_connector->bottom_margin == temp_value)
1896 return 0;
1897
1898 intel_sdvo_connector->top_margin = temp_value;
1899 intel_sdvo_connector->bottom_margin = temp_value;
1900 temp_value = intel_sdvo_connector->max_vscan -
1901 intel_sdvo_connector->top_margin;
1902 cmd = SDVO_CMD_SET_OVERSCAN_V;
1903 goto set_value;
1904 }
1905 CHECK_PROPERTY(hpos, HPOS)
1906 CHECK_PROPERTY(vpos, VPOS)
1907 CHECK_PROPERTY(saturation, SATURATION)
1908 CHECK_PROPERTY(contrast, CONTRAST)
1909 CHECK_PROPERTY(hue, HUE)
1910 CHECK_PROPERTY(brightness, BRIGHTNESS)
1911 CHECK_PROPERTY(sharpness, SHARPNESS)
1912 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1913 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1914 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1915 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1916 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1917 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1918 }
1919
1920 return -EINVAL; /* unknown property */
1921
1922 set_value:
1923 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1924 return -EIO;
1925
1926
1927 done:
1928 if (intel_sdvo->base.base.crtc) {
1929 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1930 intel_set_mode(crtc, &crtc->mode,
1931 crtc->x, crtc->y, crtc->fb);
1932 }
1933
1934 return 0;
1935 #undef CHECK_PROPERTY
1936 }
1937
1938 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1939 .mode_fixup = intel_sdvo_mode_fixup,
1940 .mode_set = intel_sdvo_mode_set,
1941 .disable = intel_encoder_noop,
1942 };
1943
1944 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1945 .dpms = intel_sdvo_dpms,
1946 .detect = intel_sdvo_detect,
1947 .fill_modes = drm_helper_probe_single_connector_modes,
1948 .set_property = intel_sdvo_set_property,
1949 .destroy = intel_sdvo_destroy,
1950 };
1951
1952 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1953 .get_modes = intel_sdvo_get_modes,
1954 .mode_valid = intel_sdvo_mode_valid,
1955 .best_encoder = intel_best_encoder,
1956 };
1957
1958 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1959 {
1960 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1961
1962 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1963 drm_mode_destroy(encoder->dev,
1964 intel_sdvo->sdvo_lvds_fixed_mode);
1965
1966 i2c_del_adapter(&intel_sdvo->ddc);
1967 intel_encoder_destroy(encoder);
1968 }
1969
1970 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1971 .destroy = intel_sdvo_enc_destroy,
1972 };
1973
1974 static void
1975 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1976 {
1977 uint16_t mask = 0;
1978 unsigned int num_bits;
1979
1980 /* Make a mask of outputs less than or equal to our own priority in the
1981 * list.
1982 */
1983 switch (sdvo->controlled_output) {
1984 case SDVO_OUTPUT_LVDS1:
1985 mask |= SDVO_OUTPUT_LVDS1;
1986 case SDVO_OUTPUT_LVDS0:
1987 mask |= SDVO_OUTPUT_LVDS0;
1988 case SDVO_OUTPUT_TMDS1:
1989 mask |= SDVO_OUTPUT_TMDS1;
1990 case SDVO_OUTPUT_TMDS0:
1991 mask |= SDVO_OUTPUT_TMDS0;
1992 case SDVO_OUTPUT_RGB1:
1993 mask |= SDVO_OUTPUT_RGB1;
1994 case SDVO_OUTPUT_RGB0:
1995 mask |= SDVO_OUTPUT_RGB0;
1996 break;
1997 }
1998
1999 /* Count bits to find what number we are in the priority list. */
2000 mask &= sdvo->caps.output_flags;
2001 num_bits = hweight16(mask);
2002 /* If more than 3 outputs, default to DDC bus 3 for now. */
2003 if (num_bits > 3)
2004 num_bits = 3;
2005
2006 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2007 sdvo->ddc_bus = 1 << num_bits;
2008 }
2009
2010 /**
2011 * Choose the appropriate DDC bus for control bus switch command for this
2012 * SDVO output based on the controlled output.
2013 *
2014 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2015 * outputs, then LVDS outputs.
2016 */
2017 static void
2018 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2019 struct intel_sdvo *sdvo, u32 reg)
2020 {
2021 struct sdvo_device_mapping *mapping;
2022
2023 if (sdvo->is_sdvob)
2024 mapping = &(dev_priv->sdvo_mappings[0]);
2025 else
2026 mapping = &(dev_priv->sdvo_mappings[1]);
2027
2028 if (mapping->initialized)
2029 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2030 else
2031 intel_sdvo_guess_ddc_bus(sdvo);
2032 }
2033
2034 static void
2035 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2036 struct intel_sdvo *sdvo, u32 reg)
2037 {
2038 struct sdvo_device_mapping *mapping;
2039 u8 pin;
2040
2041 if (sdvo->is_sdvob)
2042 mapping = &dev_priv->sdvo_mappings[0];
2043 else
2044 mapping = &dev_priv->sdvo_mappings[1];
2045
2046 pin = GMBUS_PORT_DPB;
2047 if (mapping->initialized)
2048 pin = mapping->i2c_pin;
2049
2050 if (intel_gmbus_is_port_valid(pin)) {
2051 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2052 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
2053 intel_gmbus_force_bit(sdvo->i2c, true);
2054 } else {
2055 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
2056 }
2057 }
2058
2059 static bool
2060 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2061 {
2062 return intel_sdvo_check_supp_encode(intel_sdvo);
2063 }
2064
2065 static u8
2066 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2067 {
2068 struct drm_i915_private *dev_priv = dev->dev_private;
2069 struct sdvo_device_mapping *my_mapping, *other_mapping;
2070
2071 if (sdvo->is_sdvob) {
2072 my_mapping = &dev_priv->sdvo_mappings[0];
2073 other_mapping = &dev_priv->sdvo_mappings[1];
2074 } else {
2075 my_mapping = &dev_priv->sdvo_mappings[1];
2076 other_mapping = &dev_priv->sdvo_mappings[0];
2077 }
2078
2079 /* If the BIOS described our SDVO device, take advantage of it. */
2080 if (my_mapping->slave_addr)
2081 return my_mapping->slave_addr;
2082
2083 /* If the BIOS only described a different SDVO device, use the
2084 * address that it isn't using.
2085 */
2086 if (other_mapping->slave_addr) {
2087 if (other_mapping->slave_addr == 0x70)
2088 return 0x72;
2089 else
2090 return 0x70;
2091 }
2092
2093 /* No SDVO device info is found for another DVO port,
2094 * so use mapping assumption we had before BIOS parsing.
2095 */
2096 if (sdvo->is_sdvob)
2097 return 0x70;
2098 else
2099 return 0x72;
2100 }
2101
2102 static void
2103 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2104 struct intel_sdvo *encoder)
2105 {
2106 drm_connector_init(encoder->base.base.dev,
2107 &connector->base.base,
2108 &intel_sdvo_connector_funcs,
2109 connector->base.base.connector_type);
2110
2111 drm_connector_helper_add(&connector->base.base,
2112 &intel_sdvo_connector_helper_funcs);
2113
2114 connector->base.base.interlace_allowed = 1;
2115 connector->base.base.doublescan_allowed = 0;
2116 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2117 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2118
2119 intel_connector_attach_encoder(&connector->base, &encoder->base);
2120 drm_sysfs_connector_add(&connector->base.base);
2121 }
2122
2123 static void
2124 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2125 {
2126 struct drm_device *dev = connector->base.base.dev;
2127
2128 intel_attach_force_audio_property(&connector->base.base);
2129 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2130 intel_attach_broadcast_rgb_property(&connector->base.base);
2131 }
2132
2133 static bool
2134 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2135 {
2136 struct drm_encoder *encoder = &intel_sdvo->base.base;
2137 struct drm_connector *connector;
2138 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2139 struct intel_connector *intel_connector;
2140 struct intel_sdvo_connector *intel_sdvo_connector;
2141
2142 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2143 if (!intel_sdvo_connector)
2144 return false;
2145
2146 if (device == 0) {
2147 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2148 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2149 } else if (device == 1) {
2150 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2151 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2152 }
2153
2154 intel_connector = &intel_sdvo_connector->base;
2155 connector = &intel_connector->base;
2156 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2157 intel_sdvo_connector->output_flag) {
2158 connector->polled = DRM_CONNECTOR_POLL_HPD;
2159 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2160 /* Some SDVO devices have one-shot hotplug interrupts.
2161 * Ensure that they get re-enabled when an interrupt happens.
2162 */
2163 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2164 intel_sdvo_enable_hotplug(intel_encoder);
2165 } else {
2166 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2167 }
2168 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2169 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2170
2171 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2172 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2173 intel_sdvo->is_hdmi = true;
2174 }
2175 intel_sdvo->base.cloneable = true;
2176
2177 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2178 if (intel_sdvo->is_hdmi)
2179 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2180
2181 return true;
2182 }
2183
2184 static bool
2185 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2186 {
2187 struct drm_encoder *encoder = &intel_sdvo->base.base;
2188 struct drm_connector *connector;
2189 struct intel_connector *intel_connector;
2190 struct intel_sdvo_connector *intel_sdvo_connector;
2191
2192 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2193 if (!intel_sdvo_connector)
2194 return false;
2195
2196 intel_connector = &intel_sdvo_connector->base;
2197 connector = &intel_connector->base;
2198 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2199 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2200
2201 intel_sdvo->controlled_output |= type;
2202 intel_sdvo_connector->output_flag = type;
2203
2204 intel_sdvo->is_tv = true;
2205 intel_sdvo->base.needs_tv_clock = true;
2206 intel_sdvo->base.cloneable = false;
2207
2208 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2209
2210 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2211 goto err;
2212
2213 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2214 goto err;
2215
2216 return true;
2217
2218 err:
2219 intel_sdvo_destroy(connector);
2220 return false;
2221 }
2222
2223 static bool
2224 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2225 {
2226 struct drm_encoder *encoder = &intel_sdvo->base.base;
2227 struct drm_connector *connector;
2228 struct intel_connector *intel_connector;
2229 struct intel_sdvo_connector *intel_sdvo_connector;
2230
2231 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2232 if (!intel_sdvo_connector)
2233 return false;
2234
2235 intel_connector = &intel_sdvo_connector->base;
2236 connector = &intel_connector->base;
2237 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2238 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2239 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2240
2241 if (device == 0) {
2242 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2243 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2244 } else if (device == 1) {
2245 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2246 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2247 }
2248
2249 intel_sdvo->base.cloneable = true;
2250
2251 intel_sdvo_connector_init(intel_sdvo_connector,
2252 intel_sdvo);
2253 return true;
2254 }
2255
2256 static bool
2257 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2258 {
2259 struct drm_encoder *encoder = &intel_sdvo->base.base;
2260 struct drm_connector *connector;
2261 struct intel_connector *intel_connector;
2262 struct intel_sdvo_connector *intel_sdvo_connector;
2263
2264 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2265 if (!intel_sdvo_connector)
2266 return false;
2267
2268 intel_connector = &intel_sdvo_connector->base;
2269 connector = &intel_connector->base;
2270 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2271 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2272
2273 if (device == 0) {
2274 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2275 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2276 } else if (device == 1) {
2277 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2278 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2279 }
2280
2281 /* SDVO LVDS is cloneable because the SDVO encoder does the upscaling,
2282 * as opposed to native LVDS, where we upscale with the panel-fitter
2283 * (and hence only the native LVDS resolution could be cloned). */
2284 intel_sdvo->base.cloneable = true;
2285
2286 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2287 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2288 goto err;
2289
2290 return true;
2291
2292 err:
2293 intel_sdvo_destroy(connector);
2294 return false;
2295 }
2296
2297 static bool
2298 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2299 {
2300 intel_sdvo->is_tv = false;
2301 intel_sdvo->base.needs_tv_clock = false;
2302 intel_sdvo->is_lvds = false;
2303
2304 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2305
2306 if (flags & SDVO_OUTPUT_TMDS0)
2307 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2308 return false;
2309
2310 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2311 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2312 return false;
2313
2314 /* TV has no XXX1 function block */
2315 if (flags & SDVO_OUTPUT_SVID0)
2316 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2317 return false;
2318
2319 if (flags & SDVO_OUTPUT_CVBS0)
2320 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2321 return false;
2322
2323 if (flags & SDVO_OUTPUT_YPRPB0)
2324 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2325 return false;
2326
2327 if (flags & SDVO_OUTPUT_RGB0)
2328 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2329 return false;
2330
2331 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2332 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2333 return false;
2334
2335 if (flags & SDVO_OUTPUT_LVDS0)
2336 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2337 return false;
2338
2339 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2340 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2341 return false;
2342
2343 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2344 unsigned char bytes[2];
2345
2346 intel_sdvo->controlled_output = 0;
2347 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2348 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2349 SDVO_NAME(intel_sdvo),
2350 bytes[0], bytes[1]);
2351 return false;
2352 }
2353 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2354
2355 return true;
2356 }
2357
2358 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2359 struct intel_sdvo_connector *intel_sdvo_connector,
2360 int type)
2361 {
2362 struct drm_device *dev = intel_sdvo->base.base.dev;
2363 struct intel_sdvo_tv_format format;
2364 uint32_t format_map, i;
2365
2366 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2367 return false;
2368
2369 BUILD_BUG_ON(sizeof(format) != 6);
2370 if (!intel_sdvo_get_value(intel_sdvo,
2371 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2372 &format, sizeof(format)))
2373 return false;
2374
2375 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2376
2377 if (format_map == 0)
2378 return false;
2379
2380 intel_sdvo_connector->format_supported_num = 0;
2381 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2382 if (format_map & (1 << i))
2383 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2384
2385
2386 intel_sdvo_connector->tv_format =
2387 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2388 "mode", intel_sdvo_connector->format_supported_num);
2389 if (!intel_sdvo_connector->tv_format)
2390 return false;
2391
2392 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2393 drm_property_add_enum(
2394 intel_sdvo_connector->tv_format, i,
2395 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2396
2397 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2398 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2399 intel_sdvo_connector->tv_format, 0);
2400 return true;
2401
2402 }
2403
2404 #define ENHANCEMENT(name, NAME) do { \
2405 if (enhancements.name) { \
2406 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2407 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2408 return false; \
2409 intel_sdvo_connector->max_##name = data_value[0]; \
2410 intel_sdvo_connector->cur_##name = response; \
2411 intel_sdvo_connector->name = \
2412 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2413 if (!intel_sdvo_connector->name) return false; \
2414 drm_connector_attach_property(connector, \
2415 intel_sdvo_connector->name, \
2416 intel_sdvo_connector->cur_##name); \
2417 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2418 data_value[0], data_value[1], response); \
2419 } \
2420 } while (0)
2421
2422 static bool
2423 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2424 struct intel_sdvo_connector *intel_sdvo_connector,
2425 struct intel_sdvo_enhancements_reply enhancements)
2426 {
2427 struct drm_device *dev = intel_sdvo->base.base.dev;
2428 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2429 uint16_t response, data_value[2];
2430
2431 /* when horizontal overscan is supported, Add the left/right property */
2432 if (enhancements.overscan_h) {
2433 if (!intel_sdvo_get_value(intel_sdvo,
2434 SDVO_CMD_GET_MAX_OVERSCAN_H,
2435 &data_value, 4))
2436 return false;
2437
2438 if (!intel_sdvo_get_value(intel_sdvo,
2439 SDVO_CMD_GET_OVERSCAN_H,
2440 &response, 2))
2441 return false;
2442
2443 intel_sdvo_connector->max_hscan = data_value[0];
2444 intel_sdvo_connector->left_margin = data_value[0] - response;
2445 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2446 intel_sdvo_connector->left =
2447 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2448 if (!intel_sdvo_connector->left)
2449 return false;
2450
2451 drm_connector_attach_property(connector,
2452 intel_sdvo_connector->left,
2453 intel_sdvo_connector->left_margin);
2454
2455 intel_sdvo_connector->right =
2456 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2457 if (!intel_sdvo_connector->right)
2458 return false;
2459
2460 drm_connector_attach_property(connector,
2461 intel_sdvo_connector->right,
2462 intel_sdvo_connector->right_margin);
2463 DRM_DEBUG_KMS("h_overscan: max %d, "
2464 "default %d, current %d\n",
2465 data_value[0], data_value[1], response);
2466 }
2467
2468 if (enhancements.overscan_v) {
2469 if (!intel_sdvo_get_value(intel_sdvo,
2470 SDVO_CMD_GET_MAX_OVERSCAN_V,
2471 &data_value, 4))
2472 return false;
2473
2474 if (!intel_sdvo_get_value(intel_sdvo,
2475 SDVO_CMD_GET_OVERSCAN_V,
2476 &response, 2))
2477 return false;
2478
2479 intel_sdvo_connector->max_vscan = data_value[0];
2480 intel_sdvo_connector->top_margin = data_value[0] - response;
2481 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2482 intel_sdvo_connector->top =
2483 drm_property_create_range(dev, 0,
2484 "top_margin", 0, data_value[0]);
2485 if (!intel_sdvo_connector->top)
2486 return false;
2487
2488 drm_connector_attach_property(connector,
2489 intel_sdvo_connector->top,
2490 intel_sdvo_connector->top_margin);
2491
2492 intel_sdvo_connector->bottom =
2493 drm_property_create_range(dev, 0,
2494 "bottom_margin", 0, data_value[0]);
2495 if (!intel_sdvo_connector->bottom)
2496 return false;
2497
2498 drm_connector_attach_property(connector,
2499 intel_sdvo_connector->bottom,
2500 intel_sdvo_connector->bottom_margin);
2501 DRM_DEBUG_KMS("v_overscan: max %d, "
2502 "default %d, current %d\n",
2503 data_value[0], data_value[1], response);
2504 }
2505
2506 ENHANCEMENT(hpos, HPOS);
2507 ENHANCEMENT(vpos, VPOS);
2508 ENHANCEMENT(saturation, SATURATION);
2509 ENHANCEMENT(contrast, CONTRAST);
2510 ENHANCEMENT(hue, HUE);
2511 ENHANCEMENT(sharpness, SHARPNESS);
2512 ENHANCEMENT(brightness, BRIGHTNESS);
2513 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2514 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2515 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2516 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2517 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2518
2519 if (enhancements.dot_crawl) {
2520 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2521 return false;
2522
2523 intel_sdvo_connector->max_dot_crawl = 1;
2524 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2525 intel_sdvo_connector->dot_crawl =
2526 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2527 if (!intel_sdvo_connector->dot_crawl)
2528 return false;
2529
2530 drm_connector_attach_property(connector,
2531 intel_sdvo_connector->dot_crawl,
2532 intel_sdvo_connector->cur_dot_crawl);
2533 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2534 }
2535
2536 return true;
2537 }
2538
2539 static bool
2540 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2541 struct intel_sdvo_connector *intel_sdvo_connector,
2542 struct intel_sdvo_enhancements_reply enhancements)
2543 {
2544 struct drm_device *dev = intel_sdvo->base.base.dev;
2545 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2546 uint16_t response, data_value[2];
2547
2548 ENHANCEMENT(brightness, BRIGHTNESS);
2549
2550 return true;
2551 }
2552 #undef ENHANCEMENT
2553
2554 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2555 struct intel_sdvo_connector *intel_sdvo_connector)
2556 {
2557 union {
2558 struct intel_sdvo_enhancements_reply reply;
2559 uint16_t response;
2560 } enhancements;
2561
2562 BUILD_BUG_ON(sizeof(enhancements) != 2);
2563
2564 enhancements.response = 0;
2565 intel_sdvo_get_value(intel_sdvo,
2566 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2567 &enhancements, sizeof(enhancements));
2568 if (enhancements.response == 0) {
2569 DRM_DEBUG_KMS("No enhancement is supported\n");
2570 return true;
2571 }
2572
2573 if (IS_TV(intel_sdvo_connector))
2574 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2575 else if (IS_LVDS(intel_sdvo_connector))
2576 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2577 else
2578 return true;
2579 }
2580
2581 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2582 struct i2c_msg *msgs,
2583 int num)
2584 {
2585 struct intel_sdvo *sdvo = adapter->algo_data;
2586
2587 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2588 return -EIO;
2589
2590 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2591 }
2592
2593 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2594 {
2595 struct intel_sdvo *sdvo = adapter->algo_data;
2596 return sdvo->i2c->algo->functionality(sdvo->i2c);
2597 }
2598
2599 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2600 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2601 .functionality = intel_sdvo_ddc_proxy_func
2602 };
2603
2604 static bool
2605 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2606 struct drm_device *dev)
2607 {
2608 sdvo->ddc.owner = THIS_MODULE;
2609 sdvo->ddc.class = I2C_CLASS_DDC;
2610 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2611 sdvo->ddc.dev.parent = &dev->pdev->dev;
2612 sdvo->ddc.algo_data = sdvo;
2613 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2614
2615 return i2c_add_adapter(&sdvo->ddc) == 0;
2616 }
2617
2618 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2619 {
2620 struct drm_i915_private *dev_priv = dev->dev_private;
2621 struct intel_encoder *intel_encoder;
2622 struct intel_sdvo *intel_sdvo;
2623 u32 hotplug_mask;
2624 int i;
2625
2626 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2627 if (!intel_sdvo)
2628 return false;
2629
2630 intel_sdvo->sdvo_reg = sdvo_reg;
2631 intel_sdvo->is_sdvob = is_sdvob;
2632 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2633 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2634 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2635 kfree(intel_sdvo);
2636 return false;
2637 }
2638
2639 /* encoder type will be decided later */
2640 intel_encoder = &intel_sdvo->base;
2641 intel_encoder->type = INTEL_OUTPUT_SDVO;
2642 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2643
2644 /* Read the regs to test if we can talk to the device */
2645 for (i = 0; i < 0x40; i++) {
2646 u8 byte;
2647
2648 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2649 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2650 SDVO_NAME(intel_sdvo));
2651 goto err;
2652 }
2653 }
2654
2655 hotplug_mask = 0;
2656 if (IS_G4X(dev)) {
2657 hotplug_mask = intel_sdvo->is_sdvob ?
2658 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2659 } else if (IS_GEN4(dev)) {
2660 hotplug_mask = intel_sdvo->is_sdvob ?
2661 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2662 } else {
2663 hotplug_mask = intel_sdvo->is_sdvob ?
2664 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2665 }
2666
2667 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2668
2669 intel_encoder->disable = intel_disable_sdvo;
2670 intel_encoder->enable = intel_enable_sdvo;
2671 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2672
2673 /* In default case sdvo lvds is false */
2674 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2675 goto err;
2676
2677 if (intel_sdvo_output_setup(intel_sdvo,
2678 intel_sdvo->caps.output_flags) != true) {
2679 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2680 SDVO_NAME(intel_sdvo));
2681 goto err;
2682 }
2683
2684 /* Only enable the hotplug irq if we need it, to work around noisy
2685 * hotplug lines.
2686 */
2687 if (intel_sdvo->hotplug_active)
2688 dev_priv->hotplug_supported_mask |= hotplug_mask;
2689
2690 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2691
2692 /* Set the input timing to the screen. Assume always input 0. */
2693 if (!intel_sdvo_set_target_input(intel_sdvo))
2694 goto err;
2695
2696 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2697 &intel_sdvo->pixel_clock_min,
2698 &intel_sdvo->pixel_clock_max))
2699 goto err;
2700
2701 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2702 "clock range %dMHz - %dMHz, "
2703 "input 1: %c, input 2: %c, "
2704 "output 1: %c, output 2: %c\n",
2705 SDVO_NAME(intel_sdvo),
2706 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2707 intel_sdvo->caps.device_rev_id,
2708 intel_sdvo->pixel_clock_min / 1000,
2709 intel_sdvo->pixel_clock_max / 1000,
2710 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2711 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2712 /* check currently supported outputs */
2713 intel_sdvo->caps.output_flags &
2714 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2715 intel_sdvo->caps.output_flags &
2716 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2717 return true;
2718
2719 err:
2720 drm_encoder_cleanup(&intel_encoder->base);
2721 i2c_del_adapter(&intel_sdvo->ddc);
2722 kfree(intel_sdvo);
2723
2724 return false;
2725 }
Linux kernel - Deliverables
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