2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/delay.h>
33 #include "intel_drv.h"
36 #include "intel_sdvo_regs.h"
39 #define I915_SDVO "i915_sdvo"
40 struct intel_sdvo_priv
{
43 /* Register for the SDVO device: SDVOB or SDVOC */
46 /* Active outputs controlled by this SDVO output */
47 uint16_t controlled_output
;
50 * Capabilities of the SDVO device returned by
51 * i830_sdvo_get_capabilities()
53 struct intel_sdvo_caps caps
;
55 /* Pixel clock limitations reported by the SDVO device, in kHz */
56 int pixel_clock_min
, pixel_clock_max
;
59 * This is set if we're going to treat the device as TV-out.
61 * While we have these nice friendly flags for output types that ought
62 * to decide this for us, the S-Video output on our HDMI+S-Video card
63 * shows up as RGB1 (VGA).
68 * This is set if we treat the device as HDMI, instead of DVI.
73 * This is set if we detect output of sdvo device as LVDS.
78 * This is sdvo flags for input timing.
83 * This is sdvo fixed pannel mode pointer
85 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
88 * Returned SDTV resolutions allowed for the current format, if the
91 struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions
;
94 * Current selected TV format.
96 * This is stored in the same structure that's passed to the device, for
99 struct intel_sdvo_tv_format tv_format
;
102 * supported encoding mode, used to determine whether HDMI is
105 struct intel_sdvo_encode encode
;
107 /* DDC bus used by this SDVO output */
111 u16 save_active_outputs
;
112 struct intel_sdvo_dtd save_input_dtd_1
, save_input_dtd_2
;
113 struct intel_sdvo_dtd save_output_dtd
[16];
118 * Writes the SDVOB or SDVOC with the given value, but always writes both
119 * SDVOB and SDVOC to work around apparent hardware issues (according to
120 * comments in the BIOS).
122 static void intel_sdvo_write_sdvox(struct intel_output
*intel_output
, u32 val
)
124 struct drm_device
*dev
= intel_output
->base
.dev
;
125 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
126 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
127 u32 bval
= val
, cval
= val
;
130 if (sdvo_priv
->output_device
== SDVOB
) {
131 cval
= I915_READ(SDVOC
);
133 bval
= I915_READ(SDVOB
);
136 * Write the registers twice for luck. Sometimes,
137 * writing them only once doesn't appear to 'stick'.
138 * The BIOS does this too. Yay, magic
140 for (i
= 0; i
< 2; i
++)
142 I915_WRITE(SDVOB
, bval
);
144 I915_WRITE(SDVOC
, cval
);
149 static bool intel_sdvo_read_byte(struct intel_output
*intel_output
, u8 addr
,
152 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
157 struct i2c_msg msgs
[] = {
159 .addr
= sdvo_priv
->slave_addr
>> 1,
165 .addr
= sdvo_priv
->slave_addr
>> 1,
175 if ((ret
= i2c_transfer(intel_output
->i2c_bus
, msgs
, 2)) == 2)
181 DRM_DEBUG("i2c transfer returned %d\n", ret
);
185 static bool intel_sdvo_write_byte(struct intel_output
*intel_output
, int addr
,
188 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
190 struct i2c_msg msgs
[] = {
192 .addr
= sdvo_priv
->slave_addr
>> 1,
202 if (i2c_transfer(intel_output
->i2c_bus
, msgs
, 1) == 1)
209 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
210 /** Mapping of command numbers to names, for debug output */
211 static const struct _sdvo_cmd_name
{
214 } sdvo_cmd_names
[] = {
215 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
216 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
217 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
218 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
219 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
220 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
221 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
222 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
223 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
224 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
225 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
226 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
227 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
228 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
229 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
230 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
231 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
232 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
233 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
234 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
235 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
236 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
237 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
238 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
239 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
240 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
241 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
242 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
243 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
244 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
245 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
246 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
247 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
248 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
249 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
250 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
251 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
252 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
253 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
254 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
255 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
256 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
257 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
259 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
260 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
261 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
262 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
263 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
264 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
265 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
266 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
267 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
268 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
269 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
270 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
271 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
272 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
273 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
274 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
275 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
276 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
277 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
278 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
281 #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC")
282 #define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv)
285 static void intel_sdvo_debug_write(struct intel_output
*intel_output
, u8 cmd
,
286 void *args
, int args_len
)
288 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
291 DRM_DEBUG_KMS(I915_SDVO
, "%s: W: %02X ",
292 SDVO_NAME(sdvo_priv
), cmd
);
293 for (i
= 0; i
< args_len
; i
++)
294 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
297 for (i
= 0; i
< sizeof(sdvo_cmd_names
) / sizeof(sdvo_cmd_names
[0]); i
++) {
298 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
299 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
303 if (i
== sizeof(sdvo_cmd_names
)/ sizeof(sdvo_cmd_names
[0]))
304 DRM_LOG_KMS("(%02X)", cmd
);
308 #define intel_sdvo_debug_write(o, c, a, l)
311 static void intel_sdvo_write_cmd(struct intel_output
*intel_output
, u8 cmd
,
312 void *args
, int args_len
)
316 intel_sdvo_debug_write(intel_output
, cmd
, args
, args_len
);
318 for (i
= 0; i
< args_len
; i
++) {
319 intel_sdvo_write_byte(intel_output
, SDVO_I2C_ARG_0
- i
,
323 intel_sdvo_write_byte(intel_output
, SDVO_I2C_OPCODE
, cmd
);
327 static const char *cmd_status_names
[] = {
333 "Target not specified",
334 "Scaling not supported"
337 static void intel_sdvo_debug_response(struct intel_output
*intel_output
,
338 void *response
, int response_len
,
341 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
344 DRM_DEBUG_KMS(I915_SDVO
, "%s: R: ", SDVO_NAME(sdvo_priv
));
345 for (i
= 0; i
< response_len
; i
++)
346 DRM_LOG_KMS("%02X ", ((u8
*)response
)[i
]);
349 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
350 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
352 DRM_LOG_KMS("(??? %d)", status
);
356 #define intel_sdvo_debug_response(o, r, l, s)
359 static u8
intel_sdvo_read_response(struct intel_output
*intel_output
,
360 void *response
, int response_len
)
367 /* Read the command response */
368 for (i
= 0; i
< response_len
; i
++) {
369 intel_sdvo_read_byte(intel_output
,
370 SDVO_I2C_RETURN_0
+ i
,
371 &((u8
*)response
)[i
]);
374 /* read the return status */
375 intel_sdvo_read_byte(intel_output
, SDVO_I2C_CMD_STATUS
,
378 intel_sdvo_debug_response(intel_output
, response
, response_len
,
380 if (status
!= SDVO_CMD_STATUS_PENDING
)
389 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
391 if (mode
->clock
>= 100000)
393 else if (mode
->clock
>= 50000)
400 * Don't check status code from this as it switches the bus back to the
401 * SDVO chips which defeats the purpose of doing a bus switch in the first
404 static void intel_sdvo_set_control_bus_switch(struct intel_output
*intel_output
,
407 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_CONTROL_BUS_SWITCH
, &target
, 1);
410 static bool intel_sdvo_set_target_input(struct intel_output
*intel_output
, bool target_0
, bool target_1
)
412 struct intel_sdvo_set_target_input_args targets
= {0};
415 if (target_0
&& target_1
)
416 return SDVO_CMD_STATUS_NOTSUPP
;
419 targets
.target_1
= 1;
421 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_TARGET_INPUT
, &targets
,
424 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
426 return (status
== SDVO_CMD_STATUS_SUCCESS
);
430 * Return whether each input is trained.
432 * This function is making an assumption about the layout of the response,
433 * which should be checked against the docs.
435 static bool intel_sdvo_get_trained_inputs(struct intel_output
*intel_output
, bool *input_1
, bool *input_2
)
437 struct intel_sdvo_get_trained_inputs_response response
;
440 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_TRAINED_INPUTS
, NULL
, 0);
441 status
= intel_sdvo_read_response(intel_output
, &response
, sizeof(response
));
442 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
445 *input_1
= response
.input0_trained
;
446 *input_2
= response
.input1_trained
;
450 static bool intel_sdvo_get_active_outputs(struct intel_output
*intel_output
,
455 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_OUTPUTS
, NULL
, 0);
456 status
= intel_sdvo_read_response(intel_output
, outputs
, sizeof(*outputs
));
458 return (status
== SDVO_CMD_STATUS_SUCCESS
);
461 static bool intel_sdvo_set_active_outputs(struct intel_output
*intel_output
,
466 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_OUTPUTS
, &outputs
,
468 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
469 return (status
== SDVO_CMD_STATUS_SUCCESS
);
472 static bool intel_sdvo_set_encoder_power_state(struct intel_output
*intel_output
,
475 u8 status
, state
= SDVO_ENCODER_STATE_ON
;
478 case DRM_MODE_DPMS_ON
:
479 state
= SDVO_ENCODER_STATE_ON
;
481 case DRM_MODE_DPMS_STANDBY
:
482 state
= SDVO_ENCODER_STATE_STANDBY
;
484 case DRM_MODE_DPMS_SUSPEND
:
485 state
= SDVO_ENCODER_STATE_SUSPEND
;
487 case DRM_MODE_DPMS_OFF
:
488 state
= SDVO_ENCODER_STATE_OFF
;
492 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
,
494 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
496 return (status
== SDVO_CMD_STATUS_SUCCESS
);
499 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output
*intel_output
,
503 struct intel_sdvo_pixel_clock_range clocks
;
506 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
509 status
= intel_sdvo_read_response(intel_output
, &clocks
, sizeof(clocks
));
511 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
514 /* Convert the values from units of 10 kHz to kHz. */
515 *clock_min
= clocks
.min
* 10;
516 *clock_max
= clocks
.max
* 10;
521 static bool intel_sdvo_set_target_output(struct intel_output
*intel_output
,
526 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_TARGET_OUTPUT
, &outputs
,
529 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
530 return (status
== SDVO_CMD_STATUS_SUCCESS
);
533 static bool intel_sdvo_get_timing(struct intel_output
*intel_output
, u8 cmd
,
534 struct intel_sdvo_dtd
*dtd
)
538 intel_sdvo_write_cmd(intel_output
, cmd
, NULL
, 0);
539 status
= intel_sdvo_read_response(intel_output
, &dtd
->part1
,
541 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
544 intel_sdvo_write_cmd(intel_output
, cmd
+ 1, NULL
, 0);
545 status
= intel_sdvo_read_response(intel_output
, &dtd
->part2
,
547 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
553 static bool intel_sdvo_get_input_timing(struct intel_output
*intel_output
,
554 struct intel_sdvo_dtd
*dtd
)
556 return intel_sdvo_get_timing(intel_output
,
557 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
560 static bool intel_sdvo_get_output_timing(struct intel_output
*intel_output
,
561 struct intel_sdvo_dtd
*dtd
)
563 return intel_sdvo_get_timing(intel_output
,
564 SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
, dtd
);
567 static bool intel_sdvo_set_timing(struct intel_output
*intel_output
, u8 cmd
,
568 struct intel_sdvo_dtd
*dtd
)
572 intel_sdvo_write_cmd(intel_output
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
));
573 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
574 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
577 intel_sdvo_write_cmd(intel_output
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
578 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
579 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
585 static bool intel_sdvo_set_input_timing(struct intel_output
*intel_output
,
586 struct intel_sdvo_dtd
*dtd
)
588 return intel_sdvo_set_timing(intel_output
,
589 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
592 static bool intel_sdvo_set_output_timing(struct intel_output
*intel_output
,
593 struct intel_sdvo_dtd
*dtd
)
595 return intel_sdvo_set_timing(intel_output
,
596 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
600 intel_sdvo_create_preferred_input_timing(struct intel_output
*output
,
605 struct intel_sdvo_preferred_input_timing_args args
;
606 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
609 memset(&args
, 0, sizeof(args
));
612 args
.height
= height
;
615 if (sdvo_priv
->is_lvds
&&
616 (sdvo_priv
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
617 sdvo_priv
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
620 intel_sdvo_write_cmd(output
, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
621 &args
, sizeof(args
));
622 status
= intel_sdvo_read_response(output
, NULL
, 0);
623 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
629 static bool intel_sdvo_get_preferred_input_timing(struct intel_output
*output
,
630 struct intel_sdvo_dtd
*dtd
)
634 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
637 status
= intel_sdvo_read_response(output
, &dtd
->part1
,
639 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
642 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
645 status
= intel_sdvo_read_response(output
, &dtd
->part2
,
647 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
653 static int intel_sdvo_get_clock_rate_mult(struct intel_output
*intel_output
)
657 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_CLOCK_RATE_MULT
, NULL
, 0);
658 status
= intel_sdvo_read_response(intel_output
, &response
, 1);
660 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
661 DRM_DEBUG("Couldn't get SDVO clock rate multiplier\n");
662 return SDVO_CLOCK_RATE_MULT_1X
;
664 DRM_DEBUG("Current clock rate multiplier: %d\n", response
);
670 static bool intel_sdvo_set_clock_rate_mult(struct intel_output
*intel_output
, u8 val
)
674 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
675 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
676 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
682 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
683 struct drm_display_mode
*mode
)
685 uint16_t width
, height
;
686 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
687 uint16_t h_sync_offset
, v_sync_offset
;
689 width
= mode
->crtc_hdisplay
;
690 height
= mode
->crtc_vdisplay
;
692 /* do some mode translations */
693 h_blank_len
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
694 h_sync_len
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
696 v_blank_len
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
697 v_sync_len
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
699 h_sync_offset
= mode
->crtc_hsync_start
- mode
->crtc_hblank_start
;
700 v_sync_offset
= mode
->crtc_vsync_start
- mode
->crtc_vblank_start
;
702 dtd
->part1
.clock
= mode
->clock
/ 10;
703 dtd
->part1
.h_active
= width
& 0xff;
704 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
705 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
706 ((h_blank_len
>> 8) & 0xf);
707 dtd
->part1
.v_active
= height
& 0xff;
708 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
709 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
710 ((v_blank_len
>> 8) & 0xf);
712 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
713 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
714 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
716 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
717 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
718 ((v_sync_len
& 0x30) >> 4);
720 dtd
->part2
.dtd_flags
= 0x18;
721 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
722 dtd
->part2
.dtd_flags
|= 0x2;
723 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
724 dtd
->part2
.dtd_flags
|= 0x4;
726 dtd
->part2
.sdvo_flags
= 0;
727 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
728 dtd
->part2
.reserved
= 0;
731 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
732 struct intel_sdvo_dtd
*dtd
)
734 mode
->hdisplay
= dtd
->part1
.h_active
;
735 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
736 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
737 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
738 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
739 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
740 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
741 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
743 mode
->vdisplay
= dtd
->part1
.v_active
;
744 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
745 mode
->vsync_start
= mode
->vdisplay
;
746 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
747 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
748 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
749 mode
->vsync_end
= mode
->vsync_start
+
750 (dtd
->part2
.v_sync_off_width
& 0xf);
751 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
752 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
753 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
755 mode
->clock
= dtd
->part1
.clock
* 10;
757 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
758 if (dtd
->part2
.dtd_flags
& 0x2)
759 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
760 if (dtd
->part2
.dtd_flags
& 0x4)
761 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
764 static bool intel_sdvo_get_supp_encode(struct intel_output
*output
,
765 struct intel_sdvo_encode
*encode
)
769 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_SUPP_ENCODE
, NULL
, 0);
770 status
= intel_sdvo_read_response(output
, encode
, sizeof(*encode
));
771 if (status
!= SDVO_CMD_STATUS_SUCCESS
) { /* non-support means DVI */
772 memset(encode
, 0, sizeof(*encode
));
779 static bool intel_sdvo_set_encode(struct intel_output
*output
, uint8_t mode
)
783 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
784 status
= intel_sdvo_read_response(output
, NULL
, 0);
786 return (status
== SDVO_CMD_STATUS_SUCCESS
);
789 static bool intel_sdvo_set_colorimetry(struct intel_output
*output
,
794 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
795 status
= intel_sdvo_read_response(output
, NULL
, 0);
797 return (status
== SDVO_CMD_STATUS_SUCCESS
);
801 static void intel_sdvo_dump_hdmi_buf(struct intel_output
*output
)
804 uint8_t set_buf_index
[2];
810 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_AV_SPLIT
, NULL
, 0);
811 intel_sdvo_read_response(output
, &av_split
, 1);
813 for (i
= 0; i
<= av_split
; i
++) {
814 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
815 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_INDEX
,
817 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
818 intel_sdvo_read_response(output
, &buf_size
, 1);
821 for (j
= 0; j
<= buf_size
; j
+= 8) {
822 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_DATA
,
824 intel_sdvo_read_response(output
, pos
, 8);
831 static void intel_sdvo_set_hdmi_buf(struct intel_output
*output
, int index
,
832 uint8_t *data
, int8_t size
, uint8_t tx_rate
)
834 uint8_t set_buf_index
[2];
836 set_buf_index
[0] = index
;
837 set_buf_index
[1] = 0;
839 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_INDEX
, set_buf_index
, 2);
841 for (; size
> 0; size
-= 8) {
842 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_DATA
, data
, 8);
846 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_TXRATE
, &tx_rate
, 1);
849 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data
, uint8_t size
)
854 for (i
= 0; i
< size
; i
++)
860 #define DIP_TYPE_AVI 0x82
861 #define DIP_VERSION_AVI 0x2
862 #define DIP_LEN_AVI 13
864 struct dip_infoframe
{
892 /* Packet Byte #6~13 */
893 uint16_t top_bar_end
;
894 uint16_t bottom_bar_start
;
895 uint16_t left_bar_end
;
896 uint16_t right_bar_start
;
900 uint8_t channel_count
:3;
902 uint8_t coding_type
:4;
904 uint8_t sample_size
:2; /* SS0, SS1 */
905 uint8_t sample_frequency
:3;
908 uint8_t coding_type_private
:5;
911 uint8_t channel_allocation
;
914 uint8_t level_shift
:4;
915 uint8_t downmix_inhibit
:1;
918 } __attribute__ ((packed
)) u
;
919 } __attribute__((packed
));
921 static void intel_sdvo_set_avi_infoframe(struct intel_output
*output
,
922 struct drm_display_mode
* mode
)
924 struct dip_infoframe avi_if
= {
925 .type
= DIP_TYPE_AVI
,
926 .version
= DIP_VERSION_AVI
,
930 avi_if
.checksum
= intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if
,
932 intel_sdvo_set_hdmi_buf(output
, 1, (uint8_t *)&avi_if
, 4 + avi_if
.len
,
936 static void intel_sdvo_set_tv_format(struct intel_output
*output
)
938 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
939 struct intel_sdvo_tv_format
*format
, unset
;
942 format
= &sdvo_priv
->tv_format
;
943 memset(&unset
, 0, sizeof(unset
));
944 if (memcmp(format
, &unset
, sizeof(*format
))) {
945 DRM_DEBUG("%s: Choosing default TV format of NTSC-M\n",
946 SDVO_NAME(sdvo_priv
));
948 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_TV_FORMAT
, format
,
950 status
= intel_sdvo_read_response(output
, NULL
, 0);
951 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
952 DRM_DEBUG("%s: Failed to set TV format\n",
953 SDVO_NAME(sdvo_priv
));
957 static bool intel_sdvo_mode_fixup(struct drm_encoder
*encoder
,
958 struct drm_display_mode
*mode
,
959 struct drm_display_mode
*adjusted_mode
)
961 struct intel_output
*output
= enc_to_intel_output(encoder
);
962 struct intel_sdvo_priv
*dev_priv
= output
->dev_priv
;
964 if (dev_priv
->is_tv
) {
965 struct intel_sdvo_dtd output_dtd
;
968 /* We need to construct preferred input timings based on our
969 * output timings. To do that, we have to set the output
970 * timings, even though this isn't really the right place in
971 * the sequence to do it. Oh well.
975 /* Set output timings */
976 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
977 intel_sdvo_set_target_output(output
,
978 dev_priv
->controlled_output
);
979 intel_sdvo_set_output_timing(output
, &output_dtd
);
981 /* Set the input timing to the screen. Assume always input 0. */
982 intel_sdvo_set_target_input(output
, true, false);
985 success
= intel_sdvo_create_preferred_input_timing(output
,
990 struct intel_sdvo_dtd input_dtd
;
992 intel_sdvo_get_preferred_input_timing(output
,
994 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
995 dev_priv
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
997 drm_mode_set_crtcinfo(adjusted_mode
, 0);
999 mode
->clock
= adjusted_mode
->clock
;
1001 adjusted_mode
->clock
*=
1002 intel_sdvo_get_pixel_multiplier(mode
);
1006 } else if (dev_priv
->is_lvds
) {
1007 struct intel_sdvo_dtd output_dtd
;
1010 drm_mode_set_crtcinfo(dev_priv
->sdvo_lvds_fixed_mode
, 0);
1011 /* Set output timings */
1012 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1013 dev_priv
->sdvo_lvds_fixed_mode
);
1015 intel_sdvo_set_target_output(output
,
1016 dev_priv
->controlled_output
);
1017 intel_sdvo_set_output_timing(output
, &output_dtd
);
1019 /* Set the input timing to the screen. Assume always input 0. */
1020 intel_sdvo_set_target_input(output
, true, false);
1023 success
= intel_sdvo_create_preferred_input_timing(
1030 struct intel_sdvo_dtd input_dtd
;
1032 intel_sdvo_get_preferred_input_timing(output
,
1034 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1035 dev_priv
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1037 drm_mode_set_crtcinfo(adjusted_mode
, 0);
1039 mode
->clock
= adjusted_mode
->clock
;
1041 adjusted_mode
->clock
*=
1042 intel_sdvo_get_pixel_multiplier(mode
);
1048 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1049 * SDVO device will be told of the multiplier during mode_set.
1051 adjusted_mode
->clock
*= intel_sdvo_get_pixel_multiplier(mode
);
1056 static void intel_sdvo_mode_set(struct drm_encoder
*encoder
,
1057 struct drm_display_mode
*mode
,
1058 struct drm_display_mode
*adjusted_mode
)
1060 struct drm_device
*dev
= encoder
->dev
;
1061 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1062 struct drm_crtc
*crtc
= encoder
->crtc
;
1063 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
1064 struct intel_output
*output
= enc_to_intel_output(encoder
);
1065 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1067 int sdvo_pixel_multiply
;
1068 struct intel_sdvo_in_out_map in_out
;
1069 struct intel_sdvo_dtd input_dtd
;
1075 /* First, set the input mapping for the first input to our controlled
1076 * output. This is only correct if we're a single-input device, in
1077 * which case the first input is the output from the appropriate SDVO
1078 * channel on the motherboard. In a two-input device, the first input
1079 * will be SDVOB and the second SDVOC.
1081 in_out
.in0
= sdvo_priv
->controlled_output
;
1084 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_IN_OUT_MAP
,
1085 &in_out
, sizeof(in_out
));
1086 status
= intel_sdvo_read_response(output
, NULL
, 0);
1088 if (sdvo_priv
->is_hdmi
) {
1089 intel_sdvo_set_avi_infoframe(output
, mode
);
1090 sdvox
|= SDVO_AUDIO_ENABLE
;
1093 /* We have tried to get input timing in mode_fixup, and filled into
1095 if (sdvo_priv
->is_tv
|| sdvo_priv
->is_lvds
) {
1096 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1097 input_dtd
.part2
.sdvo_flags
= sdvo_priv
->sdvo_flags
;
1099 intel_sdvo_get_dtd_from_mode(&input_dtd
, mode
);
1101 /* If it's a TV, we already set the output timing in mode_fixup.
1102 * Otherwise, the output timing is equal to the input timing.
1104 if (!sdvo_priv
->is_tv
&& !sdvo_priv
->is_lvds
) {
1105 /* Set the output timing to the screen */
1106 intel_sdvo_set_target_output(output
,
1107 sdvo_priv
->controlled_output
);
1108 intel_sdvo_set_output_timing(output
, &input_dtd
);
1111 /* Set the input timing to the screen. Assume always input 0. */
1112 intel_sdvo_set_target_input(output
, true, false);
1114 if (sdvo_priv
->is_tv
)
1115 intel_sdvo_set_tv_format(output
);
1117 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1118 * provide the device with a timing it can support, if it supports that
1119 * feature. However, presumably we would need to adjust the CRTC to
1120 * output the preferred timing, and we don't support that currently.
1123 success
= intel_sdvo_create_preferred_input_timing(output
, clock
,
1126 struct intel_sdvo_dtd
*input_dtd
;
1128 intel_sdvo_get_preferred_input_timing(output
, &input_dtd
);
1129 intel_sdvo_set_input_timing(output
, &input_dtd
);
1132 intel_sdvo_set_input_timing(output
, &input_dtd
);
1135 switch (intel_sdvo_get_pixel_multiplier(mode
)) {
1137 intel_sdvo_set_clock_rate_mult(output
,
1138 SDVO_CLOCK_RATE_MULT_1X
);
1141 intel_sdvo_set_clock_rate_mult(output
,
1142 SDVO_CLOCK_RATE_MULT_2X
);
1145 intel_sdvo_set_clock_rate_mult(output
,
1146 SDVO_CLOCK_RATE_MULT_4X
);
1150 /* Set the SDVO control regs. */
1151 if (IS_I965G(dev
)) {
1152 sdvox
|= SDVO_BORDER_ENABLE
|
1153 SDVO_VSYNC_ACTIVE_HIGH
|
1154 SDVO_HSYNC_ACTIVE_HIGH
;
1156 sdvox
|= I915_READ(sdvo_priv
->output_device
);
1157 switch (sdvo_priv
->output_device
) {
1159 sdvox
&= SDVOB_PRESERVE_MASK
;
1162 sdvox
&= SDVOC_PRESERVE_MASK
;
1165 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1167 if (intel_crtc
->pipe
== 1)
1168 sdvox
|= SDVO_PIPE_B_SELECT
;
1170 sdvo_pixel_multiply
= intel_sdvo_get_pixel_multiplier(mode
);
1171 if (IS_I965G(dev
)) {
1172 /* done in crtc_mode_set as the dpll_md reg must be written early */
1173 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1174 /* done in crtc_mode_set as it lives inside the dpll register */
1176 sdvox
|= (sdvo_pixel_multiply
- 1) << SDVO_PORT_MULTIPLY_SHIFT
;
1179 if (sdvo_priv
->sdvo_flags
& SDVO_NEED_TO_STALL
)
1180 sdvox
|= SDVO_STALL_SELECT
;
1181 intel_sdvo_write_sdvox(output
, sdvox
);
1184 static void intel_sdvo_dpms(struct drm_encoder
*encoder
, int mode
)
1186 struct drm_device
*dev
= encoder
->dev
;
1187 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1188 struct intel_output
*intel_output
= enc_to_intel_output(encoder
);
1189 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1192 if (mode
!= DRM_MODE_DPMS_ON
) {
1193 intel_sdvo_set_active_outputs(intel_output
, 0);
1195 intel_sdvo_set_encoder_power_state(intel_output
, mode
);
1197 if (mode
== DRM_MODE_DPMS_OFF
) {
1198 temp
= I915_READ(sdvo_priv
->output_device
);
1199 if ((temp
& SDVO_ENABLE
) != 0) {
1200 intel_sdvo_write_sdvox(intel_output
, temp
& ~SDVO_ENABLE
);
1204 bool input1
, input2
;
1208 temp
= I915_READ(sdvo_priv
->output_device
);
1209 if ((temp
& SDVO_ENABLE
) == 0)
1210 intel_sdvo_write_sdvox(intel_output
, temp
| SDVO_ENABLE
);
1211 for (i
= 0; i
< 2; i
++)
1212 intel_wait_for_vblank(dev
);
1214 status
= intel_sdvo_get_trained_inputs(intel_output
, &input1
,
1218 /* Warn if the device reported failure to sync.
1219 * A lot of SDVO devices fail to notify of sync, but it's
1220 * a given it the status is a success, we succeeded.
1222 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1223 DRM_DEBUG("First %s output reported failure to sync\n",
1224 SDVO_NAME(sdvo_priv
));
1228 intel_sdvo_set_encoder_power_state(intel_output
, mode
);
1229 intel_sdvo_set_active_outputs(intel_output
, sdvo_priv
->controlled_output
);
1234 static void intel_sdvo_save(struct drm_connector
*connector
)
1236 struct drm_device
*dev
= connector
->dev
;
1237 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1238 struct intel_output
*intel_output
= to_intel_output(connector
);
1239 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1242 sdvo_priv
->save_sdvo_mult
= intel_sdvo_get_clock_rate_mult(intel_output
);
1243 intel_sdvo_get_active_outputs(intel_output
, &sdvo_priv
->save_active_outputs
);
1245 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) {
1246 intel_sdvo_set_target_input(intel_output
, true, false);
1247 intel_sdvo_get_input_timing(intel_output
,
1248 &sdvo_priv
->save_input_dtd_1
);
1251 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) {
1252 intel_sdvo_set_target_input(intel_output
, false, true);
1253 intel_sdvo_get_input_timing(intel_output
,
1254 &sdvo_priv
->save_input_dtd_2
);
1257 for (o
= SDVO_OUTPUT_FIRST
; o
<= SDVO_OUTPUT_LAST
; o
++)
1259 u16 this_output
= (1 << o
);
1260 if (sdvo_priv
->caps
.output_flags
& this_output
)
1262 intel_sdvo_set_target_output(intel_output
, this_output
);
1263 intel_sdvo_get_output_timing(intel_output
,
1264 &sdvo_priv
->save_output_dtd
[o
]);
1267 if (sdvo_priv
->is_tv
) {
1268 /* XXX: Save TV format/enhancements. */
1271 sdvo_priv
->save_SDVOX
= I915_READ(sdvo_priv
->output_device
);
1274 static void intel_sdvo_restore(struct drm_connector
*connector
)
1276 struct drm_device
*dev
= connector
->dev
;
1277 struct intel_output
*intel_output
= to_intel_output(connector
);
1278 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1281 bool input1
, input2
;
1284 intel_sdvo_set_active_outputs(intel_output
, 0);
1286 for (o
= SDVO_OUTPUT_FIRST
; o
<= SDVO_OUTPUT_LAST
; o
++)
1288 u16 this_output
= (1 << o
);
1289 if (sdvo_priv
->caps
.output_flags
& this_output
) {
1290 intel_sdvo_set_target_output(intel_output
, this_output
);
1291 intel_sdvo_set_output_timing(intel_output
, &sdvo_priv
->save_output_dtd
[o
]);
1295 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) {
1296 intel_sdvo_set_target_input(intel_output
, true, false);
1297 intel_sdvo_set_input_timing(intel_output
, &sdvo_priv
->save_input_dtd_1
);
1300 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) {
1301 intel_sdvo_set_target_input(intel_output
, false, true);
1302 intel_sdvo_set_input_timing(intel_output
, &sdvo_priv
->save_input_dtd_2
);
1305 intel_sdvo_set_clock_rate_mult(intel_output
, sdvo_priv
->save_sdvo_mult
);
1307 if (sdvo_priv
->is_tv
) {
1308 /* XXX: Restore TV format/enhancements. */
1311 intel_sdvo_write_sdvox(intel_output
, sdvo_priv
->save_SDVOX
);
1313 if (sdvo_priv
->save_SDVOX
& SDVO_ENABLE
)
1315 for (i
= 0; i
< 2; i
++)
1316 intel_wait_for_vblank(dev
);
1317 status
= intel_sdvo_get_trained_inputs(intel_output
, &input1
, &input2
);
1318 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
)
1319 DRM_DEBUG("First %s output reported failure to sync\n",
1320 SDVO_NAME(sdvo_priv
));
1323 intel_sdvo_set_active_outputs(intel_output
, sdvo_priv
->save_active_outputs
);
1326 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1327 struct drm_display_mode
*mode
)
1329 struct intel_output
*intel_output
= to_intel_output(connector
);
1330 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1332 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1333 return MODE_NO_DBLESCAN
;
1335 if (sdvo_priv
->pixel_clock_min
> mode
->clock
)
1336 return MODE_CLOCK_LOW
;
1338 if (sdvo_priv
->pixel_clock_max
< mode
->clock
)
1339 return MODE_CLOCK_HIGH
;
1341 if (sdvo_priv
->is_lvds
== true) {
1342 if (sdvo_priv
->sdvo_lvds_fixed_mode
== NULL
)
1345 if (mode
->hdisplay
> sdvo_priv
->sdvo_lvds_fixed_mode
->hdisplay
)
1348 if (mode
->vdisplay
> sdvo_priv
->sdvo_lvds_fixed_mode
->vdisplay
)
1355 static bool intel_sdvo_get_capabilities(struct intel_output
*intel_output
, struct intel_sdvo_caps
*caps
)
1359 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_DEVICE_CAPS
, NULL
, 0);
1360 status
= intel_sdvo_read_response(intel_output
, caps
, sizeof(*caps
));
1361 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1367 struct drm_connector
* intel_sdvo_find(struct drm_device
*dev
, int sdvoB
)
1369 struct drm_connector
*connector
= NULL
;
1370 struct intel_output
*iout
= NULL
;
1371 struct intel_sdvo_priv
*sdvo
;
1373 /* find the sdvo connector */
1374 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1375 iout
= to_intel_output(connector
);
1377 if (iout
->type
!= INTEL_OUTPUT_SDVO
)
1380 sdvo
= iout
->dev_priv
;
1382 if (sdvo
->output_device
== SDVOB
&& sdvoB
)
1385 if (sdvo
->output_device
== SDVOC
&& !sdvoB
)
1393 int intel_sdvo_supports_hotplug(struct drm_connector
*connector
)
1397 struct intel_output
*intel_output
;
1403 intel_output
= to_intel_output(connector
);
1405 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1406 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1408 if (response
[0] !=0)
1414 void intel_sdvo_set_hotplug(struct drm_connector
*connector
, int on
)
1418 struct intel_output
*intel_output
= to_intel_output(connector
);
1420 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1421 intel_sdvo_read_response(intel_output
, &response
, 2);
1424 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1425 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1427 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1431 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1434 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1435 intel_sdvo_read_response(intel_output
, &response
, 2);
1439 intel_sdvo_hdmi_sink_detect(struct drm_connector
*connector
)
1441 struct intel_output
*intel_output
= to_intel_output(connector
);
1442 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1443 struct edid
*edid
= NULL
;
1445 edid
= drm_get_edid(&intel_output
->base
,
1446 intel_output
->ddc_bus
);
1448 sdvo_priv
->is_hdmi
= drm_detect_hdmi_monitor(edid
);
1450 intel_output
->base
.display_info
.raw_edid
= NULL
;
1454 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector
*connector
)
1458 struct intel_output
*intel_output
= to_intel_output(connector
);
1460 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ATTACHED_DISPLAYS
, NULL
, 0);
1461 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1463 DRM_DEBUG("SDVO response %d %d\n", response
[0], response
[1]);
1465 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1466 return connector_status_unknown
;
1468 if ((response
[0] != 0) || (response
[1] != 0)) {
1469 intel_sdvo_hdmi_sink_detect(connector
);
1470 return connector_status_connected
;
1472 return connector_status_disconnected
;
1475 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1477 struct intel_output
*intel_output
= to_intel_output(connector
);
1479 /* set the bus switch and get the modes */
1480 intel_ddc_get_modes(intel_output
);
1483 struct drm_device
*dev
= encoder
->dev
;
1484 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1485 /* Mac mini hack. On this device, I get DDC through the analog, which
1486 * load-detects as disconnected. I fail to DDC through the SDVO DDC,
1487 * but it does load-detect as connected. So, just steal the DDC bits
1488 * from analog when we fail at finding it the right way.
1490 crt
= xf86_config
->output
[0];
1491 intel_output
= crt
->driver_private
;
1492 if (intel_output
->type
== I830_OUTPUT_ANALOG
&&
1493 crt
->funcs
->detect(crt
) == XF86OutputStatusDisconnected
) {
1494 I830I2CInit(pScrn
, &intel_output
->pDDCBus
, GPIOA
, "CRTDDC_A");
1495 edid_mon
= xf86OutputGetEDID(crt
, intel_output
->pDDCBus
);
1496 xf86DestroyI2CBusRec(intel_output
->pDDCBus
, true, true);
1499 xf86OutputSetEDID(output
, edid_mon
);
1500 modes
= xf86OutputGetEDIDModes(output
);
1506 * This function checks the current TV format, and chooses a default if
1507 * it hasn't been set.
1510 intel_sdvo_check_tv_format(struct intel_output
*output
)
1512 struct intel_sdvo_priv
*dev_priv
= output
->dev_priv
;
1513 struct intel_sdvo_tv_format format
;
1516 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_TV_FORMAT
, NULL
, 0);
1517 status
= intel_sdvo_read_response(output
, &format
, sizeof(format
));
1518 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1521 memcpy(&dev_priv
->tv_format
, &format
, sizeof(format
));
1525 * Set of SDVO TV modes.
1526 * Note! This is in reply order (see loop in get_tv_modes).
1527 * XXX: all 60Hz refresh?
1529 struct drm_display_mode sdvo_tv_modes
[] = {
1530 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1531 416, 0, 200, 201, 232, 233, 0,
1532 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1533 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1534 416, 0, 240, 241, 272, 273, 0,
1535 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1536 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1537 496, 0, 300, 301, 332, 333, 0,
1538 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1539 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1540 736, 0, 350, 351, 382, 383, 0,
1541 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1542 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1543 736, 0, 400, 401, 432, 433, 0,
1544 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1545 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1546 736, 0, 480, 481, 512, 513, 0,
1547 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1548 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1549 800, 0, 480, 481, 512, 513, 0,
1550 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1551 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1552 800, 0, 576, 577, 608, 609, 0,
1553 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1554 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1555 816, 0, 350, 351, 382, 383, 0,
1556 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1557 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1558 816, 0, 400, 401, 432, 433, 0,
1559 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1560 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1561 816, 0, 480, 481, 512, 513, 0,
1562 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1563 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1564 816, 0, 540, 541, 572, 573, 0,
1565 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1566 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1567 816, 0, 576, 577, 608, 609, 0,
1568 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1569 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1570 864, 0, 576, 577, 608, 609, 0,
1571 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1572 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1573 896, 0, 600, 601, 632, 633, 0,
1574 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1575 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1576 928, 0, 624, 625, 656, 657, 0,
1577 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1578 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1579 1016, 0, 766, 767, 798, 799, 0,
1580 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1581 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1582 1120, 0, 768, 769, 800, 801, 0,
1583 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1584 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1585 1376, 0, 1024, 1025, 1056, 1057, 0,
1586 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1589 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1591 struct intel_output
*output
= to_intel_output(connector
);
1592 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1593 struct intel_sdvo_sdtv_resolution_request tv_res
;
1598 intel_sdvo_check_tv_format(output
);
1600 /* Read the list of supported input resolutions for the selected TV
1603 memset(&tv_res
, 0, sizeof(tv_res
));
1604 memcpy(&tv_res
, &sdvo_priv
->tv_format
, sizeof(tv_res
));
1605 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1606 &tv_res
, sizeof(tv_res
));
1607 status
= intel_sdvo_read_response(output
, &reply
, 3);
1608 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1611 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1612 if (reply
& (1 << i
)) {
1613 struct drm_display_mode
*nmode
;
1614 nmode
= drm_mode_duplicate(connector
->dev
,
1617 drm_mode_probed_add(connector
, nmode
);
1621 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1623 struct intel_output
*intel_output
= to_intel_output(connector
);
1624 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1625 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1626 struct drm_display_mode
*newmode
;
1629 * Attempt to get the mode list from DDC.
1630 * Assume that the preferred modes are
1631 * arranged in priority order.
1633 intel_ddc_get_modes(intel_output
);
1634 if (list_empty(&connector
->probed_modes
) == false)
1637 /* Fetch modes from VBT */
1638 if (dev_priv
->sdvo_lvds_vbt_mode
!= NULL
) {
1639 newmode
= drm_mode_duplicate(connector
->dev
,
1640 dev_priv
->sdvo_lvds_vbt_mode
);
1641 if (newmode
!= NULL
) {
1642 /* Guarantee the mode is preferred */
1643 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1644 DRM_MODE_TYPE_DRIVER
);
1645 drm_mode_probed_add(connector
, newmode
);
1650 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1651 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1652 sdvo_priv
->sdvo_lvds_fixed_mode
=
1653 drm_mode_duplicate(connector
->dev
, newmode
);
1660 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1662 struct intel_output
*output
= to_intel_output(connector
);
1663 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1665 if (sdvo_priv
->is_tv
)
1666 intel_sdvo_get_tv_modes(connector
);
1667 else if (sdvo_priv
->is_lvds
== true)
1668 intel_sdvo_get_lvds_modes(connector
);
1670 intel_sdvo_get_ddc_modes(connector
);
1672 if (list_empty(&connector
->probed_modes
))
1677 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1679 struct intel_output
*intel_output
= to_intel_output(connector
);
1680 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1682 if (intel_output
->i2c_bus
)
1683 intel_i2c_destroy(intel_output
->i2c_bus
);
1684 if (intel_output
->ddc_bus
)
1685 intel_i2c_destroy(intel_output
->ddc_bus
);
1687 if (sdvo_priv
->sdvo_lvds_fixed_mode
!= NULL
)
1688 drm_mode_destroy(connector
->dev
,
1689 sdvo_priv
->sdvo_lvds_fixed_mode
);
1691 drm_sysfs_connector_remove(connector
);
1692 drm_connector_cleanup(connector
);
1694 kfree(intel_output
);
1697 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs
= {
1698 .dpms
= intel_sdvo_dpms
,
1699 .mode_fixup
= intel_sdvo_mode_fixup
,
1700 .prepare
= intel_encoder_prepare
,
1701 .mode_set
= intel_sdvo_mode_set
,
1702 .commit
= intel_encoder_commit
,
1705 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
1706 .dpms
= drm_helper_connector_dpms
,
1707 .save
= intel_sdvo_save
,
1708 .restore
= intel_sdvo_restore
,
1709 .detect
= intel_sdvo_detect
,
1710 .fill_modes
= drm_helper_probe_single_connector_modes
,
1711 .destroy
= intel_sdvo_destroy
,
1714 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
1715 .get_modes
= intel_sdvo_get_modes
,
1716 .mode_valid
= intel_sdvo_mode_valid
,
1717 .best_encoder
= intel_best_encoder
,
1720 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
1722 drm_encoder_cleanup(encoder
);
1725 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
1726 .destroy
= intel_sdvo_enc_destroy
,
1731 * Choose the appropriate DDC bus for control bus switch command for this
1732 * SDVO output based on the controlled output.
1734 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1735 * outputs, then LVDS outputs.
1738 intel_sdvo_select_ddc_bus(struct intel_sdvo_priv
*dev_priv
)
1741 unsigned int num_bits
;
1743 /* Make a mask of outputs less than or equal to our own priority in the
1746 switch (dev_priv
->controlled_output
) {
1747 case SDVO_OUTPUT_LVDS1
:
1748 mask
|= SDVO_OUTPUT_LVDS1
;
1749 case SDVO_OUTPUT_LVDS0
:
1750 mask
|= SDVO_OUTPUT_LVDS0
;
1751 case SDVO_OUTPUT_TMDS1
:
1752 mask
|= SDVO_OUTPUT_TMDS1
;
1753 case SDVO_OUTPUT_TMDS0
:
1754 mask
|= SDVO_OUTPUT_TMDS0
;
1755 case SDVO_OUTPUT_RGB1
:
1756 mask
|= SDVO_OUTPUT_RGB1
;
1757 case SDVO_OUTPUT_RGB0
:
1758 mask
|= SDVO_OUTPUT_RGB0
;
1762 /* Count bits to find what number we are in the priority list. */
1763 mask
&= dev_priv
->caps
.output_flags
;
1764 num_bits
= hweight16(mask
);
1766 /* if more than 3 outputs, default to DDC bus 3 for now */
1770 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1771 dev_priv
->ddc_bus
= 1 << num_bits
;
1775 intel_sdvo_get_digital_encoding_mode(struct intel_output
*output
)
1777 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1780 intel_sdvo_set_target_output(output
, sdvo_priv
->controlled_output
);
1782 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_ENCODE
, NULL
, 0);
1783 status
= intel_sdvo_read_response(output
, &sdvo_priv
->is_hdmi
, 1);
1784 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1789 static struct intel_output
*
1790 intel_sdvo_chan_to_intel_output(struct intel_i2c_chan
*chan
)
1792 struct drm_device
*dev
= chan
->drm_dev
;
1793 struct drm_connector
*connector
;
1794 struct intel_output
*intel_output
= NULL
;
1796 list_for_each_entry(connector
,
1797 &dev
->mode_config
.connector_list
, head
) {
1798 if (to_intel_output(connector
)->ddc_bus
== &chan
->adapter
) {
1799 intel_output
= to_intel_output(connector
);
1803 return intel_output
;
1806 static int intel_sdvo_master_xfer(struct i2c_adapter
*i2c_adap
,
1807 struct i2c_msg msgs
[], int num
)
1809 struct intel_output
*intel_output
;
1810 struct intel_sdvo_priv
*sdvo_priv
;
1811 struct i2c_algo_bit_data
*algo_data
;
1812 const struct i2c_algorithm
*algo
;
1814 algo_data
= (struct i2c_algo_bit_data
*)i2c_adap
->algo_data
;
1816 intel_sdvo_chan_to_intel_output(
1817 (struct intel_i2c_chan
*)(algo_data
->data
));
1818 if (intel_output
== NULL
)
1821 sdvo_priv
= intel_output
->dev_priv
;
1822 algo
= intel_output
->i2c_bus
->algo
;
1824 intel_sdvo_set_control_bus_switch(intel_output
, sdvo_priv
->ddc_bus
);
1825 return algo
->master_xfer(i2c_adap
, msgs
, num
);
1828 static struct i2c_algorithm intel_sdvo_i2c_bit_algo
= {
1829 .master_xfer
= intel_sdvo_master_xfer
,
1833 intel_sdvo_get_slave_addr(struct drm_device
*dev
, int output_device
)
1835 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1836 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
1838 if (output_device
== SDVOB
) {
1839 my_mapping
= &dev_priv
->sdvo_mappings
[0];
1840 other_mapping
= &dev_priv
->sdvo_mappings
[1];
1842 my_mapping
= &dev_priv
->sdvo_mappings
[1];
1843 other_mapping
= &dev_priv
->sdvo_mappings
[0];
1846 /* If the BIOS described our SDVO device, take advantage of it. */
1847 if (my_mapping
->slave_addr
)
1848 return my_mapping
->slave_addr
;
1850 /* If the BIOS only described a different SDVO device, use the
1851 * address that it isn't using.
1853 if (other_mapping
->slave_addr
) {
1854 if (other_mapping
->slave_addr
== 0x70)
1860 /* No SDVO device info is found for another DVO port,
1861 * so use mapping assumption we had before BIOS parsing.
1863 if (output_device
== SDVOB
)
1869 bool intel_sdvo_init(struct drm_device
*dev
, int output_device
)
1871 struct drm_connector
*connector
;
1872 struct intel_output
*intel_output
;
1873 struct intel_sdvo_priv
*sdvo_priv
;
1880 intel_output
= kcalloc(sizeof(struct intel_output
)+sizeof(struct intel_sdvo_priv
), 1, GFP_KERNEL
);
1881 if (!intel_output
) {
1885 sdvo_priv
= (struct intel_sdvo_priv
*)(intel_output
+ 1);
1886 sdvo_priv
->output_device
= output_device
;
1888 intel_output
->dev_priv
= sdvo_priv
;
1889 intel_output
->type
= INTEL_OUTPUT_SDVO
;
1891 /* setup the DDC bus. */
1892 if (output_device
== SDVOB
)
1893 intel_output
->i2c_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOCTRL_E for SDVOB");
1895 intel_output
->i2c_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOCTRL_E for SDVOC");
1897 if (!intel_output
->i2c_bus
)
1898 goto err_inteloutput
;
1900 sdvo_priv
->slave_addr
= intel_sdvo_get_slave_addr(dev
, output_device
);
1902 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
1903 intel_sdvo_i2c_bit_algo
.functionality
= intel_output
->i2c_bus
->algo
->functionality
;
1905 /* Read the regs to test if we can talk to the device */
1906 for (i
= 0; i
< 0x40; i
++) {
1907 if (!intel_sdvo_read_byte(intel_output
, i
, &ch
[i
])) {
1908 DRM_DEBUG_KMS(I915_SDVO
,
1909 "No SDVO device found on SDVO%c\n",
1910 output_device
== SDVOB
? 'B' : 'C');
1915 /* setup the DDC bus. */
1916 if (output_device
== SDVOB
)
1917 intel_output
->ddc_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOB DDC BUS");
1919 intel_output
->ddc_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOC DDC BUS");
1921 if (intel_output
->ddc_bus
== NULL
)
1924 /* Wrap with our custom algo which switches to DDC mode */
1925 intel_output
->ddc_bus
->algo
= &intel_sdvo_i2c_bit_algo
;
1927 /* In defaut case sdvo lvds is false */
1928 sdvo_priv
->is_lvds
= false;
1929 intel_sdvo_get_capabilities(intel_output
, &sdvo_priv
->caps
);
1931 if (sdvo_priv
->caps
.output_flags
&
1932 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
)) {
1933 if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_TMDS0
)
1934 sdvo_priv
->controlled_output
= SDVO_OUTPUT_TMDS0
;
1936 sdvo_priv
->controlled_output
= SDVO_OUTPUT_TMDS1
;
1938 encoder_type
= DRM_MODE_ENCODER_TMDS
;
1939 connector_type
= DRM_MODE_CONNECTOR_DVID
;
1941 if (intel_sdvo_get_supp_encode(intel_output
,
1942 &sdvo_priv
->encode
) &&
1943 intel_sdvo_get_digital_encoding_mode(intel_output
) &&
1944 sdvo_priv
->is_hdmi
) {
1945 /* enable hdmi encoding mode if supported */
1946 intel_sdvo_set_encode(intel_output
, SDVO_ENCODE_HDMI
);
1947 intel_sdvo_set_colorimetry(intel_output
,
1948 SDVO_COLORIMETRY_RGB256
);
1949 connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
1952 else if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_SVID0
)
1954 sdvo_priv
->controlled_output
= SDVO_OUTPUT_SVID0
;
1955 encoder_type
= DRM_MODE_ENCODER_TVDAC
;
1956 connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
1957 sdvo_priv
->is_tv
= true;
1958 intel_output
->needs_tv_clock
= true;
1960 else if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_RGB0
)
1962 sdvo_priv
->controlled_output
= SDVO_OUTPUT_RGB0
;
1963 encoder_type
= DRM_MODE_ENCODER_DAC
;
1964 connector_type
= DRM_MODE_CONNECTOR_VGA
;
1966 else if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_RGB1
)
1968 sdvo_priv
->controlled_output
= SDVO_OUTPUT_RGB1
;
1969 encoder_type
= DRM_MODE_ENCODER_DAC
;
1970 connector_type
= DRM_MODE_CONNECTOR_VGA
;
1972 else if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_LVDS0
)
1974 sdvo_priv
->controlled_output
= SDVO_OUTPUT_LVDS0
;
1975 encoder_type
= DRM_MODE_ENCODER_LVDS
;
1976 connector_type
= DRM_MODE_CONNECTOR_LVDS
;
1977 sdvo_priv
->is_lvds
= true;
1979 else if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_LVDS1
)
1981 sdvo_priv
->controlled_output
= SDVO_OUTPUT_LVDS1
;
1982 encoder_type
= DRM_MODE_ENCODER_LVDS
;
1983 connector_type
= DRM_MODE_CONNECTOR_LVDS
;
1984 sdvo_priv
->is_lvds
= true;
1988 unsigned char bytes
[2];
1990 sdvo_priv
->controlled_output
= 0;
1991 memcpy (bytes
, &sdvo_priv
->caps
.output_flags
, 2);
1992 DRM_DEBUG_KMS(I915_SDVO
,
1993 "%s: Unknown SDVO output type (0x%02x%02x)\n",
1994 SDVO_NAME(sdvo_priv
),
1995 bytes
[0], bytes
[1]);
1996 encoder_type
= DRM_MODE_ENCODER_NONE
;
1997 connector_type
= DRM_MODE_CONNECTOR_Unknown
;
2001 connector
= &intel_output
->base
;
2002 drm_connector_init(dev
, connector
, &intel_sdvo_connector_funcs
,
2004 drm_connector_helper_add(connector
, &intel_sdvo_connector_helper_funcs
);
2005 connector
->interlace_allowed
= 0;
2006 connector
->doublescan_allowed
= 0;
2007 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2009 drm_encoder_init(dev
, &intel_output
->enc
, &intel_sdvo_enc_funcs
, encoder_type
);
2010 drm_encoder_helper_add(&intel_output
->enc
, &intel_sdvo_helper_funcs
);
2012 drm_mode_connector_attach_encoder(&intel_output
->base
, &intel_output
->enc
);
2013 drm_sysfs_connector_add(connector
);
2015 intel_sdvo_select_ddc_bus(sdvo_priv
);
2017 /* Set the input timing to the screen. Assume always input 0. */
2018 intel_sdvo_set_target_input(intel_output
, true, false);
2020 intel_sdvo_get_input_pixel_clock_range(intel_output
,
2021 &sdvo_priv
->pixel_clock_min
,
2022 &sdvo_priv
->pixel_clock_max
);
2025 DRM_DEBUG_KMS(I915_SDVO
, "%s device VID/DID: %02X:%02X.%02X, "
2026 "clock range %dMHz - %dMHz, "
2027 "input 1: %c, input 2: %c, "
2028 "output 1: %c, output 2: %c\n",
2029 SDVO_NAME(sdvo_priv
),
2030 sdvo_priv
->caps
.vendor_id
, sdvo_priv
->caps
.device_id
,
2031 sdvo_priv
->caps
.device_rev_id
,
2032 sdvo_priv
->pixel_clock_min
/ 1000,
2033 sdvo_priv
->pixel_clock_max
/ 1000,
2034 (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2035 (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2036 /* check currently supported outputs */
2037 sdvo_priv
->caps
.output_flags
&
2038 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2039 sdvo_priv
->caps
.output_flags
&
2040 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2045 if (intel_output
->ddc_bus
!= NULL
)
2046 intel_i2c_destroy(intel_output
->ddc_bus
);
2047 if (intel_output
->i2c_bus
!= NULL
)
2048 intel_i2c_destroy(intel_output
->i2c_bus
);
2050 kfree(intel_output
);