2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char *tv_format_names
[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
69 struct intel_encoder base
;
71 struct i2c_adapter
*i2c
;
74 struct i2c_adapter ddc
;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output
;
83 * Capabilities of the SDVO device returned by
84 * intel_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps
;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min
, pixel_clock_max
;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output
;
98 * Hotplug activation bits for this device
100 uint16_t hotplug_active
;
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
106 uint32_t color_range
;
107 bool color_range_auto
;
110 * This is set if we're going to treat the device as TV-out.
112 * While we have these nice friendly flags for output types that ought
113 * to decide this for us, the S-Video output on our HDMI+S-Video card
114 * shows up as RGB1 (VGA).
118 /* On different gens SDVOB is at different places. */
121 /* This is for current tv format name */
125 * This is set if we treat the device as HDMI, instead of DVI.
128 bool has_hdmi_monitor
;
130 bool rgb_quant_range_selectable
;
133 * This is set if we detect output of sdvo device as LVDS and
134 * have a valid fixed mode to use with the panel.
139 * This is sdvo fixed pannel mode pointer
141 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
143 /* DDC bus used by this SDVO encoder */
147 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
149 uint8_t dtd_sdvo_flags
;
152 struct intel_sdvo_connector
{
153 struct intel_connector base
;
155 /* Mark the type of connector */
156 uint16_t output_flag
;
158 enum hdmi_force_audio force_audio
;
160 /* This contains all current supported TV format */
161 u8 tv_format_supported
[TV_FORMAT_NUM
];
162 int format_supported_num
;
163 struct drm_property
*tv_format
;
165 /* add the property for the SDVO-TV */
166 struct drm_property
*left
;
167 struct drm_property
*right
;
168 struct drm_property
*top
;
169 struct drm_property
*bottom
;
170 struct drm_property
*hpos
;
171 struct drm_property
*vpos
;
172 struct drm_property
*contrast
;
173 struct drm_property
*saturation
;
174 struct drm_property
*hue
;
175 struct drm_property
*sharpness
;
176 struct drm_property
*flicker_filter
;
177 struct drm_property
*flicker_filter_adaptive
;
178 struct drm_property
*flicker_filter_2d
;
179 struct drm_property
*tv_chroma_filter
;
180 struct drm_property
*tv_luma_filter
;
181 struct drm_property
*dot_crawl
;
183 /* add the property for the SDVO-TV/LVDS */
184 struct drm_property
*brightness
;
186 /* Add variable to record current setting for the above property */
187 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
189 /* this is to get the range of margin.*/
190 u32 max_hscan
, max_vscan
;
191 u32 max_hpos
, cur_hpos
;
192 u32 max_vpos
, cur_vpos
;
193 u32 cur_brightness
, max_brightness
;
194 u32 cur_contrast
, max_contrast
;
195 u32 cur_saturation
, max_saturation
;
196 u32 cur_hue
, max_hue
;
197 u32 cur_sharpness
, max_sharpness
;
198 u32 cur_flicker_filter
, max_flicker_filter
;
199 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
200 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
201 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
202 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
203 u32 cur_dot_crawl
, max_dot_crawl
;
206 static struct intel_sdvo
*to_sdvo(struct intel_encoder
*encoder
)
208 return container_of(encoder
, struct intel_sdvo
, base
);
211 static struct intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
213 return to_sdvo(intel_attached_encoder(connector
));
216 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
218 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
222 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
224 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
225 struct intel_sdvo_connector
*intel_sdvo_connector
,
228 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
229 struct intel_sdvo_connector
*intel_sdvo_connector
);
232 * Writes the SDVOB or SDVOC with the given value, but always writes both
233 * SDVOB and SDVOC to work around apparent hardware issues (according to
234 * comments in the BIOS).
236 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
238 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
239 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
240 u32 bval
= val
, cval
= val
;
243 if (intel_sdvo
->sdvo_reg
== PCH_SDVOB
) {
244 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
245 I915_READ(intel_sdvo
->sdvo_reg
);
249 if (intel_sdvo
->sdvo_reg
== GEN3_SDVOB
)
250 cval
= I915_READ(GEN3_SDVOC
);
252 bval
= I915_READ(GEN3_SDVOB
);
255 * Write the registers twice for luck. Sometimes,
256 * writing them only once doesn't appear to 'stick'.
257 * The BIOS does this too. Yay, magic
259 for (i
= 0; i
< 2; i
++)
261 I915_WRITE(GEN3_SDVOB
, bval
);
262 I915_READ(GEN3_SDVOB
);
263 I915_WRITE(GEN3_SDVOC
, cval
);
264 I915_READ(GEN3_SDVOC
);
268 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
270 struct i2c_msg msgs
[] = {
272 .addr
= intel_sdvo
->slave_addr
,
278 .addr
= intel_sdvo
->slave_addr
,
286 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
293 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294 /** Mapping of command numbers to names, for debug output */
295 static const struct _sdvo_cmd_name
{
298 } sdvo_cmd_names
[] = {
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
343 /* Add the op code for SDVO enhancements */
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
412 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
414 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
415 const void *args
, int args_len
)
419 char buffer
[BUF_LEN
];
421 #define BUF_PRINT(args...) \
422 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
425 for (i
= 0; i
< args_len
; i
++) {
426 BUF_PRINT("%02X ", ((u8
*)args
)[i
]);
431 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
432 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
433 BUF_PRINT("(%s)", sdvo_cmd_names
[i
].name
);
437 if (i
== ARRAY_SIZE(sdvo_cmd_names
)) {
438 BUF_PRINT("(%02X)", cmd
);
440 BUG_ON(pos
>= BUF_LEN
- 1);
444 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo
), cmd
, buffer
);
447 static const char *cmd_status_names
[] = {
453 "Target not specified",
454 "Scaling not supported"
457 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
458 const void *args
, int args_len
)
461 struct i2c_msg
*msgs
;
464 /* Would be simpler to allocate both in one go ? */
465 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
469 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
475 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
477 for (i
= 0; i
< args_len
; i
++) {
478 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
481 msgs
[i
].buf
= buf
+ 2 *i
;
482 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
483 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
485 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
488 msgs
[i
].buf
= buf
+ 2*i
;
489 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
492 /* the following two are to read the response */
493 status
= SDVO_I2C_CMD_STATUS
;
494 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
497 msgs
[i
+1].buf
= &status
;
499 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
500 msgs
[i
+2].flags
= I2C_M_RD
;
502 msgs
[i
+2].buf
= &status
;
504 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
506 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
511 /* failure in I2C transfer */
512 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
522 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
523 void *response
, int response_len
)
525 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
529 char buffer
[BUF_LEN
];
533 * The documentation states that all commands will be
534 * processed within 15µs, and that we need only poll
535 * the status byte a maximum of 3 times in order for the
536 * command to be complete.
538 * Check 5 times in case the hardware failed to read the docs.
540 * Also beware that the first response by many devices is to
541 * reply PENDING and stall for time. TVs are notorious for
542 * requiring longer than specified to complete their replies.
543 * Originally (in the DDX long ago), the delay was only ever 15ms
544 * with an additional delay of 30ms applied for TVs added later after
545 * many experiments. To accommodate both sets of delays, we do a
546 * sequence of slow checks if the device is falling behind and fails
547 * to reply within 5*15µs.
549 if (!intel_sdvo_read_byte(intel_sdvo
,
554 while ((status
== SDVO_CMD_STATUS_PENDING
||
555 status
== SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
) && --retry
) {
561 if (!intel_sdvo_read_byte(intel_sdvo
,
567 #define BUF_PRINT(args...) \
568 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
570 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
571 BUF_PRINT("(%s)", cmd_status_names
[status
]);
573 BUF_PRINT("(??? %d)", status
);
575 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
578 /* Read the command response */
579 for (i
= 0; i
< response_len
; i
++) {
580 if (!intel_sdvo_read_byte(intel_sdvo
,
581 SDVO_I2C_RETURN_0
+ i
,
582 &((u8
*)response
)[i
]))
584 BUF_PRINT(" %02X", ((u8
*)response
)[i
]);
586 BUG_ON(pos
>= BUF_LEN
- 1);
590 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo
), buffer
);
594 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo
));
598 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
600 if (mode
->clock
>= 100000)
602 else if (mode
->clock
>= 50000)
608 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
611 /* This must be the immediately preceding write before the i2c xfer */
612 return intel_sdvo_write_cmd(intel_sdvo
,
613 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
617 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
619 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
622 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
626 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
628 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
631 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
634 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
636 struct intel_sdvo_set_target_input_args targets
= {0};
637 return intel_sdvo_set_value(intel_sdvo
,
638 SDVO_CMD_SET_TARGET_INPUT
,
639 &targets
, sizeof(targets
));
643 * Return whether each input is trained.
645 * This function is making an assumption about the layout of the response,
646 * which should be checked against the docs.
648 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
650 struct intel_sdvo_get_trained_inputs_response response
;
652 BUILD_BUG_ON(sizeof(response
) != 1);
653 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
654 &response
, sizeof(response
)))
657 *input_1
= response
.input0_trained
;
658 *input_2
= response
.input1_trained
;
662 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
665 return intel_sdvo_set_value(intel_sdvo
,
666 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
667 &outputs
, sizeof(outputs
));
670 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
673 return intel_sdvo_get_value(intel_sdvo
,
674 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
675 outputs
, sizeof(*outputs
));
678 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
681 u8 state
= SDVO_ENCODER_STATE_ON
;
684 case DRM_MODE_DPMS_ON
:
685 state
= SDVO_ENCODER_STATE_ON
;
687 case DRM_MODE_DPMS_STANDBY
:
688 state
= SDVO_ENCODER_STATE_STANDBY
;
690 case DRM_MODE_DPMS_SUSPEND
:
691 state
= SDVO_ENCODER_STATE_SUSPEND
;
693 case DRM_MODE_DPMS_OFF
:
694 state
= SDVO_ENCODER_STATE_OFF
;
698 return intel_sdvo_set_value(intel_sdvo
,
699 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
702 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
706 struct intel_sdvo_pixel_clock_range clocks
;
708 BUILD_BUG_ON(sizeof(clocks
) != 4);
709 if (!intel_sdvo_get_value(intel_sdvo
,
710 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
711 &clocks
, sizeof(clocks
)))
714 /* Convert the values from units of 10 kHz to kHz. */
715 *clock_min
= clocks
.min
* 10;
716 *clock_max
= clocks
.max
* 10;
720 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
723 return intel_sdvo_set_value(intel_sdvo
,
724 SDVO_CMD_SET_TARGET_OUTPUT
,
725 &outputs
, sizeof(outputs
));
728 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
729 struct intel_sdvo_dtd
*dtd
)
731 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
732 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
735 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
736 struct intel_sdvo_dtd
*dtd
)
738 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
739 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
742 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
743 struct intel_sdvo_dtd
*dtd
)
745 return intel_sdvo_set_timing(intel_sdvo
,
746 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
749 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
750 struct intel_sdvo_dtd
*dtd
)
752 return intel_sdvo_set_timing(intel_sdvo
,
753 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
756 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
757 struct intel_sdvo_dtd
*dtd
)
759 return intel_sdvo_get_timing(intel_sdvo
,
760 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
764 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
769 struct intel_sdvo_preferred_input_timing_args args
;
771 memset(&args
, 0, sizeof(args
));
774 args
.height
= height
;
777 if (intel_sdvo
->is_lvds
&&
778 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
779 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
782 return intel_sdvo_set_value(intel_sdvo
,
783 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
784 &args
, sizeof(args
));
787 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
788 struct intel_sdvo_dtd
*dtd
)
790 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
791 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
792 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
793 &dtd
->part1
, sizeof(dtd
->part1
)) &&
794 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
795 &dtd
->part2
, sizeof(dtd
->part2
));
798 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
800 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
803 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
804 const struct drm_display_mode
*mode
)
806 uint16_t width
, height
;
807 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
808 uint16_t h_sync_offset
, v_sync_offset
;
811 memset(dtd
, 0, sizeof(*dtd
));
813 width
= mode
->hdisplay
;
814 height
= mode
->vdisplay
;
816 /* do some mode translations */
817 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
818 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
820 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
821 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
823 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
824 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
826 mode_clock
= mode
->clock
;
828 dtd
->part1
.clock
= mode_clock
;
830 dtd
->part1
.h_active
= width
& 0xff;
831 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
832 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
833 ((h_blank_len
>> 8) & 0xf);
834 dtd
->part1
.v_active
= height
& 0xff;
835 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
836 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
837 ((v_blank_len
>> 8) & 0xf);
839 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
840 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
841 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
843 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
844 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
845 ((v_sync_len
& 0x30) >> 4);
847 dtd
->part2
.dtd_flags
= 0x18;
848 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
849 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
850 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
851 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
852 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
853 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
855 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
858 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
*pmode
,
859 const struct intel_sdvo_dtd
*dtd
)
861 struct drm_display_mode mode
= {};
863 mode
.hdisplay
= dtd
->part1
.h_active
;
864 mode
.hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
865 mode
.hsync_start
= mode
.hdisplay
+ dtd
->part2
.h_sync_off
;
866 mode
.hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
867 mode
.hsync_end
= mode
.hsync_start
+ dtd
->part2
.h_sync_width
;
868 mode
.hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
869 mode
.htotal
= mode
.hdisplay
+ dtd
->part1
.h_blank
;
870 mode
.htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
872 mode
.vdisplay
= dtd
->part1
.v_active
;
873 mode
.vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
874 mode
.vsync_start
= mode
.vdisplay
;
875 mode
.vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
876 mode
.vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
877 mode
.vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
878 mode
.vsync_end
= mode
.vsync_start
+
879 (dtd
->part2
.v_sync_off_width
& 0xf);
880 mode
.vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
881 mode
.vtotal
= mode
.vdisplay
+ dtd
->part1
.v_blank
;
882 mode
.vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
884 mode
.clock
= dtd
->part1
.clock
* 10;
886 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
887 mode
.flags
|= DRM_MODE_FLAG_INTERLACE
;
888 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
889 mode
.flags
|= DRM_MODE_FLAG_PHSYNC
;
891 mode
.flags
|= DRM_MODE_FLAG_NHSYNC
;
892 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
893 mode
.flags
|= DRM_MODE_FLAG_PVSYNC
;
895 mode
.flags
|= DRM_MODE_FLAG_NVSYNC
;
897 drm_mode_set_crtcinfo(&mode
, 0);
899 drm_mode_copy(pmode
, &mode
);
902 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
904 struct intel_sdvo_encode encode
;
906 BUILD_BUG_ON(sizeof(encode
) != 2);
907 return intel_sdvo_get_value(intel_sdvo
,
908 SDVO_CMD_GET_SUPP_ENCODE
,
909 &encode
, sizeof(encode
));
912 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
915 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
918 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
921 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
925 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
928 uint8_t set_buf_index
[2];
934 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
936 for (i
= 0; i
<= av_split
; i
++) {
937 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
938 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
940 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
941 intel_sdvo_read_response(encoder
, &buf_size
, 1);
944 for (j
= 0; j
<= buf_size
; j
+= 8) {
945 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
947 intel_sdvo_read_response(encoder
, pos
, 8);
954 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
955 unsigned if_index
, uint8_t tx_rate
,
956 const uint8_t *data
, unsigned length
)
958 uint8_t set_buf_index
[2] = { if_index
, 0 };
959 uint8_t hbuf_size
, tmp
[8];
962 if (!intel_sdvo_set_value(intel_sdvo
,
963 SDVO_CMD_SET_HBUF_INDEX
,
967 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
971 /* Buffer size is 0 based, hooray! */
974 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
975 if_index
, length
, hbuf_size
);
977 for (i
= 0; i
< hbuf_size
; i
+= 8) {
980 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
982 if (!intel_sdvo_set_value(intel_sdvo
,
983 SDVO_CMD_SET_HBUF_DATA
,
988 return intel_sdvo_set_value(intel_sdvo
,
989 SDVO_CMD_SET_HBUF_TXRATE
,
993 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
994 const struct drm_display_mode
*adjusted_mode
)
996 uint8_t sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
997 struct drm_crtc
*crtc
= intel_sdvo
->base
.base
.crtc
;
998 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
999 union hdmi_infoframe frame
;
1003 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
1006 DRM_ERROR("couldn't fill AVI infoframe\n");
1010 if (intel_sdvo
->rgb_quant_range_selectable
) {
1011 if (intel_crtc
->config
->limited_color_range
)
1012 frame
.avi
.quantization_range
=
1013 HDMI_QUANTIZATION_RANGE_LIMITED
;
1015 frame
.avi
.quantization_range
=
1016 HDMI_QUANTIZATION_RANGE_FULL
;
1019 len
= hdmi_infoframe_pack(&frame
, sdvo_data
, sizeof(sdvo_data
));
1023 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
1025 sdvo_data
, sizeof(sdvo_data
));
1028 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
1030 struct intel_sdvo_tv_format format
;
1031 uint32_t format_map
;
1033 format_map
= 1 << intel_sdvo
->tv_format_index
;
1034 memset(&format
, 0, sizeof(format
));
1035 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1037 BUILD_BUG_ON(sizeof(format
) != 6);
1038 return intel_sdvo_set_value(intel_sdvo
,
1039 SDVO_CMD_SET_TV_FORMAT
,
1040 &format
, sizeof(format
));
1044 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1045 const struct drm_display_mode
*mode
)
1047 struct intel_sdvo_dtd output_dtd
;
1049 if (!intel_sdvo_set_target_output(intel_sdvo
,
1050 intel_sdvo
->attached_output
))
1053 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1054 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1060 /* Asks the sdvo controller for the preferred input mode given the output mode.
1061 * Unfortunately we have to set up the full output mode to do that. */
1063 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1064 const struct drm_display_mode
*mode
,
1065 struct drm_display_mode
*adjusted_mode
)
1067 struct intel_sdvo_dtd input_dtd
;
1069 /* Reset the input timing to the screen. Assume always input 0. */
1070 if (!intel_sdvo_set_target_input(intel_sdvo
))
1073 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1079 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1083 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1084 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1089 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state
*pipe_config
)
1091 unsigned dotclock
= pipe_config
->port_clock
;
1092 struct dpll
*clock
= &pipe_config
->dpll
;
1094 /* SDVO TV has fixed PLL values depend on its clock range,
1095 this mirrors vbios setting. */
1096 if (dotclock
>= 100000 && dotclock
< 140500) {
1102 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1109 WARN(1, "SDVO TV clock out of range: %i\n", dotclock
);
1112 pipe_config
->clock_set
= true;
1115 static bool intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1116 struct intel_crtc_state
*pipe_config
)
1118 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1119 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
1120 struct drm_display_mode
*mode
= &pipe_config
->base
.mode
;
1122 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1123 pipe_config
->pipe_bpp
= 8*3;
1125 if (HAS_PCH_SPLIT(encoder
->base
.dev
))
1126 pipe_config
->has_pch_encoder
= true;
1128 /* We need to construct preferred input timings based on our
1129 * output timings. To do that, we have to set the output
1130 * timings, even though this isn't really the right place in
1131 * the sequence to do it. Oh well.
1133 if (intel_sdvo
->is_tv
) {
1134 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
, mode
))
1137 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1140 pipe_config
->sdvo_tv_clock
= true;
1141 } else if (intel_sdvo
->is_lvds
) {
1142 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1143 intel_sdvo
->sdvo_lvds_fixed_mode
))
1146 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1151 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1152 * SDVO device will factor out the multiplier during mode_set.
1154 pipe_config
->pixel_multiplier
=
1155 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1157 pipe_config
->has_hdmi_sink
= intel_sdvo
->has_hdmi_monitor
;
1159 if (intel_sdvo
->color_range_auto
) {
1160 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1161 /* FIXME: This bit is only valid when using TMDS encoding and 8
1162 * bit per color mode. */
1163 if (pipe_config
->has_hdmi_sink
&&
1164 drm_match_cea_mode(adjusted_mode
) > 1)
1165 pipe_config
->limited_color_range
= true;
1167 if (pipe_config
->has_hdmi_sink
&&
1168 intel_sdvo
->color_range
== HDMI_COLOR_RANGE_16_235
)
1169 pipe_config
->limited_color_range
= true;
1172 /* Clock computation needs to happen after pixel multiplier. */
1173 if (intel_sdvo
->is_tv
)
1174 i9xx_adjust_sdvo_tv_clock(pipe_config
);
1179 static void intel_sdvo_pre_enable(struct intel_encoder
*intel_encoder
)
1181 struct drm_device
*dev
= intel_encoder
->base
.dev
;
1182 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1183 struct intel_crtc
*crtc
= to_intel_crtc(intel_encoder
->base
.crtc
);
1184 struct drm_display_mode
*adjusted_mode
=
1185 &crtc
->config
->base
.adjusted_mode
;
1186 struct drm_display_mode
*mode
= &crtc
->config
->base
.mode
;
1187 struct intel_sdvo
*intel_sdvo
= to_sdvo(intel_encoder
);
1189 struct intel_sdvo_in_out_map in_out
;
1190 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1196 /* First, set the input mapping for the first input to our controlled
1197 * output. This is only correct if we're a single-input device, in
1198 * which case the first input is the output from the appropriate SDVO
1199 * channel on the motherboard. In a two-input device, the first input
1200 * will be SDVOB and the second SDVOC.
1202 in_out
.in0
= intel_sdvo
->attached_output
;
1205 intel_sdvo_set_value(intel_sdvo
,
1206 SDVO_CMD_SET_IN_OUT_MAP
,
1207 &in_out
, sizeof(in_out
));
1209 /* Set the output timings to the screen */
1210 if (!intel_sdvo_set_target_output(intel_sdvo
,
1211 intel_sdvo
->attached_output
))
1214 /* lvds has a special fixed output timing. */
1215 if (intel_sdvo
->is_lvds
)
1216 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1217 intel_sdvo
->sdvo_lvds_fixed_mode
);
1219 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1220 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1221 DRM_INFO("Setting output timings on %s failed\n",
1222 SDVO_NAME(intel_sdvo
));
1224 /* Set the input timing to the screen. Assume always input 0. */
1225 if (!intel_sdvo_set_target_input(intel_sdvo
))
1228 if (crtc
->config
->has_hdmi_sink
) {
1229 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1230 intel_sdvo_set_colorimetry(intel_sdvo
,
1231 SDVO_COLORIMETRY_RGB256
);
1232 intel_sdvo_set_avi_infoframe(intel_sdvo
, adjusted_mode
);
1234 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1236 if (intel_sdvo
->is_tv
&&
1237 !intel_sdvo_set_tv_format(intel_sdvo
))
1240 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1242 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
)
1243 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1244 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1245 DRM_INFO("Setting input timings on %s failed\n",
1246 SDVO_NAME(intel_sdvo
));
1248 switch (crtc
->config
->pixel_multiplier
) {
1250 WARN(1, "unknown pixel mutlipler specified\n");
1251 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1252 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1253 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1255 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1258 /* Set the SDVO control regs. */
1259 if (INTEL_INFO(dev
)->gen
>= 4) {
1260 /* The real mode polarity is set by the SDVO commands, using
1261 * struct intel_sdvo_dtd. */
1262 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1263 if (!HAS_PCH_SPLIT(dev
) && crtc
->config
->limited_color_range
)
1264 sdvox
|= HDMI_COLOR_RANGE_16_235
;
1265 if (INTEL_INFO(dev
)->gen
< 5)
1266 sdvox
|= SDVO_BORDER_ENABLE
;
1268 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1269 switch (intel_sdvo
->sdvo_reg
) {
1271 sdvox
&= SDVOB_PRESERVE_MASK
;
1274 sdvox
&= SDVOC_PRESERVE_MASK
;
1277 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1280 if (INTEL_PCH_TYPE(dev
) >= PCH_CPT
)
1281 sdvox
|= SDVO_PIPE_SEL_CPT(crtc
->pipe
);
1283 sdvox
|= SDVO_PIPE_SEL(crtc
->pipe
);
1285 if (intel_sdvo
->has_hdmi_audio
)
1286 sdvox
|= SDVO_AUDIO_ENABLE
;
1288 if (INTEL_INFO(dev
)->gen
>= 4) {
1289 /* done in crtc_mode_set as the dpll_md reg must be written early */
1290 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1291 /* done in crtc_mode_set as it lives inside the dpll register */
1293 sdvox
|= (crtc
->config
->pixel_multiplier
- 1)
1294 << SDVO_PORT_MULTIPLY_SHIFT
;
1297 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1298 INTEL_INFO(dev
)->gen
< 5)
1299 sdvox
|= SDVO_STALL_SELECT
;
1300 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1303 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1305 struct intel_sdvo_connector
*intel_sdvo_connector
=
1306 to_intel_sdvo_connector(&connector
->base
);
1307 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(&connector
->base
);
1308 u16 active_outputs
= 0;
1310 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1312 if (active_outputs
& intel_sdvo_connector
->output_flag
)
1318 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1321 struct drm_device
*dev
= encoder
->base
.dev
;
1322 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1323 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1324 u16 active_outputs
= 0;
1327 tmp
= I915_READ(intel_sdvo
->sdvo_reg
);
1328 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1330 if (!(tmp
& SDVO_ENABLE
) && (active_outputs
== 0))
1333 if (HAS_PCH_CPT(dev
))
1334 *pipe
= PORT_TO_PIPE_CPT(tmp
);
1336 *pipe
= PORT_TO_PIPE(tmp
);
1341 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1342 struct intel_crtc_state
*pipe_config
)
1344 struct drm_device
*dev
= encoder
->base
.dev
;
1345 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1346 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1347 struct intel_sdvo_dtd dtd
;
1348 int encoder_pixel_multiplier
= 0;
1350 u32 flags
= 0, sdvox
;
1354 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1356 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1358 /* Some sdvo encoders are not spec compliant and don't
1359 * implement the mandatory get_timings function. */
1360 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1361 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1363 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1364 flags
|= DRM_MODE_FLAG_PHSYNC
;
1366 flags
|= DRM_MODE_FLAG_NHSYNC
;
1368 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1369 flags
|= DRM_MODE_FLAG_PVSYNC
;
1371 flags
|= DRM_MODE_FLAG_NVSYNC
;
1374 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
1377 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1378 * the sdvo port register, on all other platforms it is part of the dpll
1379 * state. Since the general pipe state readout happens before the
1380 * encoder->get_config we so already have a valid pixel multplier on all
1383 if (IS_I915G(dev
) || IS_I915GM(dev
)) {
1384 pipe_config
->pixel_multiplier
=
1385 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1386 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1389 dotclock
= pipe_config
->port_clock
;
1390 if (pipe_config
->pixel_multiplier
)
1391 dotclock
/= pipe_config
->pixel_multiplier
;
1393 if (HAS_PCH_SPLIT(dev
))
1394 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
1396 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
1398 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1399 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
,
1402 case SDVO_CLOCK_RATE_MULT_1X
:
1403 encoder_pixel_multiplier
= 1;
1405 case SDVO_CLOCK_RATE_MULT_2X
:
1406 encoder_pixel_multiplier
= 2;
1408 case SDVO_CLOCK_RATE_MULT_4X
:
1409 encoder_pixel_multiplier
= 4;
1414 if (sdvox
& HDMI_COLOR_RANGE_16_235
)
1415 pipe_config
->limited_color_range
= true;
1417 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_ENCODE
,
1419 if (val
== SDVO_ENCODE_HDMI
)
1420 pipe_config
->has_hdmi_sink
= true;
1423 WARN(encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1424 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1425 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1428 static void intel_disable_sdvo(struct intel_encoder
*encoder
)
1430 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
1431 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1434 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1436 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1439 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1440 if ((temp
& SDVO_ENABLE
) != 0) {
1441 /* HW workaround for IBX, we need to move the port to
1442 * transcoder A before disabling it. */
1443 if (HAS_PCH_IBX(encoder
->base
.dev
)) {
1444 struct drm_crtc
*crtc
= encoder
->base
.crtc
;
1445 int pipe
= crtc
? to_intel_crtc(crtc
)->pipe
: -1;
1447 if (temp
& SDVO_PIPE_B_SELECT
) {
1448 temp
&= ~SDVO_PIPE_B_SELECT
;
1449 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1450 POSTING_READ(intel_sdvo
->sdvo_reg
);
1452 /* Again we need to write this twice. */
1453 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1454 POSTING_READ(intel_sdvo
->sdvo_reg
);
1456 /* Transcoder selection bits only update
1457 * effectively on vblank. */
1459 intel_wait_for_vblank(encoder
->base
.dev
, pipe
);
1465 intel_sdvo_write_sdvox(intel_sdvo
, temp
& ~SDVO_ENABLE
);
1469 static void intel_enable_sdvo(struct intel_encoder
*encoder
)
1471 struct drm_device
*dev
= encoder
->base
.dev
;
1472 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1473 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1474 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
1476 bool input1
, input2
;
1480 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1481 if ((temp
& SDVO_ENABLE
) == 0) {
1482 /* HW workaround for IBX, we need to move the port
1483 * to transcoder A before disabling it, so restore it here. */
1484 if (HAS_PCH_IBX(dev
))
1485 temp
|= SDVO_PIPE_SEL(intel_crtc
->pipe
);
1487 intel_sdvo_write_sdvox(intel_sdvo
, temp
| SDVO_ENABLE
);
1489 for (i
= 0; i
< 2; i
++)
1490 intel_wait_for_vblank(dev
, intel_crtc
->pipe
);
1492 success
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1493 /* Warn if the device reported failure to sync.
1494 * A lot of SDVO devices fail to notify of sync, but it's
1495 * a given it the status is a success, we succeeded.
1497 if (success
&& !input1
) {
1498 DRM_DEBUG_KMS("First %s output reported failure to "
1499 "sync\n", SDVO_NAME(intel_sdvo
));
1503 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1505 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1508 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1509 static void intel_sdvo_dpms(struct drm_connector
*connector
, int mode
)
1511 struct drm_crtc
*crtc
;
1512 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1514 /* dvo supports only 2 dpms states. */
1515 if (mode
!= DRM_MODE_DPMS_ON
)
1516 mode
= DRM_MODE_DPMS_OFF
;
1518 if (mode
== connector
->dpms
)
1521 connector
->dpms
= mode
;
1523 /* Only need to change hw state when actually enabled */
1524 crtc
= intel_sdvo
->base
.base
.crtc
;
1526 intel_sdvo
->base
.connectors_active
= false;
1530 /* We set active outputs manually below in case pipe dpms doesn't change
1531 * due to cloning. */
1532 if (mode
!= DRM_MODE_DPMS_ON
) {
1533 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1535 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1537 intel_sdvo
->base
.connectors_active
= false;
1539 intel_crtc_update_dpms(crtc
);
1541 intel_sdvo
->base
.connectors_active
= true;
1543 intel_crtc_update_dpms(crtc
);
1546 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1547 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1550 intel_modeset_check_state(connector
->dev
);
1553 static enum drm_mode_status
1554 intel_sdvo_mode_valid(struct drm_connector
*connector
,
1555 struct drm_display_mode
*mode
)
1557 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1559 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1560 return MODE_NO_DBLESCAN
;
1562 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1563 return MODE_CLOCK_LOW
;
1565 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1566 return MODE_CLOCK_HIGH
;
1568 if (intel_sdvo
->is_lvds
) {
1569 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1572 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1579 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1581 BUILD_BUG_ON(sizeof(*caps
) != 8);
1582 if (!intel_sdvo_get_value(intel_sdvo
,
1583 SDVO_CMD_GET_DEVICE_CAPS
,
1584 caps
, sizeof(*caps
)))
1587 DRM_DEBUG_KMS("SDVO capabilities:\n"
1590 " device_rev_id: %d\n"
1591 " sdvo_version_major: %d\n"
1592 " sdvo_version_minor: %d\n"
1593 " sdvo_inputs_mask: %d\n"
1594 " smooth_scaling: %d\n"
1595 " sharp_scaling: %d\n"
1597 " down_scaling: %d\n"
1598 " stall_support: %d\n"
1599 " output_flags: %d\n",
1602 caps
->device_rev_id
,
1603 caps
->sdvo_version_major
,
1604 caps
->sdvo_version_minor
,
1605 caps
->sdvo_inputs_mask
,
1606 caps
->smooth_scaling
,
1607 caps
->sharp_scaling
,
1610 caps
->stall_support
,
1611 caps
->output_flags
);
1616 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
1618 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
1621 if (!I915_HAS_HOTPLUG(dev
))
1624 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1626 if (IS_I945G(dev
) || IS_I945GM(dev
))
1629 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1630 &hotplug
, sizeof(hotplug
)))
1636 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
1638 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1640 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
1641 &intel_sdvo
->hotplug_active
, 2);
1645 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1647 /* Is there more than one type of output? */
1648 return hweight16(intel_sdvo
->caps
.output_flags
) > 1;
1651 static struct edid
*
1652 intel_sdvo_get_edid(struct drm_connector
*connector
)
1654 struct intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1655 return drm_get_edid(connector
, &sdvo
->ddc
);
1658 /* Mac mini hack -- use the same DDC as the analog connector */
1659 static struct edid
*
1660 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1662 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1664 return drm_get_edid(connector
,
1665 intel_gmbus_get_adapter(dev_priv
,
1666 dev_priv
->vbt
.crt_ddc_pin
));
1669 static enum drm_connector_status
1670 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
1672 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1673 enum drm_connector_status status
;
1676 edid
= intel_sdvo_get_edid(connector
);
1678 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1679 u8 ddc
, saved_ddc
= intel_sdvo
->ddc_bus
;
1682 * Don't use the 1 as the argument of DDC bus switch to get
1683 * the EDID. It is used for SDVO SPD ROM.
1685 for (ddc
= intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1686 intel_sdvo
->ddc_bus
= ddc
;
1687 edid
= intel_sdvo_get_edid(connector
);
1692 * If we found the EDID on the other bus,
1693 * assume that is the correct DDC bus.
1696 intel_sdvo
->ddc_bus
= saved_ddc
;
1700 * When there is no edid and no monitor is connected with VGA
1701 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1704 edid
= intel_sdvo_get_analog_edid(connector
);
1706 status
= connector_status_unknown
;
1708 /* DDC bus is shared, match EDID to connector type */
1709 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1710 status
= connector_status_connected
;
1711 if (intel_sdvo
->is_hdmi
) {
1712 intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1713 intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1714 intel_sdvo
->rgb_quant_range_selectable
=
1715 drm_rgb_quant_range_selectable(edid
);
1718 status
= connector_status_disconnected
;
1722 if (status
== connector_status_connected
) {
1723 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1724 if (intel_sdvo_connector
->force_audio
!= HDMI_AUDIO_AUTO
)
1725 intel_sdvo
->has_hdmi_audio
= (intel_sdvo_connector
->force_audio
== HDMI_AUDIO_ON
);
1732 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
1735 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1736 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
1738 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1739 connector_is_digital
, monitor_is_digital
);
1740 return connector_is_digital
== monitor_is_digital
;
1743 static enum drm_connector_status
1744 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1747 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1748 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1749 enum drm_connector_status ret
;
1751 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1752 connector
->base
.id
, connector
->name
);
1754 if (!intel_sdvo_get_value(intel_sdvo
,
1755 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
1757 return connector_status_unknown
;
1759 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1760 response
& 0xff, response
>> 8,
1761 intel_sdvo_connector
->output_flag
);
1764 return connector_status_disconnected
;
1766 intel_sdvo
->attached_output
= response
;
1768 intel_sdvo
->has_hdmi_monitor
= false;
1769 intel_sdvo
->has_hdmi_audio
= false;
1770 intel_sdvo
->rgb_quant_range_selectable
= false;
1772 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1773 ret
= connector_status_disconnected
;
1774 else if (IS_TMDS(intel_sdvo_connector
))
1775 ret
= intel_sdvo_tmds_sink_detect(connector
);
1779 /* if we have an edid check it matches the connection */
1780 edid
= intel_sdvo_get_edid(connector
);
1782 edid
= intel_sdvo_get_analog_edid(connector
);
1784 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
1786 ret
= connector_status_connected
;
1788 ret
= connector_status_disconnected
;
1792 ret
= connector_status_connected
;
1795 /* May update encoder flag for like clock for SDVO TV, etc.*/
1796 if (ret
== connector_status_connected
) {
1797 intel_sdvo
->is_tv
= false;
1798 intel_sdvo
->is_lvds
= false;
1800 if (response
& SDVO_TV_MASK
)
1801 intel_sdvo
->is_tv
= true;
1802 if (response
& SDVO_LVDS_MASK
)
1803 intel_sdvo
->is_lvds
= intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1809 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1813 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1814 connector
->base
.id
, connector
->name
);
1816 /* set the bus switch and get the modes */
1817 edid
= intel_sdvo_get_edid(connector
);
1820 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1821 * link between analog and digital outputs. So, if the regular SDVO
1822 * DDC fails, check to see if the analog output is disconnected, in
1823 * which case we'll look there for the digital DDC data.
1826 edid
= intel_sdvo_get_analog_edid(connector
);
1829 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
1831 drm_mode_connector_update_edid_property(connector
, edid
);
1832 drm_add_edid_modes(connector
, edid
);
1840 * Set of SDVO TV modes.
1841 * Note! This is in reply order (see loop in get_tv_modes).
1842 * XXX: all 60Hz refresh?
1844 static const struct drm_display_mode sdvo_tv_modes
[] = {
1845 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1846 416, 0, 200, 201, 232, 233, 0,
1847 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1848 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1849 416, 0, 240, 241, 272, 273, 0,
1850 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1851 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1852 496, 0, 300, 301, 332, 333, 0,
1853 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1854 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1855 736, 0, 350, 351, 382, 383, 0,
1856 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1857 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1858 736, 0, 400, 401, 432, 433, 0,
1859 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1860 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1861 736, 0, 480, 481, 512, 513, 0,
1862 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1863 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1864 800, 0, 480, 481, 512, 513, 0,
1865 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1866 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1867 800, 0, 576, 577, 608, 609, 0,
1868 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1869 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1870 816, 0, 350, 351, 382, 383, 0,
1871 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1872 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1873 816, 0, 400, 401, 432, 433, 0,
1874 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1875 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1876 816, 0, 480, 481, 512, 513, 0,
1877 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1878 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1879 816, 0, 540, 541, 572, 573, 0,
1880 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1881 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1882 816, 0, 576, 577, 608, 609, 0,
1883 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1884 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1885 864, 0, 576, 577, 608, 609, 0,
1886 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1887 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1888 896, 0, 600, 601, 632, 633, 0,
1889 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1890 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1891 928, 0, 624, 625, 656, 657, 0,
1892 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1893 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1894 1016, 0, 766, 767, 798, 799, 0,
1895 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1896 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1897 1120, 0, 768, 769, 800, 801, 0,
1898 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1899 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1900 1376, 0, 1024, 1025, 1056, 1057, 0,
1901 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1904 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1906 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1907 struct intel_sdvo_sdtv_resolution_request tv_res
;
1908 uint32_t reply
= 0, format_map
= 0;
1911 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1912 connector
->base
.id
, connector
->name
);
1914 /* Read the list of supported input resolutions for the selected TV
1917 format_map
= 1 << intel_sdvo
->tv_format_index
;
1918 memcpy(&tv_res
, &format_map
,
1919 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
1921 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
))
1924 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1925 if (!intel_sdvo_write_cmd(intel_sdvo
,
1926 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1927 &tv_res
, sizeof(tv_res
)))
1929 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
1932 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1933 if (reply
& (1 << i
)) {
1934 struct drm_display_mode
*nmode
;
1935 nmode
= drm_mode_duplicate(connector
->dev
,
1938 drm_mode_probed_add(connector
, nmode
);
1942 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1944 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1945 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1946 struct drm_display_mode
*newmode
;
1948 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1949 connector
->base
.id
, connector
->name
);
1952 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1953 * SDVO->LVDS transcoders can't cope with the EDID mode.
1955 if (dev_priv
->vbt
.sdvo_lvds_vbt_mode
!= NULL
) {
1956 newmode
= drm_mode_duplicate(connector
->dev
,
1957 dev_priv
->vbt
.sdvo_lvds_vbt_mode
);
1958 if (newmode
!= NULL
) {
1959 /* Guarantee the mode is preferred */
1960 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1961 DRM_MODE_TYPE_DRIVER
);
1962 drm_mode_probed_add(connector
, newmode
);
1967 * Attempt to get the mode list from DDC.
1968 * Assume that the preferred modes are
1969 * arranged in priority order.
1971 intel_ddc_get_modes(connector
, &intel_sdvo
->ddc
);
1973 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1974 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1975 intel_sdvo
->sdvo_lvds_fixed_mode
=
1976 drm_mode_duplicate(connector
->dev
, newmode
);
1978 intel_sdvo
->is_lvds
= true;
1984 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1986 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1988 if (IS_TV(intel_sdvo_connector
))
1989 intel_sdvo_get_tv_modes(connector
);
1990 else if (IS_LVDS(intel_sdvo_connector
))
1991 intel_sdvo_get_lvds_modes(connector
);
1993 intel_sdvo_get_ddc_modes(connector
);
1995 return !list_empty(&connector
->probed_modes
);
1998 static void intel_sdvo_destroy(struct drm_connector
*connector
)
2000 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2002 drm_connector_cleanup(connector
);
2003 kfree(intel_sdvo_connector
);
2006 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
2008 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2010 bool has_audio
= false;
2012 if (!intel_sdvo
->is_hdmi
)
2015 edid
= intel_sdvo_get_edid(connector
);
2016 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
2017 has_audio
= drm_detect_monitor_audio(edid
);
2024 intel_sdvo_set_property(struct drm_connector
*connector
,
2025 struct drm_property
*property
,
2028 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2029 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2030 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
2031 uint16_t temp_value
;
2035 ret
= drm_object_property_set_value(&connector
->base
, property
, val
);
2039 if (property
== dev_priv
->force_audio_property
) {
2043 if (i
== intel_sdvo_connector
->force_audio
)
2046 intel_sdvo_connector
->force_audio
= i
;
2048 if (i
== HDMI_AUDIO_AUTO
)
2049 has_audio
= intel_sdvo_detect_hdmi_audio(connector
);
2051 has_audio
= (i
== HDMI_AUDIO_ON
);
2053 if (has_audio
== intel_sdvo
->has_hdmi_audio
)
2056 intel_sdvo
->has_hdmi_audio
= has_audio
;
2060 if (property
== dev_priv
->broadcast_rgb_property
) {
2061 bool old_auto
= intel_sdvo
->color_range_auto
;
2062 uint32_t old_range
= intel_sdvo
->color_range
;
2065 case INTEL_BROADCAST_RGB_AUTO
:
2066 intel_sdvo
->color_range_auto
= true;
2068 case INTEL_BROADCAST_RGB_FULL
:
2069 intel_sdvo
->color_range_auto
= false;
2070 intel_sdvo
->color_range
= 0;
2072 case INTEL_BROADCAST_RGB_LIMITED
:
2073 intel_sdvo
->color_range_auto
= false;
2074 /* FIXME: this bit is only valid when using TMDS
2075 * encoding and 8 bit per color mode. */
2076 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
2082 if (old_auto
== intel_sdvo
->color_range_auto
&&
2083 old_range
== intel_sdvo
->color_range
)
2089 #define CHECK_PROPERTY(name, NAME) \
2090 if (intel_sdvo_connector->name == property) { \
2091 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2092 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2093 cmd = SDVO_CMD_SET_##NAME; \
2094 intel_sdvo_connector->cur_##name = temp_value; \
2098 if (property
== intel_sdvo_connector
->tv_format
) {
2099 if (val
>= TV_FORMAT_NUM
)
2102 if (intel_sdvo
->tv_format_index
==
2103 intel_sdvo_connector
->tv_format_supported
[val
])
2106 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[val
];
2108 } else if (IS_TV_OR_LVDS(intel_sdvo_connector
)) {
2110 if (intel_sdvo_connector
->left
== property
) {
2111 drm_object_property_set_value(&connector
->base
,
2112 intel_sdvo_connector
->right
, val
);
2113 if (intel_sdvo_connector
->left_margin
== temp_value
)
2116 intel_sdvo_connector
->left_margin
= temp_value
;
2117 intel_sdvo_connector
->right_margin
= temp_value
;
2118 temp_value
= intel_sdvo_connector
->max_hscan
-
2119 intel_sdvo_connector
->left_margin
;
2120 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2122 } else if (intel_sdvo_connector
->right
== property
) {
2123 drm_object_property_set_value(&connector
->base
,
2124 intel_sdvo_connector
->left
, val
);
2125 if (intel_sdvo_connector
->right_margin
== temp_value
)
2128 intel_sdvo_connector
->left_margin
= temp_value
;
2129 intel_sdvo_connector
->right_margin
= temp_value
;
2130 temp_value
= intel_sdvo_connector
->max_hscan
-
2131 intel_sdvo_connector
->left_margin
;
2132 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2134 } else if (intel_sdvo_connector
->top
== property
) {
2135 drm_object_property_set_value(&connector
->base
,
2136 intel_sdvo_connector
->bottom
, val
);
2137 if (intel_sdvo_connector
->top_margin
== temp_value
)
2140 intel_sdvo_connector
->top_margin
= temp_value
;
2141 intel_sdvo_connector
->bottom_margin
= temp_value
;
2142 temp_value
= intel_sdvo_connector
->max_vscan
-
2143 intel_sdvo_connector
->top_margin
;
2144 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2146 } else if (intel_sdvo_connector
->bottom
== property
) {
2147 drm_object_property_set_value(&connector
->base
,
2148 intel_sdvo_connector
->top
, val
);
2149 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
2152 intel_sdvo_connector
->top_margin
= temp_value
;
2153 intel_sdvo_connector
->bottom_margin
= temp_value
;
2154 temp_value
= intel_sdvo_connector
->max_vscan
-
2155 intel_sdvo_connector
->top_margin
;
2156 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2159 CHECK_PROPERTY(hpos
, HPOS
)
2160 CHECK_PROPERTY(vpos
, VPOS
)
2161 CHECK_PROPERTY(saturation
, SATURATION
)
2162 CHECK_PROPERTY(contrast
, CONTRAST
)
2163 CHECK_PROPERTY(hue
, HUE
)
2164 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
2165 CHECK_PROPERTY(sharpness
, SHARPNESS
)
2166 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
2167 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
2168 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
2169 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
2170 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
2171 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
2174 return -EINVAL
; /* unknown property */
2177 if (!intel_sdvo_set_value(intel_sdvo
, cmd
, &temp_value
, 2))
2182 if (intel_sdvo
->base
.base
.crtc
)
2183 intel_crtc_restore_mode(intel_sdvo
->base
.base
.crtc
);
2186 #undef CHECK_PROPERTY
2189 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2190 .dpms
= intel_sdvo_dpms
,
2191 .detect
= intel_sdvo_detect
,
2192 .fill_modes
= drm_helper_probe_single_connector_modes
,
2193 .set_property
= intel_sdvo_set_property
,
2194 .atomic_get_property
= intel_connector_atomic_get_property
,
2195 .destroy
= intel_sdvo_destroy
,
2196 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
2199 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2200 .get_modes
= intel_sdvo_get_modes
,
2201 .mode_valid
= intel_sdvo_mode_valid
,
2202 .best_encoder
= intel_best_encoder
,
2205 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2207 struct intel_sdvo
*intel_sdvo
= to_sdvo(to_intel_encoder(encoder
));
2209 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2210 drm_mode_destroy(encoder
->dev
,
2211 intel_sdvo
->sdvo_lvds_fixed_mode
);
2213 i2c_del_adapter(&intel_sdvo
->ddc
);
2214 intel_encoder_destroy(encoder
);
2217 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2218 .destroy
= intel_sdvo_enc_destroy
,
2222 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
)
2225 unsigned int num_bits
;
2227 /* Make a mask of outputs less than or equal to our own priority in the
2230 switch (sdvo
->controlled_output
) {
2231 case SDVO_OUTPUT_LVDS1
:
2232 mask
|= SDVO_OUTPUT_LVDS1
;
2233 case SDVO_OUTPUT_LVDS0
:
2234 mask
|= SDVO_OUTPUT_LVDS0
;
2235 case SDVO_OUTPUT_TMDS1
:
2236 mask
|= SDVO_OUTPUT_TMDS1
;
2237 case SDVO_OUTPUT_TMDS0
:
2238 mask
|= SDVO_OUTPUT_TMDS0
;
2239 case SDVO_OUTPUT_RGB1
:
2240 mask
|= SDVO_OUTPUT_RGB1
;
2241 case SDVO_OUTPUT_RGB0
:
2242 mask
|= SDVO_OUTPUT_RGB0
;
2246 /* Count bits to find what number we are in the priority list. */
2247 mask
&= sdvo
->caps
.output_flags
;
2248 num_bits
= hweight16(mask
);
2249 /* If more than 3 outputs, default to DDC bus 3 for now. */
2253 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2254 sdvo
->ddc_bus
= 1 << num_bits
;
2258 * Choose the appropriate DDC bus for control bus switch command for this
2259 * SDVO output based on the controlled output.
2261 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2262 * outputs, then LVDS outputs.
2265 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2266 struct intel_sdvo
*sdvo
, u32 reg
)
2268 struct sdvo_device_mapping
*mapping
;
2271 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2273 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2275 if (mapping
->initialized
)
2276 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2278 intel_sdvo_guess_ddc_bus(sdvo
);
2282 intel_sdvo_select_i2c_bus(struct drm_i915_private
*dev_priv
,
2283 struct intel_sdvo
*sdvo
, u32 reg
)
2285 struct sdvo_device_mapping
*mapping
;
2289 mapping
= &dev_priv
->sdvo_mappings
[0];
2291 mapping
= &dev_priv
->sdvo_mappings
[1];
2293 if (mapping
->initialized
&& intel_gmbus_is_port_valid(mapping
->i2c_pin
))
2294 pin
= mapping
->i2c_pin
;
2296 pin
= GMBUS_PORT_DPB
;
2298 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2300 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2301 * our code totally fails once we start using gmbus. Hence fall back to
2302 * bit banging for now. */
2303 intel_gmbus_force_bit(sdvo
->i2c
, true);
2306 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2308 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2310 intel_gmbus_force_bit(sdvo
->i2c
, false);
2314 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
, int device
)
2316 return intel_sdvo_check_supp_encode(intel_sdvo
);
2320 intel_sdvo_get_slave_addr(struct drm_device
*dev
, struct intel_sdvo
*sdvo
)
2322 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2323 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2325 if (sdvo
->is_sdvob
) {
2326 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2327 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2329 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2330 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2333 /* If the BIOS described our SDVO device, take advantage of it. */
2334 if (my_mapping
->slave_addr
)
2335 return my_mapping
->slave_addr
;
2337 /* If the BIOS only described a different SDVO device, use the
2338 * address that it isn't using.
2340 if (other_mapping
->slave_addr
) {
2341 if (other_mapping
->slave_addr
== 0x70)
2347 /* No SDVO device info is found for another DVO port,
2348 * so use mapping assumption we had before BIOS parsing.
2357 intel_sdvo_connector_unregister(struct intel_connector
*intel_connector
)
2359 struct drm_connector
*drm_connector
;
2360 struct intel_sdvo
*sdvo_encoder
;
2362 drm_connector
= &intel_connector
->base
;
2363 sdvo_encoder
= intel_attached_sdvo(&intel_connector
->base
);
2365 sysfs_remove_link(&drm_connector
->kdev
->kobj
,
2366 sdvo_encoder
->ddc
.dev
.kobj
.name
);
2367 intel_connector_unregister(intel_connector
);
2371 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2372 struct intel_sdvo
*encoder
)
2374 struct drm_connector
*drm_connector
;
2377 drm_connector
= &connector
->base
.base
;
2378 ret
= drm_connector_init(encoder
->base
.base
.dev
,
2380 &intel_sdvo_connector_funcs
,
2381 connector
->base
.base
.connector_type
);
2385 drm_connector_helper_add(drm_connector
,
2386 &intel_sdvo_connector_helper_funcs
);
2388 connector
->base
.base
.interlace_allowed
= 1;
2389 connector
->base
.base
.doublescan_allowed
= 0;
2390 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2391 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2392 connector
->base
.unregister
= intel_sdvo_connector_unregister
;
2394 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2395 ret
= drm_connector_register(drm_connector
);
2399 ret
= sysfs_create_link(&drm_connector
->kdev
->kobj
,
2400 &encoder
->ddc
.dev
.kobj
,
2401 encoder
->ddc
.dev
.kobj
.name
);
2408 drm_connector_unregister(drm_connector
);
2410 drm_connector_cleanup(drm_connector
);
2416 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2417 struct intel_sdvo_connector
*connector
)
2419 struct drm_device
*dev
= connector
->base
.base
.dev
;
2421 intel_attach_force_audio_property(&connector
->base
.base
);
2422 if (INTEL_INFO(dev
)->gen
>= 4 && IS_MOBILE(dev
)) {
2423 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2424 intel_sdvo
->color_range_auto
= true;
2429 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2431 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2432 struct drm_connector
*connector
;
2433 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2434 struct intel_connector
*intel_connector
;
2435 struct intel_sdvo_connector
*intel_sdvo_connector
;
2437 DRM_DEBUG_KMS("initialising DVI device %d\n", device
);
2439 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2440 if (!intel_sdvo_connector
)
2444 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2445 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2446 } else if (device
== 1) {
2447 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2448 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2451 intel_connector
= &intel_sdvo_connector
->base
;
2452 connector
= &intel_connector
->base
;
2453 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2454 intel_sdvo_connector
->output_flag
) {
2455 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2456 /* Some SDVO devices have one-shot hotplug interrupts.
2457 * Ensure that they get re-enabled when an interrupt happens.
2459 intel_encoder
->hot_plug
= intel_sdvo_enable_hotplug
;
2460 intel_sdvo_enable_hotplug(intel_encoder
);
2462 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2464 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2465 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2467 if (intel_sdvo_is_hdmi_connector(intel_sdvo
, device
)) {
2468 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2469 intel_sdvo
->is_hdmi
= true;
2472 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2473 kfree(intel_sdvo_connector
);
2477 if (intel_sdvo
->is_hdmi
)
2478 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2484 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2486 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2487 struct drm_connector
*connector
;
2488 struct intel_connector
*intel_connector
;
2489 struct intel_sdvo_connector
*intel_sdvo_connector
;
2491 DRM_DEBUG_KMS("initialising TV type %d\n", type
);
2493 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2494 if (!intel_sdvo_connector
)
2497 intel_connector
= &intel_sdvo_connector
->base
;
2498 connector
= &intel_connector
->base
;
2499 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2500 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2502 intel_sdvo
->controlled_output
|= type
;
2503 intel_sdvo_connector
->output_flag
= type
;
2505 intel_sdvo
->is_tv
= true;
2507 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2508 kfree(intel_sdvo_connector
);
2512 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2515 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2521 drm_connector_unregister(connector
);
2522 intel_sdvo_destroy(connector
);
2527 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2529 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2530 struct drm_connector
*connector
;
2531 struct intel_connector
*intel_connector
;
2532 struct intel_sdvo_connector
*intel_sdvo_connector
;
2534 DRM_DEBUG_KMS("initialising analog device %d\n", device
);
2536 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2537 if (!intel_sdvo_connector
)
2540 intel_connector
= &intel_sdvo_connector
->base
;
2541 connector
= &intel_connector
->base
;
2542 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2543 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2544 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2547 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2548 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2549 } else if (device
== 1) {
2550 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2551 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2554 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2555 kfree(intel_sdvo_connector
);
2563 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2565 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2566 struct drm_connector
*connector
;
2567 struct intel_connector
*intel_connector
;
2568 struct intel_sdvo_connector
*intel_sdvo_connector
;
2570 DRM_DEBUG_KMS("initialising LVDS device %d\n", device
);
2572 intel_sdvo_connector
= kzalloc(sizeof(*intel_sdvo_connector
), GFP_KERNEL
);
2573 if (!intel_sdvo_connector
)
2576 intel_connector
= &intel_sdvo_connector
->base
;
2577 connector
= &intel_connector
->base
;
2578 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2579 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2582 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2583 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2584 } else if (device
== 1) {
2585 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2586 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2589 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2590 kfree(intel_sdvo_connector
);
2594 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2600 drm_connector_unregister(connector
);
2601 intel_sdvo_destroy(connector
);
2606 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2608 intel_sdvo
->is_tv
= false;
2609 intel_sdvo
->is_lvds
= false;
2611 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2613 if (flags
& SDVO_OUTPUT_TMDS0
)
2614 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2617 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2618 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2621 /* TV has no XXX1 function block */
2622 if (flags
& SDVO_OUTPUT_SVID0
)
2623 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2626 if (flags
& SDVO_OUTPUT_CVBS0
)
2627 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2630 if (flags
& SDVO_OUTPUT_YPRPB0
)
2631 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_YPRPB0
))
2634 if (flags
& SDVO_OUTPUT_RGB0
)
2635 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2638 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2639 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2642 if (flags
& SDVO_OUTPUT_LVDS0
)
2643 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2646 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2647 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2650 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2651 unsigned char bytes
[2];
2653 intel_sdvo
->controlled_output
= 0;
2654 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2655 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2656 SDVO_NAME(intel_sdvo
),
2657 bytes
[0], bytes
[1]);
2660 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
2665 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
2667 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2668 struct drm_connector
*connector
, *tmp
;
2670 list_for_each_entry_safe(connector
, tmp
,
2671 &dev
->mode_config
.connector_list
, head
) {
2672 if (intel_attached_encoder(connector
) == &intel_sdvo
->base
) {
2673 drm_connector_unregister(connector
);
2674 intel_sdvo_destroy(connector
);
2679 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
2680 struct intel_sdvo_connector
*intel_sdvo_connector
,
2683 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2684 struct intel_sdvo_tv_format format
;
2685 uint32_t format_map
, i
;
2687 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
2690 BUILD_BUG_ON(sizeof(format
) != 6);
2691 if (!intel_sdvo_get_value(intel_sdvo
,
2692 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2693 &format
, sizeof(format
)))
2696 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2698 if (format_map
== 0)
2701 intel_sdvo_connector
->format_supported_num
= 0;
2702 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2703 if (format_map
& (1 << i
))
2704 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
2707 intel_sdvo_connector
->tv_format
=
2708 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2709 "mode", intel_sdvo_connector
->format_supported_num
);
2710 if (!intel_sdvo_connector
->tv_format
)
2713 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2714 drm_property_add_enum(
2715 intel_sdvo_connector
->tv_format
, i
,
2716 i
, tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
2718 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[0];
2719 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
2720 intel_sdvo_connector
->tv_format
, 0);
2725 #define ENHANCEMENT(name, NAME) do { \
2726 if (enhancements.name) { \
2727 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2728 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2730 intel_sdvo_connector->max_##name = data_value[0]; \
2731 intel_sdvo_connector->cur_##name = response; \
2732 intel_sdvo_connector->name = \
2733 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2734 if (!intel_sdvo_connector->name) return false; \
2735 drm_object_attach_property(&connector->base, \
2736 intel_sdvo_connector->name, \
2737 intel_sdvo_connector->cur_##name); \
2738 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2739 data_value[0], data_value[1], response); \
2744 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
2745 struct intel_sdvo_connector
*intel_sdvo_connector
,
2746 struct intel_sdvo_enhancements_reply enhancements
)
2748 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2749 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2750 uint16_t response
, data_value
[2];
2752 /* when horizontal overscan is supported, Add the left/right property */
2753 if (enhancements
.overscan_h
) {
2754 if (!intel_sdvo_get_value(intel_sdvo
,
2755 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2759 if (!intel_sdvo_get_value(intel_sdvo
,
2760 SDVO_CMD_GET_OVERSCAN_H
,
2764 intel_sdvo_connector
->max_hscan
= data_value
[0];
2765 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2766 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2767 intel_sdvo_connector
->left
=
2768 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2769 if (!intel_sdvo_connector
->left
)
2772 drm_object_attach_property(&connector
->base
,
2773 intel_sdvo_connector
->left
,
2774 intel_sdvo_connector
->left_margin
);
2776 intel_sdvo_connector
->right
=
2777 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2778 if (!intel_sdvo_connector
->right
)
2781 drm_object_attach_property(&connector
->base
,
2782 intel_sdvo_connector
->right
,
2783 intel_sdvo_connector
->right_margin
);
2784 DRM_DEBUG_KMS("h_overscan: max %d, "
2785 "default %d, current %d\n",
2786 data_value
[0], data_value
[1], response
);
2789 if (enhancements
.overscan_v
) {
2790 if (!intel_sdvo_get_value(intel_sdvo
,
2791 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2795 if (!intel_sdvo_get_value(intel_sdvo
,
2796 SDVO_CMD_GET_OVERSCAN_V
,
2800 intel_sdvo_connector
->max_vscan
= data_value
[0];
2801 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2802 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2803 intel_sdvo_connector
->top
=
2804 drm_property_create_range(dev
, 0,
2805 "top_margin", 0, data_value
[0]);
2806 if (!intel_sdvo_connector
->top
)
2809 drm_object_attach_property(&connector
->base
,
2810 intel_sdvo_connector
->top
,
2811 intel_sdvo_connector
->top_margin
);
2813 intel_sdvo_connector
->bottom
=
2814 drm_property_create_range(dev
, 0,
2815 "bottom_margin", 0, data_value
[0]);
2816 if (!intel_sdvo_connector
->bottom
)
2819 drm_object_attach_property(&connector
->base
,
2820 intel_sdvo_connector
->bottom
,
2821 intel_sdvo_connector
->bottom_margin
);
2822 DRM_DEBUG_KMS("v_overscan: max %d, "
2823 "default %d, current %d\n",
2824 data_value
[0], data_value
[1], response
);
2827 ENHANCEMENT(hpos
, HPOS
);
2828 ENHANCEMENT(vpos
, VPOS
);
2829 ENHANCEMENT(saturation
, SATURATION
);
2830 ENHANCEMENT(contrast
, CONTRAST
);
2831 ENHANCEMENT(hue
, HUE
);
2832 ENHANCEMENT(sharpness
, SHARPNESS
);
2833 ENHANCEMENT(brightness
, BRIGHTNESS
);
2834 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2835 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2836 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2837 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2838 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2840 if (enhancements
.dot_crawl
) {
2841 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2844 intel_sdvo_connector
->max_dot_crawl
= 1;
2845 intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2846 intel_sdvo_connector
->dot_crawl
=
2847 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2848 if (!intel_sdvo_connector
->dot_crawl
)
2851 drm_object_attach_property(&connector
->base
,
2852 intel_sdvo_connector
->dot_crawl
,
2853 intel_sdvo_connector
->cur_dot_crawl
);
2854 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2861 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
2862 struct intel_sdvo_connector
*intel_sdvo_connector
,
2863 struct intel_sdvo_enhancements_reply enhancements
)
2865 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2866 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2867 uint16_t response
, data_value
[2];
2869 ENHANCEMENT(brightness
, BRIGHTNESS
);
2875 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
2876 struct intel_sdvo_connector
*intel_sdvo_connector
)
2879 struct intel_sdvo_enhancements_reply reply
;
2883 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2885 enhancements
.response
= 0;
2886 intel_sdvo_get_value(intel_sdvo
,
2887 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2888 &enhancements
, sizeof(enhancements
));
2889 if (enhancements
.response
== 0) {
2890 DRM_DEBUG_KMS("No enhancement is supported\n");
2894 if (IS_TV(intel_sdvo_connector
))
2895 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2896 else if (IS_LVDS(intel_sdvo_connector
))
2897 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2902 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2903 struct i2c_msg
*msgs
,
2906 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2908 if (!intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2911 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2914 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2916 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2917 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2920 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
2921 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
2922 .functionality
= intel_sdvo_ddc_proxy_func
2926 intel_sdvo_init_ddc_proxy(struct intel_sdvo
*sdvo
,
2927 struct drm_device
*dev
)
2929 sdvo
->ddc
.owner
= THIS_MODULE
;
2930 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2931 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2932 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2933 sdvo
->ddc
.algo_data
= sdvo
;
2934 sdvo
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
2936 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2939 bool intel_sdvo_init(struct drm_device
*dev
, uint32_t sdvo_reg
, bool is_sdvob
)
2941 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2942 struct intel_encoder
*intel_encoder
;
2943 struct intel_sdvo
*intel_sdvo
;
2945 intel_sdvo
= kzalloc(sizeof(*intel_sdvo
), GFP_KERNEL
);
2949 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2950 intel_sdvo
->is_sdvob
= is_sdvob
;
2951 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, intel_sdvo
) >> 1;
2952 intel_sdvo_select_i2c_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2953 if (!intel_sdvo_init_ddc_proxy(intel_sdvo
, dev
))
2956 /* encoder type will be decided later */
2957 intel_encoder
= &intel_sdvo
->base
;
2958 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2959 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_sdvo_enc_funcs
, 0);
2961 /* Read the regs to test if we can talk to the device */
2962 for (i
= 0; i
< 0x40; i
++) {
2965 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
2966 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2967 SDVO_NAME(intel_sdvo
));
2972 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
2973 intel_encoder
->disable
= intel_disable_sdvo
;
2974 intel_encoder
->pre_enable
= intel_sdvo_pre_enable
;
2975 intel_encoder
->enable
= intel_enable_sdvo
;
2976 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
2977 intel_encoder
->get_config
= intel_sdvo_get_config
;
2979 /* In default case sdvo lvds is false */
2980 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
2983 if (intel_sdvo_output_setup(intel_sdvo
,
2984 intel_sdvo
->caps
.output_flags
) != true) {
2985 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2986 SDVO_NAME(intel_sdvo
));
2987 /* Output_setup can leave behind connectors! */
2991 /* Only enable the hotplug irq if we need it, to work around noisy
2994 if (intel_sdvo
->hotplug_active
) {
2995 intel_encoder
->hpd_pin
=
2996 intel_sdvo
->is_sdvob
? HPD_SDVO_B
: HPD_SDVO_C
;
3000 * Cloning SDVO with anything is often impossible, since the SDVO
3001 * encoder can request a special input timing mode. And even if that's
3002 * not the case we have evidence that cloning a plain unscaled mode with
3003 * VGA doesn't really work. Furthermore the cloning flags are way too
3004 * simplistic anyway to express such constraints, so just give up on
3005 * cloning for SDVO encoders.
3007 intel_sdvo
->base
.cloneable
= 0;
3009 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
3011 /* Set the input timing to the screen. Assume always input 0. */
3012 if (!intel_sdvo_set_target_input(intel_sdvo
))
3015 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
3016 &intel_sdvo
->pixel_clock_min
,
3017 &intel_sdvo
->pixel_clock_max
))
3020 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3021 "clock range %dMHz - %dMHz, "
3022 "input 1: %c, input 2: %c, "
3023 "output 1: %c, output 2: %c\n",
3024 SDVO_NAME(intel_sdvo
),
3025 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
3026 intel_sdvo
->caps
.device_rev_id
,
3027 intel_sdvo
->pixel_clock_min
/ 1000,
3028 intel_sdvo
->pixel_clock_max
/ 1000,
3029 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
3030 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
3031 /* check currently supported outputs */
3032 intel_sdvo
->caps
.output_flags
&
3033 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
3034 intel_sdvo
->caps
.output_flags
&
3035 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
3039 intel_sdvo_output_cleanup(intel_sdvo
);
3042 drm_encoder_cleanup(&intel_encoder
->base
);
3043 i2c_del_adapter(&intel_sdvo
->ddc
);
3045 intel_sdvo_unselect_i2c_bus(intel_sdvo
);