2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
55 static const char *tv_format_names
[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
68 struct intel_encoder base
;
70 struct i2c_adapter
*i2c
;
73 struct i2c_adapter ddc
;
75 /* Register for the SDVO device: SDVOB or SDVOC */
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output
;
82 * Capabilities of the SDVO device returned by
83 * intel_sdvo_get_capabilities()
85 struct intel_sdvo_caps caps
;
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min
, pixel_clock_max
;
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
94 uint16_t attached_output
;
97 * Hotplug activation bits for this device
99 uint16_t hotplug_active
;
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 uint32_t color_range
;
106 bool color_range_auto
;
109 * This is set if we're going to treat the device as TV-out.
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
117 /* On different gens SDVOB is at different places. */
120 /* This is for current tv format name */
124 * This is set if we treat the device as HDMI, instead of DVI.
127 bool has_hdmi_monitor
;
129 bool rgb_quant_range_selectable
;
132 * This is set if we detect output of sdvo device as LVDS and
133 * have a valid fixed mode to use with the panel.
138 * This is sdvo fixed pannel mode pointer
140 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
142 /* DDC bus used by this SDVO encoder */
146 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
148 uint8_t dtd_sdvo_flags
;
151 struct intel_sdvo_connector
{
152 struct intel_connector base
;
154 /* Mark the type of connector */
155 uint16_t output_flag
;
157 enum hdmi_force_audio force_audio
;
159 /* This contains all current supported TV format */
160 u8 tv_format_supported
[TV_FORMAT_NUM
];
161 int format_supported_num
;
162 struct drm_property
*tv_format
;
164 /* add the property for the SDVO-TV */
165 struct drm_property
*left
;
166 struct drm_property
*right
;
167 struct drm_property
*top
;
168 struct drm_property
*bottom
;
169 struct drm_property
*hpos
;
170 struct drm_property
*vpos
;
171 struct drm_property
*contrast
;
172 struct drm_property
*saturation
;
173 struct drm_property
*hue
;
174 struct drm_property
*sharpness
;
175 struct drm_property
*flicker_filter
;
176 struct drm_property
*flicker_filter_adaptive
;
177 struct drm_property
*flicker_filter_2d
;
178 struct drm_property
*tv_chroma_filter
;
179 struct drm_property
*tv_luma_filter
;
180 struct drm_property
*dot_crawl
;
182 /* add the property for the SDVO-TV/LVDS */
183 struct drm_property
*brightness
;
185 /* Add variable to record current setting for the above property */
186 u32 left_margin
, right_margin
, top_margin
, bottom_margin
;
188 /* this is to get the range of margin.*/
189 u32 max_hscan
, max_vscan
;
190 u32 max_hpos
, cur_hpos
;
191 u32 max_vpos
, cur_vpos
;
192 u32 cur_brightness
, max_brightness
;
193 u32 cur_contrast
, max_contrast
;
194 u32 cur_saturation
, max_saturation
;
195 u32 cur_hue
, max_hue
;
196 u32 cur_sharpness
, max_sharpness
;
197 u32 cur_flicker_filter
, max_flicker_filter
;
198 u32 cur_flicker_filter_adaptive
, max_flicker_filter_adaptive
;
199 u32 cur_flicker_filter_2d
, max_flicker_filter_2d
;
200 u32 cur_tv_chroma_filter
, max_tv_chroma_filter
;
201 u32 cur_tv_luma_filter
, max_tv_luma_filter
;
202 u32 cur_dot_crawl
, max_dot_crawl
;
205 static struct intel_sdvo
*to_intel_sdvo(struct drm_encoder
*encoder
)
207 return container_of(encoder
, struct intel_sdvo
, base
.base
);
210 static struct intel_sdvo
*intel_attached_sdvo(struct drm_connector
*connector
)
212 return container_of(intel_attached_encoder(connector
),
213 struct intel_sdvo
, base
);
216 static struct intel_sdvo_connector
*to_intel_sdvo_connector(struct drm_connector
*connector
)
218 return container_of(to_intel_connector(connector
), struct intel_sdvo_connector
, base
);
222 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
);
224 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
225 struct intel_sdvo_connector
*intel_sdvo_connector
,
228 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
229 struct intel_sdvo_connector
*intel_sdvo_connector
);
232 * Writes the SDVOB or SDVOC with the given value, but always writes both
233 * SDVOB and SDVOC to work around apparent hardware issues (according to
234 * comments in the BIOS).
236 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
238 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
239 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
240 u32 bval
= val
, cval
= val
;
243 if (intel_sdvo
->sdvo_reg
== PCH_SDVOB
) {
244 I915_WRITE(intel_sdvo
->sdvo_reg
, val
);
245 I915_READ(intel_sdvo
->sdvo_reg
);
249 if (intel_sdvo
->sdvo_reg
== GEN3_SDVOB
)
250 cval
= I915_READ(GEN3_SDVOC
);
252 bval
= I915_READ(GEN3_SDVOB
);
255 * Write the registers twice for luck. Sometimes,
256 * writing them only once doesn't appear to 'stick'.
257 * The BIOS does this too. Yay, magic
259 for (i
= 0; i
< 2; i
++)
261 I915_WRITE(GEN3_SDVOB
, bval
);
262 I915_READ(GEN3_SDVOB
);
263 I915_WRITE(GEN3_SDVOC
, cval
);
264 I915_READ(GEN3_SDVOC
);
268 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
270 struct i2c_msg msgs
[] = {
272 .addr
= intel_sdvo
->slave_addr
,
278 .addr
= intel_sdvo
->slave_addr
,
286 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
293 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294 /** Mapping of command numbers to names, for debug output */
295 static const struct _sdvo_cmd_name
{
298 } sdvo_cmd_names
[] = {
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
343 /* Add the op code for SDVO enhancements */
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS
),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS
),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS
),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS
),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS
),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS
),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION
),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION
),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION
),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE
),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE
),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE
),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST
),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST
),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST
),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS
),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS
),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS
),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H
),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H
),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H
),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V
),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V
),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V
),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER
),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER
),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER
),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE
),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE
),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE
),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D
),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D
),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D
),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS
),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS
),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS
),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL
),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL
),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER
),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER
),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER
),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER
),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER
),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER
),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
412 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
414 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
415 const void *args
, int args_len
)
419 DRM_DEBUG_KMS("%s: W: %02X ",
420 SDVO_NAME(intel_sdvo
), cmd
);
421 for (i
= 0; i
< args_len
; i
++)
422 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
425 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
426 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
427 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
431 if (i
== ARRAY_SIZE(sdvo_cmd_names
))
432 DRM_LOG_KMS("(%02X)", cmd
);
436 static const char *cmd_status_names
[] = {
442 "Target not specified",
443 "Scaling not supported"
446 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
447 const void *args
, int args_len
)
450 struct i2c_msg
*msgs
;
453 /* Would be simpler to allocate both in one go ? */
454 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
458 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
464 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
466 for (i
= 0; i
< args_len
; i
++) {
467 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
470 msgs
[i
].buf
= buf
+ 2 *i
;
471 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
472 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
474 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
477 msgs
[i
].buf
= buf
+ 2*i
;
478 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
481 /* the following two are to read the response */
482 status
= SDVO_I2C_CMD_STATUS
;
483 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
486 msgs
[i
+1].buf
= &status
;
488 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
489 msgs
[i
+2].flags
= I2C_M_RD
;
491 msgs
[i
+2].buf
= &status
;
493 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
495 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
500 /* failure in I2C transfer */
501 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
511 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
512 void *response
, int response_len
)
514 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
518 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo
));
521 * The documentation states that all commands will be
522 * processed within 15µs, and that we need only poll
523 * the status byte a maximum of 3 times in order for the
524 * command to be complete.
526 * Check 5 times in case the hardware failed to read the docs.
528 * Also beware that the first response by many devices is to
529 * reply PENDING and stall for time. TVs are notorious for
530 * requiring longer than specified to complete their replies.
531 * Originally (in the DDX long ago), the delay was only ever 15ms
532 * with an additional delay of 30ms applied for TVs added later after
533 * many experiments. To accommodate both sets of delays, we do a
534 * sequence of slow checks if the device is falling behind and fails
535 * to reply within 5*15µs.
537 if (!intel_sdvo_read_byte(intel_sdvo
,
542 while (status
== SDVO_CMD_STATUS_PENDING
&& --retry
) {
548 if (!intel_sdvo_read_byte(intel_sdvo
,
554 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
555 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
557 DRM_LOG_KMS("(??? %d)", status
);
559 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
562 /* Read the command response */
563 for (i
= 0; i
< response_len
; i
++) {
564 if (!intel_sdvo_read_byte(intel_sdvo
,
565 SDVO_I2C_RETURN_0
+ i
,
566 &((u8
*)response
)[i
]))
568 DRM_LOG_KMS(" %02X", ((u8
*)response
)[i
]);
574 DRM_LOG_KMS("... failed\n");
578 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
580 if (mode
->clock
>= 100000)
582 else if (mode
->clock
>= 50000)
588 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
591 /* This must be the immediately preceding write before the i2c xfer */
592 return intel_sdvo_write_cmd(intel_sdvo
,
593 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
597 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
599 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
602 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
606 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
608 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
611 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
614 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
616 struct intel_sdvo_set_target_input_args targets
= {0};
617 return intel_sdvo_set_value(intel_sdvo
,
618 SDVO_CMD_SET_TARGET_INPUT
,
619 &targets
, sizeof(targets
));
623 * Return whether each input is trained.
625 * This function is making an assumption about the layout of the response,
626 * which should be checked against the docs.
628 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
630 struct intel_sdvo_get_trained_inputs_response response
;
632 BUILD_BUG_ON(sizeof(response
) != 1);
633 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
634 &response
, sizeof(response
)))
637 *input_1
= response
.input0_trained
;
638 *input_2
= response
.input1_trained
;
642 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
645 return intel_sdvo_set_value(intel_sdvo
,
646 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
647 &outputs
, sizeof(outputs
));
650 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
653 return intel_sdvo_get_value(intel_sdvo
,
654 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
655 outputs
, sizeof(*outputs
));
658 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
661 u8 state
= SDVO_ENCODER_STATE_ON
;
664 case DRM_MODE_DPMS_ON
:
665 state
= SDVO_ENCODER_STATE_ON
;
667 case DRM_MODE_DPMS_STANDBY
:
668 state
= SDVO_ENCODER_STATE_STANDBY
;
670 case DRM_MODE_DPMS_SUSPEND
:
671 state
= SDVO_ENCODER_STATE_SUSPEND
;
673 case DRM_MODE_DPMS_OFF
:
674 state
= SDVO_ENCODER_STATE_OFF
;
678 return intel_sdvo_set_value(intel_sdvo
,
679 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
682 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
686 struct intel_sdvo_pixel_clock_range clocks
;
688 BUILD_BUG_ON(sizeof(clocks
) != 4);
689 if (!intel_sdvo_get_value(intel_sdvo
,
690 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
691 &clocks
, sizeof(clocks
)))
694 /* Convert the values from units of 10 kHz to kHz. */
695 *clock_min
= clocks
.min
* 10;
696 *clock_max
= clocks
.max
* 10;
700 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
703 return intel_sdvo_set_value(intel_sdvo
,
704 SDVO_CMD_SET_TARGET_OUTPUT
,
705 &outputs
, sizeof(outputs
));
708 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
709 struct intel_sdvo_dtd
*dtd
)
711 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
712 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
715 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
716 struct intel_sdvo_dtd
*dtd
)
718 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
719 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
722 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
723 struct intel_sdvo_dtd
*dtd
)
725 return intel_sdvo_set_timing(intel_sdvo
,
726 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
729 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
730 struct intel_sdvo_dtd
*dtd
)
732 return intel_sdvo_set_timing(intel_sdvo
,
733 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
736 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
737 struct intel_sdvo_dtd
*dtd
)
739 return intel_sdvo_get_timing(intel_sdvo
,
740 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
744 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
749 struct intel_sdvo_preferred_input_timing_args args
;
751 memset(&args
, 0, sizeof(args
));
754 args
.height
= height
;
757 if (intel_sdvo
->is_lvds
&&
758 (intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
759 intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
762 return intel_sdvo_set_value(intel_sdvo
,
763 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
764 &args
, sizeof(args
));
767 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
768 struct intel_sdvo_dtd
*dtd
)
770 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
771 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
772 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
773 &dtd
->part1
, sizeof(dtd
->part1
)) &&
774 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
775 &dtd
->part2
, sizeof(dtd
->part2
));
778 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
780 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
783 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
784 const struct drm_display_mode
*mode
)
786 uint16_t width
, height
;
787 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
788 uint16_t h_sync_offset
, v_sync_offset
;
791 width
= mode
->hdisplay
;
792 height
= mode
->vdisplay
;
794 /* do some mode translations */
795 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
796 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
798 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
799 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
801 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
802 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
804 mode_clock
= mode
->clock
;
806 dtd
->part1
.clock
= mode_clock
;
808 dtd
->part1
.h_active
= width
& 0xff;
809 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
810 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
811 ((h_blank_len
>> 8) & 0xf);
812 dtd
->part1
.v_active
= height
& 0xff;
813 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
814 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
815 ((v_blank_len
>> 8) & 0xf);
817 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
818 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
819 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
821 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
822 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
823 ((v_sync_len
& 0x30) >> 4);
825 dtd
->part2
.dtd_flags
= 0x18;
826 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
827 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
828 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
829 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
830 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
831 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
833 dtd
->part2
.sdvo_flags
= 0;
834 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
835 dtd
->part2
.reserved
= 0;
838 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
839 const struct intel_sdvo_dtd
*dtd
)
841 mode
->hdisplay
= dtd
->part1
.h_active
;
842 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
843 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
844 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
845 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
846 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
847 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
848 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
850 mode
->vdisplay
= dtd
->part1
.v_active
;
851 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
852 mode
->vsync_start
= mode
->vdisplay
;
853 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
854 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
855 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
856 mode
->vsync_end
= mode
->vsync_start
+
857 (dtd
->part2
.v_sync_off_width
& 0xf);
858 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
859 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
860 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
862 mode
->clock
= dtd
->part1
.clock
* 10;
864 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
865 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
866 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
867 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
868 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
869 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
870 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
873 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
875 struct intel_sdvo_encode encode
;
877 BUILD_BUG_ON(sizeof(encode
) != 2);
878 return intel_sdvo_get_value(intel_sdvo
,
879 SDVO_CMD_GET_SUPP_ENCODE
,
880 &encode
, sizeof(encode
));
883 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
886 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
889 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
892 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
896 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
899 uint8_t set_buf_index
[2];
905 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
907 for (i
= 0; i
<= av_split
; i
++) {
908 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
909 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
911 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
912 intel_sdvo_read_response(encoder
, &buf_size
, 1);
915 for (j
= 0; j
<= buf_size
; j
+= 8) {
916 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
918 intel_sdvo_read_response(encoder
, pos
, 8);
925 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
926 unsigned if_index
, uint8_t tx_rate
,
927 uint8_t *data
, unsigned length
)
929 uint8_t set_buf_index
[2] = { if_index
, 0 };
930 uint8_t hbuf_size
, tmp
[8];
933 if (!intel_sdvo_set_value(intel_sdvo
,
934 SDVO_CMD_SET_HBUF_INDEX
,
938 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
942 /* Buffer size is 0 based, hooray! */
945 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
946 if_index
, length
, hbuf_size
);
948 for (i
= 0; i
< hbuf_size
; i
+= 8) {
951 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
953 if (!intel_sdvo_set_value(intel_sdvo
,
954 SDVO_CMD_SET_HBUF_DATA
,
959 return intel_sdvo_set_value(intel_sdvo
,
960 SDVO_CMD_SET_HBUF_TXRATE
,
964 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
965 const struct drm_display_mode
*adjusted_mode
)
967 struct dip_infoframe avi_if
= {
968 .type
= DIP_TYPE_AVI
,
969 .ver
= DIP_VERSION_AVI
,
972 uint8_t sdvo_data
[4 + sizeof(avi_if
.body
.avi
)];
973 struct intel_crtc
*intel_crtc
= to_intel_crtc(intel_sdvo
->base
.base
.crtc
);
975 if (intel_sdvo
->rgb_quant_range_selectable
) {
976 if (intel_crtc
->config
.limited_color_range
)
977 avi_if
.body
.avi
.ITC_EC_Q_SC
|= DIP_AVI_RGB_QUANT_RANGE_LIMITED
;
979 avi_if
.body
.avi
.ITC_EC_Q_SC
|= DIP_AVI_RGB_QUANT_RANGE_FULL
;
982 avi_if
.body
.avi
.VIC
= drm_match_cea_mode(adjusted_mode
);
984 intel_dip_infoframe_csum(&avi_if
);
986 /* sdvo spec says that the ecc is handled by the hw, and it looks like
987 * we must not send the ecc field, either. */
988 memcpy(sdvo_data
, &avi_if
, 3);
989 sdvo_data
[3] = avi_if
.checksum
;
990 memcpy(&sdvo_data
[4], &avi_if
.body
, sizeof(avi_if
.body
.avi
));
992 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
994 sdvo_data
, sizeof(sdvo_data
));
997 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
)
999 struct intel_sdvo_tv_format format
;
1000 uint32_t format_map
;
1002 format_map
= 1 << intel_sdvo
->tv_format_index
;
1003 memset(&format
, 0, sizeof(format
));
1004 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1006 BUILD_BUG_ON(sizeof(format
) != 6);
1007 return intel_sdvo_set_value(intel_sdvo
,
1008 SDVO_CMD_SET_TV_FORMAT
,
1009 &format
, sizeof(format
));
1013 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1014 const struct drm_display_mode
*mode
)
1016 struct intel_sdvo_dtd output_dtd
;
1018 if (!intel_sdvo_set_target_output(intel_sdvo
,
1019 intel_sdvo
->attached_output
))
1022 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1023 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1029 /* Asks the sdvo controller for the preferred input mode given the output mode.
1030 * Unfortunately we have to set up the full output mode to do that. */
1032 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1033 const struct drm_display_mode
*mode
,
1034 struct drm_display_mode
*adjusted_mode
)
1036 struct intel_sdvo_dtd input_dtd
;
1038 /* Reset the input timing to the screen. Assume always input 0. */
1039 if (!intel_sdvo_set_target_input(intel_sdvo
))
1042 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1048 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1052 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1053 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1058 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config
*pipe_config
)
1060 unsigned dotclock
= pipe_config
->adjusted_mode
.clock
;
1061 struct dpll
*clock
= &pipe_config
->dpll
;
1063 /* SDVO TV has fixed PLL values depend on its clock range,
1064 this mirrors vbios setting. */
1065 if (dotclock
>= 100000 && dotclock
< 140500) {
1071 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1078 WARN(1, "SDVO TV clock out of range: %i\n", dotclock
);
1081 pipe_config
->clock_set
= true;
1084 static bool intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1085 struct intel_crtc_config
*pipe_config
)
1087 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1088 struct drm_display_mode
*adjusted_mode
= &pipe_config
->adjusted_mode
;
1089 struct drm_display_mode
*mode
= &pipe_config
->requested_mode
;
1091 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1092 pipe_config
->pipe_bpp
= 8*3;
1094 if (HAS_PCH_SPLIT(encoder
->base
.dev
))
1095 pipe_config
->has_pch_encoder
= true;
1097 /* We need to construct preferred input timings based on our
1098 * output timings. To do that, we have to set the output
1099 * timings, even though this isn't really the right place in
1100 * the sequence to do it. Oh well.
1102 if (intel_sdvo
->is_tv
) {
1103 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
, mode
))
1106 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1109 pipe_config
->sdvo_tv_clock
= true;
1110 } else if (intel_sdvo
->is_lvds
) {
1111 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1112 intel_sdvo
->sdvo_lvds_fixed_mode
))
1115 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1120 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1121 * SDVO device will factor out the multiplier during mode_set.
1123 pipe_config
->pixel_multiplier
=
1124 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1125 adjusted_mode
->clock
*= pipe_config
->pixel_multiplier
;
1127 if (intel_sdvo
->color_range_auto
) {
1128 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1129 /* FIXME: This bit is only valid when using TMDS encoding and 8
1130 * bit per color mode. */
1131 if (intel_sdvo
->has_hdmi_monitor
&&
1132 drm_match_cea_mode(adjusted_mode
) > 1)
1133 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
1135 intel_sdvo
->color_range
= 0;
1138 if (intel_sdvo
->color_range
)
1139 pipe_config
->limited_color_range
= true;
1141 /* Clock computation needs to happen after pixel multiplier. */
1142 if (intel_sdvo
->is_tv
)
1143 i9xx_adjust_sdvo_tv_clock(pipe_config
);
1148 static void intel_sdvo_mode_set(struct intel_encoder
*intel_encoder
)
1150 struct drm_device
*dev
= intel_encoder
->base
.dev
;
1151 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1152 struct drm_crtc
*crtc
= intel_encoder
->base
.crtc
;
1153 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
1154 struct drm_display_mode
*adjusted_mode
=
1155 &intel_crtc
->config
.adjusted_mode
;
1156 struct drm_display_mode
*mode
= &intel_crtc
->config
.requested_mode
;
1157 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&intel_encoder
->base
);
1159 struct intel_sdvo_in_out_map in_out
;
1160 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1166 /* First, set the input mapping for the first input to our controlled
1167 * output. This is only correct if we're a single-input device, in
1168 * which case the first input is the output from the appropriate SDVO
1169 * channel on the motherboard. In a two-input device, the first input
1170 * will be SDVOB and the second SDVOC.
1172 in_out
.in0
= intel_sdvo
->attached_output
;
1175 intel_sdvo_set_value(intel_sdvo
,
1176 SDVO_CMD_SET_IN_OUT_MAP
,
1177 &in_out
, sizeof(in_out
));
1179 /* Set the output timings to the screen */
1180 if (!intel_sdvo_set_target_output(intel_sdvo
,
1181 intel_sdvo
->attached_output
))
1184 /* lvds has a special fixed output timing. */
1185 if (intel_sdvo
->is_lvds
)
1186 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1187 intel_sdvo
->sdvo_lvds_fixed_mode
);
1189 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1190 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1191 DRM_INFO("Setting output timings on %s failed\n",
1192 SDVO_NAME(intel_sdvo
));
1194 /* Set the input timing to the screen. Assume always input 0. */
1195 if (!intel_sdvo_set_target_input(intel_sdvo
))
1198 if (intel_sdvo
->has_hdmi_monitor
) {
1199 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1200 intel_sdvo_set_colorimetry(intel_sdvo
,
1201 SDVO_COLORIMETRY_RGB256
);
1202 intel_sdvo_set_avi_infoframe(intel_sdvo
, adjusted_mode
);
1204 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1206 if (intel_sdvo
->is_tv
&&
1207 !intel_sdvo_set_tv_format(intel_sdvo
))
1210 /* We have tried to get input timing in mode_fixup, and filled into
1213 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1214 if (intel_sdvo
->is_tv
|| intel_sdvo
->is_lvds
)
1215 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1216 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1217 DRM_INFO("Setting input timings on %s failed\n",
1218 SDVO_NAME(intel_sdvo
));
1220 switch (intel_crtc
->config
.pixel_multiplier
) {
1222 WARN(1, "unknown pixel mutlipler specified\n");
1223 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1224 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1225 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1227 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1230 /* Set the SDVO control regs. */
1231 if (INTEL_INFO(dev
)->gen
>= 4) {
1232 /* The real mode polarity is set by the SDVO commands, using
1233 * struct intel_sdvo_dtd. */
1234 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1235 if (!HAS_PCH_SPLIT(dev
) && intel_sdvo
->is_hdmi
)
1236 sdvox
|= intel_sdvo
->color_range
;
1237 if (INTEL_INFO(dev
)->gen
< 5)
1238 sdvox
|= SDVO_BORDER_ENABLE
;
1240 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1241 switch (intel_sdvo
->sdvo_reg
) {
1243 sdvox
&= SDVOB_PRESERVE_MASK
;
1246 sdvox
&= SDVOC_PRESERVE_MASK
;
1249 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1252 if (INTEL_PCH_TYPE(dev
) >= PCH_CPT
)
1253 sdvox
|= SDVO_PIPE_SEL_CPT(intel_crtc
->pipe
);
1255 sdvox
|= SDVO_PIPE_SEL(intel_crtc
->pipe
);
1257 if (intel_sdvo
->has_hdmi_audio
)
1258 sdvox
|= SDVO_AUDIO_ENABLE
;
1260 if (INTEL_INFO(dev
)->gen
>= 4) {
1261 /* done in crtc_mode_set as the dpll_md reg must be written early */
1262 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1263 /* done in crtc_mode_set as it lives inside the dpll register */
1265 sdvox
|= (intel_crtc
->config
.pixel_multiplier
- 1)
1266 << SDVO_PORT_MULTIPLY_SHIFT
;
1269 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1270 INTEL_INFO(dev
)->gen
< 5)
1271 sdvox
|= SDVO_STALL_SELECT
;
1272 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1275 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1277 struct intel_sdvo_connector
*intel_sdvo_connector
=
1278 to_intel_sdvo_connector(&connector
->base
);
1279 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(&connector
->base
);
1280 u16 active_outputs
= 0;
1282 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1284 if (active_outputs
& intel_sdvo_connector
->output_flag
)
1290 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1293 struct drm_device
*dev
= encoder
->base
.dev
;
1294 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1295 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1296 u16 active_outputs
= 0;
1299 tmp
= I915_READ(intel_sdvo
->sdvo_reg
);
1300 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1302 if (!(tmp
& SDVO_ENABLE
) && (active_outputs
== 0))
1305 if (HAS_PCH_CPT(dev
))
1306 *pipe
= PORT_TO_PIPE_CPT(tmp
);
1308 *pipe
= PORT_TO_PIPE(tmp
);
1313 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1314 struct intel_crtc_config
*pipe_config
)
1316 struct drm_device
*dev
= encoder
->base
.dev
;
1317 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1318 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1319 struct intel_sdvo_dtd dtd
;
1320 int encoder_pixel_multiplier
= 0;
1321 u32 flags
= 0, sdvox
;
1325 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1327 /* Some sdvo encoders are not spec compliant and don't
1328 * implement the mandatory get_timings function. */
1329 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1330 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1332 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1333 flags
|= DRM_MODE_FLAG_PHSYNC
;
1335 flags
|= DRM_MODE_FLAG_NHSYNC
;
1337 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1338 flags
|= DRM_MODE_FLAG_PVSYNC
;
1340 flags
|= DRM_MODE_FLAG_NVSYNC
;
1343 pipe_config
->adjusted_mode
.flags
|= flags
;
1345 if (IS_I915G(dev
) || IS_I915GM(dev
)) {
1346 sdvox
= I915_READ(intel_sdvo
->sdvo_reg
);
1347 pipe_config
->pixel_multiplier
=
1348 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1349 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1352 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1353 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
, &val
, 1);
1355 case SDVO_CLOCK_RATE_MULT_1X
:
1356 encoder_pixel_multiplier
= 1;
1358 case SDVO_CLOCK_RATE_MULT_2X
:
1359 encoder_pixel_multiplier
= 2;
1361 case SDVO_CLOCK_RATE_MULT_4X
:
1362 encoder_pixel_multiplier
= 4;
1365 WARN(encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1366 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1367 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1370 static void intel_disable_sdvo(struct intel_encoder
*encoder
)
1372 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
1373 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1376 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1378 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1381 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1382 if ((temp
& SDVO_ENABLE
) != 0) {
1383 /* HW workaround for IBX, we need to move the port to
1384 * transcoder A before disabling it. */
1385 if (HAS_PCH_IBX(encoder
->base
.dev
)) {
1386 struct drm_crtc
*crtc
= encoder
->base
.crtc
;
1387 int pipe
= crtc
? to_intel_crtc(crtc
)->pipe
: -1;
1389 if (temp
& SDVO_PIPE_B_SELECT
) {
1390 temp
&= ~SDVO_PIPE_B_SELECT
;
1391 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1392 POSTING_READ(intel_sdvo
->sdvo_reg
);
1394 /* Again we need to write this twice. */
1395 I915_WRITE(intel_sdvo
->sdvo_reg
, temp
);
1396 POSTING_READ(intel_sdvo
->sdvo_reg
);
1398 /* Transcoder selection bits only update
1399 * effectively on vblank. */
1401 intel_wait_for_vblank(encoder
->base
.dev
, pipe
);
1407 intel_sdvo_write_sdvox(intel_sdvo
, temp
& ~SDVO_ENABLE
);
1411 static void intel_enable_sdvo(struct intel_encoder
*encoder
)
1413 struct drm_device
*dev
= encoder
->base
.dev
;
1414 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1415 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1416 struct intel_crtc
*intel_crtc
= to_intel_crtc(encoder
->base
.crtc
);
1418 bool input1
, input2
;
1422 temp
= I915_READ(intel_sdvo
->sdvo_reg
);
1423 if ((temp
& SDVO_ENABLE
) == 0) {
1424 /* HW workaround for IBX, we need to move the port
1425 * to transcoder A before disabling it, so restore it here. */
1426 if (HAS_PCH_IBX(dev
))
1427 temp
|= SDVO_PIPE_SEL(intel_crtc
->pipe
);
1429 intel_sdvo_write_sdvox(intel_sdvo
, temp
| SDVO_ENABLE
);
1431 for (i
= 0; i
< 2; i
++)
1432 intel_wait_for_vblank(dev
, intel_crtc
->pipe
);
1434 status
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1435 /* Warn if the device reported failure to sync.
1436 * A lot of SDVO devices fail to notify of sync, but it's
1437 * a given it the status is a success, we succeeded.
1439 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1440 DRM_DEBUG_KMS("First %s output reported failure to "
1441 "sync\n", SDVO_NAME(intel_sdvo
));
1445 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1447 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1450 /* Special dpms function to support cloning between dvo/sdvo/crt. */
1451 static void intel_sdvo_dpms(struct drm_connector
*connector
, int mode
)
1453 struct drm_crtc
*crtc
;
1454 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1456 /* dvo supports only 2 dpms states. */
1457 if (mode
!= DRM_MODE_DPMS_ON
)
1458 mode
= DRM_MODE_DPMS_OFF
;
1460 if (mode
== connector
->dpms
)
1463 connector
->dpms
= mode
;
1465 /* Only need to change hw state when actually enabled */
1466 crtc
= intel_sdvo
->base
.base
.crtc
;
1468 intel_sdvo
->base
.connectors_active
= false;
1472 /* We set active outputs manually below in case pipe dpms doesn't change
1473 * due to cloning. */
1474 if (mode
!= DRM_MODE_DPMS_ON
) {
1475 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1477 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1479 intel_sdvo
->base
.connectors_active
= false;
1481 intel_crtc_update_dpms(crtc
);
1483 intel_sdvo
->base
.connectors_active
= true;
1485 intel_crtc_update_dpms(crtc
);
1488 intel_sdvo_set_encoder_power_state(intel_sdvo
, mode
);
1489 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo
->attached_output
);
1492 intel_modeset_check_state(connector
->dev
);
1495 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1496 struct drm_display_mode
*mode
)
1498 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1500 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1501 return MODE_NO_DBLESCAN
;
1503 if (intel_sdvo
->pixel_clock_min
> mode
->clock
)
1504 return MODE_CLOCK_LOW
;
1506 if (intel_sdvo
->pixel_clock_max
< mode
->clock
)
1507 return MODE_CLOCK_HIGH
;
1509 if (intel_sdvo
->is_lvds
) {
1510 if (mode
->hdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->hdisplay
)
1513 if (mode
->vdisplay
> intel_sdvo
->sdvo_lvds_fixed_mode
->vdisplay
)
1520 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1522 BUILD_BUG_ON(sizeof(*caps
) != 8);
1523 if (!intel_sdvo_get_value(intel_sdvo
,
1524 SDVO_CMD_GET_DEVICE_CAPS
,
1525 caps
, sizeof(*caps
)))
1528 DRM_DEBUG_KMS("SDVO capabilities:\n"
1531 " device_rev_id: %d\n"
1532 " sdvo_version_major: %d\n"
1533 " sdvo_version_minor: %d\n"
1534 " sdvo_inputs_mask: %d\n"
1535 " smooth_scaling: %d\n"
1536 " sharp_scaling: %d\n"
1538 " down_scaling: %d\n"
1539 " stall_support: %d\n"
1540 " output_flags: %d\n",
1543 caps
->device_rev_id
,
1544 caps
->sdvo_version_major
,
1545 caps
->sdvo_version_minor
,
1546 caps
->sdvo_inputs_mask
,
1547 caps
->smooth_scaling
,
1548 caps
->sharp_scaling
,
1551 caps
->stall_support
,
1552 caps
->output_flags
);
1557 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
1559 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
1562 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1564 if (IS_I945G(dev
) || IS_I945GM(dev
))
1567 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
1568 &hotplug
, sizeof(hotplug
)))
1574 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
1576 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(&encoder
->base
);
1578 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
1579 &intel_sdvo
->hotplug_active
, 2);
1583 intel_sdvo_multifunc_encoder(struct intel_sdvo
*intel_sdvo
)
1585 /* Is there more than one type of output? */
1586 return hweight16(intel_sdvo
->caps
.output_flags
) > 1;
1589 static struct edid
*
1590 intel_sdvo_get_edid(struct drm_connector
*connector
)
1592 struct intel_sdvo
*sdvo
= intel_attached_sdvo(connector
);
1593 return drm_get_edid(connector
, &sdvo
->ddc
);
1596 /* Mac mini hack -- use the same DDC as the analog connector */
1597 static struct edid
*
1598 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
1600 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1602 return drm_get_edid(connector
,
1603 intel_gmbus_get_adapter(dev_priv
,
1604 dev_priv
->vbt
.crt_ddc_pin
));
1607 static enum drm_connector_status
1608 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
1610 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1611 enum drm_connector_status status
;
1614 edid
= intel_sdvo_get_edid(connector
);
1616 if (edid
== NULL
&& intel_sdvo_multifunc_encoder(intel_sdvo
)) {
1617 u8 ddc
, saved_ddc
= intel_sdvo
->ddc_bus
;
1620 * Don't use the 1 as the argument of DDC bus switch to get
1621 * the EDID. It is used for SDVO SPD ROM.
1623 for (ddc
= intel_sdvo
->ddc_bus
>> 1; ddc
> 1; ddc
>>= 1) {
1624 intel_sdvo
->ddc_bus
= ddc
;
1625 edid
= intel_sdvo_get_edid(connector
);
1630 * If we found the EDID on the other bus,
1631 * assume that is the correct DDC bus.
1634 intel_sdvo
->ddc_bus
= saved_ddc
;
1638 * When there is no edid and no monitor is connected with VGA
1639 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1642 edid
= intel_sdvo_get_analog_edid(connector
);
1644 status
= connector_status_unknown
;
1646 /* DDC bus is shared, match EDID to connector type */
1647 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
) {
1648 status
= connector_status_connected
;
1649 if (intel_sdvo
->is_hdmi
) {
1650 intel_sdvo
->has_hdmi_monitor
= drm_detect_hdmi_monitor(edid
);
1651 intel_sdvo
->has_hdmi_audio
= drm_detect_monitor_audio(edid
);
1652 intel_sdvo
->rgb_quant_range_selectable
=
1653 drm_rgb_quant_range_selectable(edid
);
1656 status
= connector_status_disconnected
;
1660 if (status
== connector_status_connected
) {
1661 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1662 if (intel_sdvo_connector
->force_audio
!= HDMI_AUDIO_AUTO
)
1663 intel_sdvo
->has_hdmi_audio
= (intel_sdvo_connector
->force_audio
== HDMI_AUDIO_ON
);
1670 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
1673 bool monitor_is_digital
= !!(edid
->input
& DRM_EDID_INPUT_DIGITAL
);
1674 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
1676 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1677 connector_is_digital
, monitor_is_digital
);
1678 return connector_is_digital
== monitor_is_digital
;
1681 static enum drm_connector_status
1682 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
1685 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1686 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1687 enum drm_connector_status ret
;
1689 if (!intel_sdvo_get_value(intel_sdvo
,
1690 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
1692 return connector_status_unknown
;
1694 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1695 response
& 0xff, response
>> 8,
1696 intel_sdvo_connector
->output_flag
);
1699 return connector_status_disconnected
;
1701 intel_sdvo
->attached_output
= response
;
1703 intel_sdvo
->has_hdmi_monitor
= false;
1704 intel_sdvo
->has_hdmi_audio
= false;
1705 intel_sdvo
->rgb_quant_range_selectable
= false;
1707 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
1708 ret
= connector_status_disconnected
;
1709 else if (IS_TMDS(intel_sdvo_connector
))
1710 ret
= intel_sdvo_tmds_sink_detect(connector
);
1714 /* if we have an edid check it matches the connection */
1715 edid
= intel_sdvo_get_edid(connector
);
1717 edid
= intel_sdvo_get_analog_edid(connector
);
1719 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
1721 ret
= connector_status_connected
;
1723 ret
= connector_status_disconnected
;
1727 ret
= connector_status_connected
;
1730 /* May update encoder flag for like clock for SDVO TV, etc.*/
1731 if (ret
== connector_status_connected
) {
1732 intel_sdvo
->is_tv
= false;
1733 intel_sdvo
->is_lvds
= false;
1735 if (response
& SDVO_TV_MASK
)
1736 intel_sdvo
->is_tv
= true;
1737 if (response
& SDVO_LVDS_MASK
)
1738 intel_sdvo
->is_lvds
= intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
;
1744 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1748 /* set the bus switch and get the modes */
1749 edid
= intel_sdvo_get_edid(connector
);
1752 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1753 * link between analog and digital outputs. So, if the regular SDVO
1754 * DDC fails, check to see if the analog output is disconnected, in
1755 * which case we'll look there for the digital DDC data.
1758 edid
= intel_sdvo_get_analog_edid(connector
);
1761 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
1763 drm_mode_connector_update_edid_property(connector
, edid
);
1764 drm_add_edid_modes(connector
, edid
);
1772 * Set of SDVO TV modes.
1773 * Note! This is in reply order (see loop in get_tv_modes).
1774 * XXX: all 60Hz refresh?
1776 static const struct drm_display_mode sdvo_tv_modes
[] = {
1777 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1778 416, 0, 200, 201, 232, 233, 0,
1779 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1780 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1781 416, 0, 240, 241, 272, 273, 0,
1782 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1783 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1784 496, 0, 300, 301, 332, 333, 0,
1785 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1786 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1787 736, 0, 350, 351, 382, 383, 0,
1788 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1789 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1790 736, 0, 400, 401, 432, 433, 0,
1791 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1792 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1793 736, 0, 480, 481, 512, 513, 0,
1794 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1795 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1796 800, 0, 480, 481, 512, 513, 0,
1797 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1798 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1799 800, 0, 576, 577, 608, 609, 0,
1800 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1801 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1802 816, 0, 350, 351, 382, 383, 0,
1803 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1804 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1805 816, 0, 400, 401, 432, 433, 0,
1806 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1807 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1808 816, 0, 480, 481, 512, 513, 0,
1809 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1810 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1811 816, 0, 540, 541, 572, 573, 0,
1812 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1813 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1814 816, 0, 576, 577, 608, 609, 0,
1815 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1816 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1817 864, 0, 576, 577, 608, 609, 0,
1818 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1819 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1820 896, 0, 600, 601, 632, 633, 0,
1821 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1822 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1823 928, 0, 624, 625, 656, 657, 0,
1824 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1825 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1826 1016, 0, 766, 767, 798, 799, 0,
1827 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1828 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1829 1120, 0, 768, 769, 800, 801, 0,
1830 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1831 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1832 1376, 0, 1024, 1025, 1056, 1057, 0,
1833 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1836 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1838 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1839 struct intel_sdvo_sdtv_resolution_request tv_res
;
1840 uint32_t reply
= 0, format_map
= 0;
1843 /* Read the list of supported input resolutions for the selected TV
1846 format_map
= 1 << intel_sdvo
->tv_format_index
;
1847 memcpy(&tv_res
, &format_map
,
1848 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
1850 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo
->attached_output
))
1853 BUILD_BUG_ON(sizeof(tv_res
) != 3);
1854 if (!intel_sdvo_write_cmd(intel_sdvo
,
1855 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1856 &tv_res
, sizeof(tv_res
)))
1858 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
1861 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1862 if (reply
& (1 << i
)) {
1863 struct drm_display_mode
*nmode
;
1864 nmode
= drm_mode_duplicate(connector
->dev
,
1867 drm_mode_probed_add(connector
, nmode
);
1871 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1873 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1874 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1875 struct drm_display_mode
*newmode
;
1878 * Attempt to get the mode list from DDC.
1879 * Assume that the preferred modes are
1880 * arranged in priority order.
1882 intel_ddc_get_modes(connector
, intel_sdvo
->i2c
);
1883 if (list_empty(&connector
->probed_modes
) == false)
1886 /* Fetch modes from VBT */
1887 if (dev_priv
->vbt
.sdvo_lvds_vbt_mode
!= NULL
) {
1888 newmode
= drm_mode_duplicate(connector
->dev
,
1889 dev_priv
->vbt
.sdvo_lvds_vbt_mode
);
1890 if (newmode
!= NULL
) {
1891 /* Guarantee the mode is preferred */
1892 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1893 DRM_MODE_TYPE_DRIVER
);
1894 drm_mode_probed_add(connector
, newmode
);
1899 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1900 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1901 intel_sdvo
->sdvo_lvds_fixed_mode
=
1902 drm_mode_duplicate(connector
->dev
, newmode
);
1904 intel_sdvo
->is_lvds
= true;
1911 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1913 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1915 if (IS_TV(intel_sdvo_connector
))
1916 intel_sdvo_get_tv_modes(connector
);
1917 else if (IS_LVDS(intel_sdvo_connector
))
1918 intel_sdvo_get_lvds_modes(connector
);
1920 intel_sdvo_get_ddc_modes(connector
);
1922 return !list_empty(&connector
->probed_modes
);
1926 intel_sdvo_destroy_enhance_property(struct drm_connector
*connector
)
1928 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1929 struct drm_device
*dev
= connector
->dev
;
1931 if (intel_sdvo_connector
->left
)
1932 drm_property_destroy(dev
, intel_sdvo_connector
->left
);
1933 if (intel_sdvo_connector
->right
)
1934 drm_property_destroy(dev
, intel_sdvo_connector
->right
);
1935 if (intel_sdvo_connector
->top
)
1936 drm_property_destroy(dev
, intel_sdvo_connector
->top
);
1937 if (intel_sdvo_connector
->bottom
)
1938 drm_property_destroy(dev
, intel_sdvo_connector
->bottom
);
1939 if (intel_sdvo_connector
->hpos
)
1940 drm_property_destroy(dev
, intel_sdvo_connector
->hpos
);
1941 if (intel_sdvo_connector
->vpos
)
1942 drm_property_destroy(dev
, intel_sdvo_connector
->vpos
);
1943 if (intel_sdvo_connector
->saturation
)
1944 drm_property_destroy(dev
, intel_sdvo_connector
->saturation
);
1945 if (intel_sdvo_connector
->contrast
)
1946 drm_property_destroy(dev
, intel_sdvo_connector
->contrast
);
1947 if (intel_sdvo_connector
->hue
)
1948 drm_property_destroy(dev
, intel_sdvo_connector
->hue
);
1949 if (intel_sdvo_connector
->sharpness
)
1950 drm_property_destroy(dev
, intel_sdvo_connector
->sharpness
);
1951 if (intel_sdvo_connector
->flicker_filter
)
1952 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter
);
1953 if (intel_sdvo_connector
->flicker_filter_2d
)
1954 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_2d
);
1955 if (intel_sdvo_connector
->flicker_filter_adaptive
)
1956 drm_property_destroy(dev
, intel_sdvo_connector
->flicker_filter_adaptive
);
1957 if (intel_sdvo_connector
->tv_luma_filter
)
1958 drm_property_destroy(dev
, intel_sdvo_connector
->tv_luma_filter
);
1959 if (intel_sdvo_connector
->tv_chroma_filter
)
1960 drm_property_destroy(dev
, intel_sdvo_connector
->tv_chroma_filter
);
1961 if (intel_sdvo_connector
->dot_crawl
)
1962 drm_property_destroy(dev
, intel_sdvo_connector
->dot_crawl
);
1963 if (intel_sdvo_connector
->brightness
)
1964 drm_property_destroy(dev
, intel_sdvo_connector
->brightness
);
1967 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1969 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
1971 if (intel_sdvo_connector
->tv_format
)
1972 drm_property_destroy(connector
->dev
,
1973 intel_sdvo_connector
->tv_format
);
1975 intel_sdvo_destroy_enhance_property(connector
);
1976 drm_sysfs_connector_remove(connector
);
1977 drm_connector_cleanup(connector
);
1978 kfree(intel_sdvo_connector
);
1981 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector
*connector
)
1983 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1985 bool has_audio
= false;
1987 if (!intel_sdvo
->is_hdmi
)
1990 edid
= intel_sdvo_get_edid(connector
);
1991 if (edid
!= NULL
&& edid
->input
& DRM_EDID_INPUT_DIGITAL
)
1992 has_audio
= drm_detect_monitor_audio(edid
);
1999 intel_sdvo_set_property(struct drm_connector
*connector
,
2000 struct drm_property
*property
,
2003 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
2004 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2005 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
2006 uint16_t temp_value
;
2010 ret
= drm_object_property_set_value(&connector
->base
, property
, val
);
2014 if (property
== dev_priv
->force_audio_property
) {
2018 if (i
== intel_sdvo_connector
->force_audio
)
2021 intel_sdvo_connector
->force_audio
= i
;
2023 if (i
== HDMI_AUDIO_AUTO
)
2024 has_audio
= intel_sdvo_detect_hdmi_audio(connector
);
2026 has_audio
= (i
== HDMI_AUDIO_ON
);
2028 if (has_audio
== intel_sdvo
->has_hdmi_audio
)
2031 intel_sdvo
->has_hdmi_audio
= has_audio
;
2035 if (property
== dev_priv
->broadcast_rgb_property
) {
2036 bool old_auto
= intel_sdvo
->color_range_auto
;
2037 uint32_t old_range
= intel_sdvo
->color_range
;
2040 case INTEL_BROADCAST_RGB_AUTO
:
2041 intel_sdvo
->color_range_auto
= true;
2043 case INTEL_BROADCAST_RGB_FULL
:
2044 intel_sdvo
->color_range_auto
= false;
2045 intel_sdvo
->color_range
= 0;
2047 case INTEL_BROADCAST_RGB_LIMITED
:
2048 intel_sdvo
->color_range_auto
= false;
2049 /* FIXME: this bit is only valid when using TMDS
2050 * encoding and 8 bit per color mode. */
2051 intel_sdvo
->color_range
= HDMI_COLOR_RANGE_16_235
;
2057 if (old_auto
== intel_sdvo
->color_range_auto
&&
2058 old_range
== intel_sdvo
->color_range
)
2064 #define CHECK_PROPERTY(name, NAME) \
2065 if (intel_sdvo_connector->name == property) { \
2066 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
2067 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
2068 cmd = SDVO_CMD_SET_##NAME; \
2069 intel_sdvo_connector->cur_##name = temp_value; \
2073 if (property
== intel_sdvo_connector
->tv_format
) {
2074 if (val
>= TV_FORMAT_NUM
)
2077 if (intel_sdvo
->tv_format_index
==
2078 intel_sdvo_connector
->tv_format_supported
[val
])
2081 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[val
];
2083 } else if (IS_TV_OR_LVDS(intel_sdvo_connector
)) {
2085 if (intel_sdvo_connector
->left
== property
) {
2086 drm_object_property_set_value(&connector
->base
,
2087 intel_sdvo_connector
->right
, val
);
2088 if (intel_sdvo_connector
->left_margin
== temp_value
)
2091 intel_sdvo_connector
->left_margin
= temp_value
;
2092 intel_sdvo_connector
->right_margin
= temp_value
;
2093 temp_value
= intel_sdvo_connector
->max_hscan
-
2094 intel_sdvo_connector
->left_margin
;
2095 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2097 } else if (intel_sdvo_connector
->right
== property
) {
2098 drm_object_property_set_value(&connector
->base
,
2099 intel_sdvo_connector
->left
, val
);
2100 if (intel_sdvo_connector
->right_margin
== temp_value
)
2103 intel_sdvo_connector
->left_margin
= temp_value
;
2104 intel_sdvo_connector
->right_margin
= temp_value
;
2105 temp_value
= intel_sdvo_connector
->max_hscan
-
2106 intel_sdvo_connector
->left_margin
;
2107 cmd
= SDVO_CMD_SET_OVERSCAN_H
;
2109 } else if (intel_sdvo_connector
->top
== property
) {
2110 drm_object_property_set_value(&connector
->base
,
2111 intel_sdvo_connector
->bottom
, val
);
2112 if (intel_sdvo_connector
->top_margin
== temp_value
)
2115 intel_sdvo_connector
->top_margin
= temp_value
;
2116 intel_sdvo_connector
->bottom_margin
= temp_value
;
2117 temp_value
= intel_sdvo_connector
->max_vscan
-
2118 intel_sdvo_connector
->top_margin
;
2119 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2121 } else if (intel_sdvo_connector
->bottom
== property
) {
2122 drm_object_property_set_value(&connector
->base
,
2123 intel_sdvo_connector
->top
, val
);
2124 if (intel_sdvo_connector
->bottom_margin
== temp_value
)
2127 intel_sdvo_connector
->top_margin
= temp_value
;
2128 intel_sdvo_connector
->bottom_margin
= temp_value
;
2129 temp_value
= intel_sdvo_connector
->max_vscan
-
2130 intel_sdvo_connector
->top_margin
;
2131 cmd
= SDVO_CMD_SET_OVERSCAN_V
;
2134 CHECK_PROPERTY(hpos
, HPOS
)
2135 CHECK_PROPERTY(vpos
, VPOS
)
2136 CHECK_PROPERTY(saturation
, SATURATION
)
2137 CHECK_PROPERTY(contrast
, CONTRAST
)
2138 CHECK_PROPERTY(hue
, HUE
)
2139 CHECK_PROPERTY(brightness
, BRIGHTNESS
)
2140 CHECK_PROPERTY(sharpness
, SHARPNESS
)
2141 CHECK_PROPERTY(flicker_filter
, FLICKER_FILTER
)
2142 CHECK_PROPERTY(flicker_filter_2d
, FLICKER_FILTER_2D
)
2143 CHECK_PROPERTY(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
)
2144 CHECK_PROPERTY(tv_chroma_filter
, TV_CHROMA_FILTER
)
2145 CHECK_PROPERTY(tv_luma_filter
, TV_LUMA_FILTER
)
2146 CHECK_PROPERTY(dot_crawl
, DOT_CRAWL
)
2149 return -EINVAL
; /* unknown property */
2152 if (!intel_sdvo_set_value(intel_sdvo
, cmd
, &temp_value
, 2))
2157 if (intel_sdvo
->base
.base
.crtc
)
2158 intel_crtc_restore_mode(intel_sdvo
->base
.base
.crtc
);
2161 #undef CHECK_PROPERTY
2164 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2165 .dpms
= intel_sdvo_dpms
,
2166 .detect
= intel_sdvo_detect
,
2167 .fill_modes
= drm_helper_probe_single_connector_modes
,
2168 .set_property
= intel_sdvo_set_property
,
2169 .destroy
= intel_sdvo_destroy
,
2172 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2173 .get_modes
= intel_sdvo_get_modes
,
2174 .mode_valid
= intel_sdvo_mode_valid
,
2175 .best_encoder
= intel_best_encoder
,
2178 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
2180 struct intel_sdvo
*intel_sdvo
= to_intel_sdvo(encoder
);
2182 if (intel_sdvo
->sdvo_lvds_fixed_mode
!= NULL
)
2183 drm_mode_destroy(encoder
->dev
,
2184 intel_sdvo
->sdvo_lvds_fixed_mode
);
2186 i2c_del_adapter(&intel_sdvo
->ddc
);
2187 intel_encoder_destroy(encoder
);
2190 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2191 .destroy
= intel_sdvo_enc_destroy
,
2195 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
)
2198 unsigned int num_bits
;
2200 /* Make a mask of outputs less than or equal to our own priority in the
2203 switch (sdvo
->controlled_output
) {
2204 case SDVO_OUTPUT_LVDS1
:
2205 mask
|= SDVO_OUTPUT_LVDS1
;
2206 case SDVO_OUTPUT_LVDS0
:
2207 mask
|= SDVO_OUTPUT_LVDS0
;
2208 case SDVO_OUTPUT_TMDS1
:
2209 mask
|= SDVO_OUTPUT_TMDS1
;
2210 case SDVO_OUTPUT_TMDS0
:
2211 mask
|= SDVO_OUTPUT_TMDS0
;
2212 case SDVO_OUTPUT_RGB1
:
2213 mask
|= SDVO_OUTPUT_RGB1
;
2214 case SDVO_OUTPUT_RGB0
:
2215 mask
|= SDVO_OUTPUT_RGB0
;
2219 /* Count bits to find what number we are in the priority list. */
2220 mask
&= sdvo
->caps
.output_flags
;
2221 num_bits
= hweight16(mask
);
2222 /* If more than 3 outputs, default to DDC bus 3 for now. */
2226 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2227 sdvo
->ddc_bus
= 1 << num_bits
;
2231 * Choose the appropriate DDC bus for control bus switch command for this
2232 * SDVO output based on the controlled output.
2234 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2235 * outputs, then LVDS outputs.
2238 intel_sdvo_select_ddc_bus(struct drm_i915_private
*dev_priv
,
2239 struct intel_sdvo
*sdvo
, u32 reg
)
2241 struct sdvo_device_mapping
*mapping
;
2244 mapping
= &(dev_priv
->sdvo_mappings
[0]);
2246 mapping
= &(dev_priv
->sdvo_mappings
[1]);
2248 if (mapping
->initialized
)
2249 sdvo
->ddc_bus
= 1 << ((mapping
->ddc_pin
& 0xf0) >> 4);
2251 intel_sdvo_guess_ddc_bus(sdvo
);
2255 intel_sdvo_select_i2c_bus(struct drm_i915_private
*dev_priv
,
2256 struct intel_sdvo
*sdvo
, u32 reg
)
2258 struct sdvo_device_mapping
*mapping
;
2262 mapping
= &dev_priv
->sdvo_mappings
[0];
2264 mapping
= &dev_priv
->sdvo_mappings
[1];
2266 if (mapping
->initialized
&& intel_gmbus_is_port_valid(mapping
->i2c_pin
))
2267 pin
= mapping
->i2c_pin
;
2269 pin
= GMBUS_PORT_DPB
;
2271 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2273 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2274 * our code totally fails once we start using gmbus. Hence fall back to
2275 * bit banging for now. */
2276 intel_gmbus_force_bit(sdvo
->i2c
, true);
2279 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2281 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2283 intel_gmbus_force_bit(sdvo
->i2c
, false);
2287 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
, int device
)
2289 return intel_sdvo_check_supp_encode(intel_sdvo
);
2293 intel_sdvo_get_slave_addr(struct drm_device
*dev
, struct intel_sdvo
*sdvo
)
2295 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2296 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2298 if (sdvo
->is_sdvob
) {
2299 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2300 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2302 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2303 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2306 /* If the BIOS described our SDVO device, take advantage of it. */
2307 if (my_mapping
->slave_addr
)
2308 return my_mapping
->slave_addr
;
2310 /* If the BIOS only described a different SDVO device, use the
2311 * address that it isn't using.
2313 if (other_mapping
->slave_addr
) {
2314 if (other_mapping
->slave_addr
== 0x70)
2320 /* No SDVO device info is found for another DVO port,
2321 * so use mapping assumption we had before BIOS parsing.
2330 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2331 struct intel_sdvo
*encoder
)
2333 drm_connector_init(encoder
->base
.base
.dev
,
2334 &connector
->base
.base
,
2335 &intel_sdvo_connector_funcs
,
2336 connector
->base
.base
.connector_type
);
2338 drm_connector_helper_add(&connector
->base
.base
,
2339 &intel_sdvo_connector_helper_funcs
);
2341 connector
->base
.base
.interlace_allowed
= 1;
2342 connector
->base
.base
.doublescan_allowed
= 0;
2343 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2344 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2346 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2347 drm_sysfs_connector_add(&connector
->base
.base
);
2351 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2352 struct intel_sdvo_connector
*connector
)
2354 struct drm_device
*dev
= connector
->base
.base
.dev
;
2356 intel_attach_force_audio_property(&connector
->base
.base
);
2357 if (INTEL_INFO(dev
)->gen
>= 4 && IS_MOBILE(dev
)) {
2358 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2359 intel_sdvo
->color_range_auto
= true;
2364 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, int device
)
2366 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2367 struct drm_connector
*connector
;
2368 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2369 struct intel_connector
*intel_connector
;
2370 struct intel_sdvo_connector
*intel_sdvo_connector
;
2372 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2373 if (!intel_sdvo_connector
)
2377 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS0
;
2378 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS0
;
2379 } else if (device
== 1) {
2380 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_TMDS1
;
2381 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_TMDS1
;
2384 intel_connector
= &intel_sdvo_connector
->base
;
2385 connector
= &intel_connector
->base
;
2386 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2387 intel_sdvo_connector
->output_flag
) {
2388 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2389 /* Some SDVO devices have one-shot hotplug interrupts.
2390 * Ensure that they get re-enabled when an interrupt happens.
2392 intel_encoder
->hot_plug
= intel_sdvo_enable_hotplug
;
2393 intel_sdvo_enable_hotplug(intel_encoder
);
2395 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2397 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2398 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2400 if (intel_sdvo_is_hdmi_connector(intel_sdvo
, device
)) {
2401 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2402 intel_sdvo
->is_hdmi
= true;
2405 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2406 if (intel_sdvo
->is_hdmi
)
2407 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2413 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, int type
)
2415 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2416 struct drm_connector
*connector
;
2417 struct intel_connector
*intel_connector
;
2418 struct intel_sdvo_connector
*intel_sdvo_connector
;
2420 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2421 if (!intel_sdvo_connector
)
2424 intel_connector
= &intel_sdvo_connector
->base
;
2425 connector
= &intel_connector
->base
;
2426 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2427 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2429 intel_sdvo
->controlled_output
|= type
;
2430 intel_sdvo_connector
->output_flag
= type
;
2432 intel_sdvo
->is_tv
= true;
2434 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2436 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2439 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2445 intel_sdvo_destroy(connector
);
2450 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, int device
)
2452 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2453 struct drm_connector
*connector
;
2454 struct intel_connector
*intel_connector
;
2455 struct intel_sdvo_connector
*intel_sdvo_connector
;
2457 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2458 if (!intel_sdvo_connector
)
2461 intel_connector
= &intel_sdvo_connector
->base
;
2462 connector
= &intel_connector
->base
;
2463 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2464 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2465 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2468 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB0
;
2469 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB0
;
2470 } else if (device
== 1) {
2471 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_RGB1
;
2472 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_RGB1
;
2475 intel_sdvo_connector_init(intel_sdvo_connector
,
2481 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, int device
)
2483 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2484 struct drm_connector
*connector
;
2485 struct intel_connector
*intel_connector
;
2486 struct intel_sdvo_connector
*intel_sdvo_connector
;
2488 intel_sdvo_connector
= kzalloc(sizeof(struct intel_sdvo_connector
), GFP_KERNEL
);
2489 if (!intel_sdvo_connector
)
2492 intel_connector
= &intel_sdvo_connector
->base
;
2493 connector
= &intel_connector
->base
;
2494 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2495 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2498 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS0
;
2499 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS0
;
2500 } else if (device
== 1) {
2501 intel_sdvo
->controlled_output
|= SDVO_OUTPUT_LVDS1
;
2502 intel_sdvo_connector
->output_flag
= SDVO_OUTPUT_LVDS1
;
2505 intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
);
2506 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2512 intel_sdvo_destroy(connector
);
2517 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
, uint16_t flags
)
2519 intel_sdvo
->is_tv
= false;
2520 intel_sdvo
->is_lvds
= false;
2522 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2524 if (flags
& SDVO_OUTPUT_TMDS0
)
2525 if (!intel_sdvo_dvi_init(intel_sdvo
, 0))
2528 if ((flags
& SDVO_TMDS_MASK
) == SDVO_TMDS_MASK
)
2529 if (!intel_sdvo_dvi_init(intel_sdvo
, 1))
2532 /* TV has no XXX1 function block */
2533 if (flags
& SDVO_OUTPUT_SVID0
)
2534 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_SVID0
))
2537 if (flags
& SDVO_OUTPUT_CVBS0
)
2538 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_CVBS0
))
2541 if (flags
& SDVO_OUTPUT_YPRPB0
)
2542 if (!intel_sdvo_tv_init(intel_sdvo
, SDVO_OUTPUT_YPRPB0
))
2545 if (flags
& SDVO_OUTPUT_RGB0
)
2546 if (!intel_sdvo_analog_init(intel_sdvo
, 0))
2549 if ((flags
& SDVO_RGB_MASK
) == SDVO_RGB_MASK
)
2550 if (!intel_sdvo_analog_init(intel_sdvo
, 1))
2553 if (flags
& SDVO_OUTPUT_LVDS0
)
2554 if (!intel_sdvo_lvds_init(intel_sdvo
, 0))
2557 if ((flags
& SDVO_LVDS_MASK
) == SDVO_LVDS_MASK
)
2558 if (!intel_sdvo_lvds_init(intel_sdvo
, 1))
2561 if ((flags
& SDVO_OUTPUT_MASK
) == 0) {
2562 unsigned char bytes
[2];
2564 intel_sdvo
->controlled_output
= 0;
2565 memcpy(bytes
, &intel_sdvo
->caps
.output_flags
, 2);
2566 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2567 SDVO_NAME(intel_sdvo
),
2568 bytes
[0], bytes
[1]);
2571 intel_sdvo
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
2576 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
2578 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2579 struct drm_connector
*connector
, *tmp
;
2581 list_for_each_entry_safe(connector
, tmp
,
2582 &dev
->mode_config
.connector_list
, head
) {
2583 if (intel_attached_encoder(connector
) == &intel_sdvo
->base
)
2584 intel_sdvo_destroy(connector
);
2588 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
2589 struct intel_sdvo_connector
*intel_sdvo_connector
,
2592 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2593 struct intel_sdvo_tv_format format
;
2594 uint32_t format_map
, i
;
2596 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
2599 BUILD_BUG_ON(sizeof(format
) != 6);
2600 if (!intel_sdvo_get_value(intel_sdvo
,
2601 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
2602 &format
, sizeof(format
)))
2605 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
2607 if (format_map
== 0)
2610 intel_sdvo_connector
->format_supported_num
= 0;
2611 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2612 if (format_map
& (1 << i
))
2613 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
2616 intel_sdvo_connector
->tv_format
=
2617 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
2618 "mode", intel_sdvo_connector
->format_supported_num
);
2619 if (!intel_sdvo_connector
->tv_format
)
2622 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2623 drm_property_add_enum(
2624 intel_sdvo_connector
->tv_format
, i
,
2625 i
, tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
2627 intel_sdvo
->tv_format_index
= intel_sdvo_connector
->tv_format_supported
[0];
2628 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
2629 intel_sdvo_connector
->tv_format
, 0);
2634 #define ENHANCEMENT(name, NAME) do { \
2635 if (enhancements.name) { \
2636 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2637 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2639 intel_sdvo_connector->max_##name = data_value[0]; \
2640 intel_sdvo_connector->cur_##name = response; \
2641 intel_sdvo_connector->name = \
2642 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2643 if (!intel_sdvo_connector->name) return false; \
2644 drm_object_attach_property(&connector->base, \
2645 intel_sdvo_connector->name, \
2646 intel_sdvo_connector->cur_##name); \
2647 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2648 data_value[0], data_value[1], response); \
2653 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
2654 struct intel_sdvo_connector
*intel_sdvo_connector
,
2655 struct intel_sdvo_enhancements_reply enhancements
)
2657 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2658 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2659 uint16_t response
, data_value
[2];
2661 /* when horizontal overscan is supported, Add the left/right property */
2662 if (enhancements
.overscan_h
) {
2663 if (!intel_sdvo_get_value(intel_sdvo
,
2664 SDVO_CMD_GET_MAX_OVERSCAN_H
,
2668 if (!intel_sdvo_get_value(intel_sdvo
,
2669 SDVO_CMD_GET_OVERSCAN_H
,
2673 intel_sdvo_connector
->max_hscan
= data_value
[0];
2674 intel_sdvo_connector
->left_margin
= data_value
[0] - response
;
2675 intel_sdvo_connector
->right_margin
= intel_sdvo_connector
->left_margin
;
2676 intel_sdvo_connector
->left
=
2677 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
2678 if (!intel_sdvo_connector
->left
)
2681 drm_object_attach_property(&connector
->base
,
2682 intel_sdvo_connector
->left
,
2683 intel_sdvo_connector
->left_margin
);
2685 intel_sdvo_connector
->right
=
2686 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
2687 if (!intel_sdvo_connector
->right
)
2690 drm_object_attach_property(&connector
->base
,
2691 intel_sdvo_connector
->right
,
2692 intel_sdvo_connector
->right_margin
);
2693 DRM_DEBUG_KMS("h_overscan: max %d, "
2694 "default %d, current %d\n",
2695 data_value
[0], data_value
[1], response
);
2698 if (enhancements
.overscan_v
) {
2699 if (!intel_sdvo_get_value(intel_sdvo
,
2700 SDVO_CMD_GET_MAX_OVERSCAN_V
,
2704 if (!intel_sdvo_get_value(intel_sdvo
,
2705 SDVO_CMD_GET_OVERSCAN_V
,
2709 intel_sdvo_connector
->max_vscan
= data_value
[0];
2710 intel_sdvo_connector
->top_margin
= data_value
[0] - response
;
2711 intel_sdvo_connector
->bottom_margin
= intel_sdvo_connector
->top_margin
;
2712 intel_sdvo_connector
->top
=
2713 drm_property_create_range(dev
, 0,
2714 "top_margin", 0, data_value
[0]);
2715 if (!intel_sdvo_connector
->top
)
2718 drm_object_attach_property(&connector
->base
,
2719 intel_sdvo_connector
->top
,
2720 intel_sdvo_connector
->top_margin
);
2722 intel_sdvo_connector
->bottom
=
2723 drm_property_create_range(dev
, 0,
2724 "bottom_margin", 0, data_value
[0]);
2725 if (!intel_sdvo_connector
->bottom
)
2728 drm_object_attach_property(&connector
->base
,
2729 intel_sdvo_connector
->bottom
,
2730 intel_sdvo_connector
->bottom_margin
);
2731 DRM_DEBUG_KMS("v_overscan: max %d, "
2732 "default %d, current %d\n",
2733 data_value
[0], data_value
[1], response
);
2736 ENHANCEMENT(hpos
, HPOS
);
2737 ENHANCEMENT(vpos
, VPOS
);
2738 ENHANCEMENT(saturation
, SATURATION
);
2739 ENHANCEMENT(contrast
, CONTRAST
);
2740 ENHANCEMENT(hue
, HUE
);
2741 ENHANCEMENT(sharpness
, SHARPNESS
);
2742 ENHANCEMENT(brightness
, BRIGHTNESS
);
2743 ENHANCEMENT(flicker_filter
, FLICKER_FILTER
);
2744 ENHANCEMENT(flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
2745 ENHANCEMENT(flicker_filter_2d
, FLICKER_FILTER_2D
);
2746 ENHANCEMENT(tv_chroma_filter
, TV_CHROMA_FILTER
);
2747 ENHANCEMENT(tv_luma_filter
, TV_LUMA_FILTER
);
2749 if (enhancements
.dot_crawl
) {
2750 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
2753 intel_sdvo_connector
->max_dot_crawl
= 1;
2754 intel_sdvo_connector
->cur_dot_crawl
= response
& 0x1;
2755 intel_sdvo_connector
->dot_crawl
=
2756 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
2757 if (!intel_sdvo_connector
->dot_crawl
)
2760 drm_object_attach_property(&connector
->base
,
2761 intel_sdvo_connector
->dot_crawl
,
2762 intel_sdvo_connector
->cur_dot_crawl
);
2763 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
2770 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
2771 struct intel_sdvo_connector
*intel_sdvo_connector
,
2772 struct intel_sdvo_enhancements_reply enhancements
)
2774 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
2775 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
2776 uint16_t response
, data_value
[2];
2778 ENHANCEMENT(brightness
, BRIGHTNESS
);
2784 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
2785 struct intel_sdvo_connector
*intel_sdvo_connector
)
2788 struct intel_sdvo_enhancements_reply reply
;
2792 BUILD_BUG_ON(sizeof(enhancements
) != 2);
2794 enhancements
.response
= 0;
2795 intel_sdvo_get_value(intel_sdvo
,
2796 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
2797 &enhancements
, sizeof(enhancements
));
2798 if (enhancements
.response
== 0) {
2799 DRM_DEBUG_KMS("No enhancement is supported\n");
2803 if (IS_TV(intel_sdvo_connector
))
2804 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2805 else if (IS_LVDS(intel_sdvo_connector
))
2806 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
2811 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
2812 struct i2c_msg
*msgs
,
2815 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2817 if (!intel_sdvo_set_control_bus_switch(sdvo
, sdvo
->ddc_bus
))
2820 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
2823 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
2825 struct intel_sdvo
*sdvo
= adapter
->algo_data
;
2826 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
2829 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
2830 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
2831 .functionality
= intel_sdvo_ddc_proxy_func
2835 intel_sdvo_init_ddc_proxy(struct intel_sdvo
*sdvo
,
2836 struct drm_device
*dev
)
2838 sdvo
->ddc
.owner
= THIS_MODULE
;
2839 sdvo
->ddc
.class = I2C_CLASS_DDC
;
2840 snprintf(sdvo
->ddc
.name
, I2C_NAME_SIZE
, "SDVO DDC proxy");
2841 sdvo
->ddc
.dev
.parent
= &dev
->pdev
->dev
;
2842 sdvo
->ddc
.algo_data
= sdvo
;
2843 sdvo
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
2845 return i2c_add_adapter(&sdvo
->ddc
) == 0;
2848 bool intel_sdvo_init(struct drm_device
*dev
, uint32_t sdvo_reg
, bool is_sdvob
)
2850 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2851 struct intel_encoder
*intel_encoder
;
2852 struct intel_sdvo
*intel_sdvo
;
2854 intel_sdvo
= kzalloc(sizeof(struct intel_sdvo
), GFP_KERNEL
);
2858 intel_sdvo
->sdvo_reg
= sdvo_reg
;
2859 intel_sdvo
->is_sdvob
= is_sdvob
;
2860 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(dev
, intel_sdvo
) >> 1;
2861 intel_sdvo_select_i2c_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2862 if (!intel_sdvo_init_ddc_proxy(intel_sdvo
, dev
))
2865 /* encoder type will be decided later */
2866 intel_encoder
= &intel_sdvo
->base
;
2867 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
2868 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_sdvo_enc_funcs
, 0);
2870 /* Read the regs to test if we can talk to the device */
2871 for (i
= 0; i
< 0x40; i
++) {
2874 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
2875 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2876 SDVO_NAME(intel_sdvo
));
2881 /* Only enable the hotplug irq if we need it, to work around noisy
2884 if (intel_sdvo
->hotplug_active
)
2885 intel_encoder
->hpd_pin
= HPD_SDVO_B
? HPD_SDVO_B
: HPD_SDVO_C
;
2887 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
2888 intel_encoder
->disable
= intel_disable_sdvo
;
2889 intel_encoder
->mode_set
= intel_sdvo_mode_set
;
2890 intel_encoder
->enable
= intel_enable_sdvo
;
2891 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
2892 intel_encoder
->get_config
= intel_sdvo_get_config
;
2894 /* In default case sdvo lvds is false */
2895 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
2898 if (intel_sdvo_output_setup(intel_sdvo
,
2899 intel_sdvo
->caps
.output_flags
) != true) {
2900 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2901 SDVO_NAME(intel_sdvo
));
2902 /* Output_setup can leave behind connectors! */
2907 * Cloning SDVO with anything is often impossible, since the SDVO
2908 * encoder can request a special input timing mode. And even if that's
2909 * not the case we have evidence that cloning a plain unscaled mode with
2910 * VGA doesn't really work. Furthermore the cloning flags are way too
2911 * simplistic anyway to express such constraints, so just give up on
2912 * cloning for SDVO encoders.
2914 intel_sdvo
->base
.cloneable
= false;
2916 intel_sdvo_select_ddc_bus(dev_priv
, intel_sdvo
, sdvo_reg
);
2918 /* Set the input timing to the screen. Assume always input 0. */
2919 if (!intel_sdvo_set_target_input(intel_sdvo
))
2922 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
2923 &intel_sdvo
->pixel_clock_min
,
2924 &intel_sdvo
->pixel_clock_max
))
2927 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2928 "clock range %dMHz - %dMHz, "
2929 "input 1: %c, input 2: %c, "
2930 "output 1: %c, output 2: %c\n",
2931 SDVO_NAME(intel_sdvo
),
2932 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
2933 intel_sdvo
->caps
.device_rev_id
,
2934 intel_sdvo
->pixel_clock_min
/ 1000,
2935 intel_sdvo
->pixel_clock_max
/ 1000,
2936 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2937 (intel_sdvo
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2938 /* check currently supported outputs */
2939 intel_sdvo
->caps
.output_flags
&
2940 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2941 intel_sdvo
->caps
.output_flags
&
2942 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2946 intel_sdvo_output_cleanup(intel_sdvo
);
2949 drm_encoder_cleanup(&intel_encoder
->base
);
2950 i2c_del_adapter(&intel_sdvo
->ddc
);
2952 intel_sdvo_unselect_i2c_bus(intel_sdvo
);