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drm/i915/sdvo: clean up connectors on intel_sdvo_init() failures
[deliverable/linux.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68 struct intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 uint32_t sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /*
97 * Hotplug activation bits for this device
98 */
99 uint16_t hotplug_active;
100
101 /**
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
119 /* This is for current tv format name */
120 int tv_format_index;
121
122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
128
129 /**
130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
132 */
133 bool is_lvds;
134
135 /**
136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
140 /* DDC bus used by this SDVO encoder */
141 uint8_t ddc_bus;
142
143 /*
144 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
145 */
146 uint8_t dtd_sdvo_flags;
147 };
148
149 struct intel_sdvo_connector {
150 struct intel_connector base;
151
152 /* Mark the type of connector */
153 uint16_t output_flag;
154
155 enum hdmi_force_audio force_audio;
156
157 /* This contains all current supported TV format */
158 u8 tv_format_supported[TV_FORMAT_NUM];
159 int format_supported_num;
160 struct drm_property *tv_format;
161
162 /* add the property for the SDVO-TV */
163 struct drm_property *left;
164 struct drm_property *right;
165 struct drm_property *top;
166 struct drm_property *bottom;
167 struct drm_property *hpos;
168 struct drm_property *vpos;
169 struct drm_property *contrast;
170 struct drm_property *saturation;
171 struct drm_property *hue;
172 struct drm_property *sharpness;
173 struct drm_property *flicker_filter;
174 struct drm_property *flicker_filter_adaptive;
175 struct drm_property *flicker_filter_2d;
176 struct drm_property *tv_chroma_filter;
177 struct drm_property *tv_luma_filter;
178 struct drm_property *dot_crawl;
179
180 /* add the property for the SDVO-TV/LVDS */
181 struct drm_property *brightness;
182
183 /* Add variable to record current setting for the above property */
184 u32 left_margin, right_margin, top_margin, bottom_margin;
185
186 /* this is to get the range of margin.*/
187 u32 max_hscan, max_vscan;
188 u32 max_hpos, cur_hpos;
189 u32 max_vpos, cur_vpos;
190 u32 cur_brightness, max_brightness;
191 u32 cur_contrast, max_contrast;
192 u32 cur_saturation, max_saturation;
193 u32 cur_hue, max_hue;
194 u32 cur_sharpness, max_sharpness;
195 u32 cur_flicker_filter, max_flicker_filter;
196 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
197 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
198 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
199 u32 cur_tv_luma_filter, max_tv_luma_filter;
200 u32 cur_dot_crawl, max_dot_crawl;
201 };
202
203 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
204 {
205 return container_of(encoder, struct intel_sdvo, base.base);
206 }
207
208 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209 {
210 return container_of(intel_attached_encoder(connector),
211 struct intel_sdvo, base);
212 }
213
214 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215 {
216 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
217 }
218
219 static bool
220 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
221 static bool
222 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector,
224 int type);
225 static bool
226 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
227 struct intel_sdvo_connector *intel_sdvo_connector);
228
229 /**
230 * Writes the SDVOB or SDVOC with the given value, but always writes both
231 * SDVOB and SDVOC to work around apparent hardware issues (according to
232 * comments in the BIOS).
233 */
234 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
235 {
236 struct drm_device *dev = intel_sdvo->base.base.dev;
237 struct drm_i915_private *dev_priv = dev->dev_private;
238 u32 bval = val, cval = val;
239 int i;
240
241 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
242 I915_WRITE(intel_sdvo->sdvo_reg, val);
243 I915_READ(intel_sdvo->sdvo_reg);
244 return;
245 }
246
247 if (intel_sdvo->sdvo_reg == SDVOB) {
248 cval = I915_READ(SDVOC);
249 } else {
250 bval = I915_READ(SDVOB);
251 }
252 /*
253 * Write the registers twice for luck. Sometimes,
254 * writing them only once doesn't appear to 'stick'.
255 * The BIOS does this too. Yay, magic
256 */
257 for (i = 0; i < 2; i++)
258 {
259 I915_WRITE(SDVOB, bval);
260 I915_READ(SDVOB);
261 I915_WRITE(SDVOC, cval);
262 I915_READ(SDVOC);
263 }
264 }
265
266 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 {
268 struct i2c_msg msgs[] = {
269 {
270 .addr = intel_sdvo->slave_addr,
271 .flags = 0,
272 .len = 1,
273 .buf = &addr,
274 },
275 {
276 .addr = intel_sdvo->slave_addr,
277 .flags = I2C_M_RD,
278 .len = 1,
279 .buf = ch,
280 }
281 };
282 int ret;
283
284 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
285 return true;
286
287 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
288 return false;
289 }
290
291 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292 /** Mapping of command numbers to names, for debug output */
293 static const struct _sdvo_cmd_name {
294 u8 cmd;
295 const char *name;
296 } sdvo_cmd_names[] = {
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340
341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
386
387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
408 };
409
410 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
411
412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
413 const void *args, int args_len)
414 {
415 int i;
416
417 DRM_DEBUG_KMS("%s: W: %02X ",
418 SDVO_NAME(intel_sdvo), cmd);
419 for (i = 0; i < args_len; i++)
420 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
421 for (; i < 8; i++)
422 DRM_LOG_KMS(" ");
423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
424 if (cmd == sdvo_cmd_names[i].cmd) {
425 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
426 break;
427 }
428 }
429 if (i == ARRAY_SIZE(sdvo_cmd_names))
430 DRM_LOG_KMS("(%02X)", cmd);
431 DRM_LOG_KMS("\n");
432 }
433
434 static const char *cmd_status_names[] = {
435 "Power on",
436 "Success",
437 "Not supported",
438 "Invalid arg",
439 "Pending",
440 "Target not specified",
441 "Scaling not supported"
442 };
443
444 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
445 const void *args, int args_len)
446 {
447 u8 *buf, status;
448 struct i2c_msg *msgs;
449 int i, ret = true;
450
451 /* Would be simpler to allocate both in one go ? */
452 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
453 if (!buf)
454 return false;
455
456 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
457 if (!msgs) {
458 kfree(buf);
459 return false;
460 }
461
462 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
463
464 for (i = 0; i < args_len; i++) {
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2 *i;
469 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
470 buf[2*i + 1] = ((u8*)args)[i];
471 }
472 msgs[i].addr = intel_sdvo->slave_addr;
473 msgs[i].flags = 0;
474 msgs[i].len = 2;
475 msgs[i].buf = buf + 2*i;
476 buf[2*i + 0] = SDVO_I2C_OPCODE;
477 buf[2*i + 1] = cmd;
478
479 /* the following two are to read the response */
480 status = SDVO_I2C_CMD_STATUS;
481 msgs[i+1].addr = intel_sdvo->slave_addr;
482 msgs[i+1].flags = 0;
483 msgs[i+1].len = 1;
484 msgs[i+1].buf = &status;
485
486 msgs[i+2].addr = intel_sdvo->slave_addr;
487 msgs[i+2].flags = I2C_M_RD;
488 msgs[i+2].len = 1;
489 msgs[i+2].buf = &status;
490
491 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
492 if (ret < 0) {
493 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
494 ret = false;
495 goto out;
496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
500 ret = false;
501 }
502
503 out:
504 kfree(msgs);
505 kfree(buf);
506 return ret;
507 }
508
509 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
510 void *response, int response_len)
511 {
512 u8 retry = 5;
513 u8 status;
514 int i;
515
516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
517
518 /*
519 * The documentation states that all commands will be
520 * processed within 15µs, and that we need only poll
521 * the status byte a maximum of 3 times in order for the
522 * command to be complete.
523 *
524 * Check 5 times in case the hardware failed to read the docs.
525 */
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_CMD_STATUS,
528 &status))
529 goto log_fail;
530
531 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
532 udelay(15);
533 if (!intel_sdvo_read_byte(intel_sdvo,
534 SDVO_I2C_CMD_STATUS,
535 &status))
536 goto log_fail;
537 }
538
539 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
540 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
541 else
542 DRM_LOG_KMS("(??? %d)", status);
543
544 if (status != SDVO_CMD_STATUS_SUCCESS)
545 goto log_fail;
546
547 /* Read the command response */
548 for (i = 0; i < response_len; i++) {
549 if (!intel_sdvo_read_byte(intel_sdvo,
550 SDVO_I2C_RETURN_0 + i,
551 &((u8 *)response)[i]))
552 goto log_fail;
553 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
554 }
555 DRM_LOG_KMS("\n");
556 return true;
557
558 log_fail:
559 DRM_LOG_KMS("... failed\n");
560 return false;
561 }
562
563 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
564 {
565 if (mode->clock >= 100000)
566 return 1;
567 else if (mode->clock >= 50000)
568 return 2;
569 else
570 return 4;
571 }
572
573 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
574 u8 ddc_bus)
575 {
576 /* This must be the immediately preceding write before the i2c xfer */
577 return intel_sdvo_write_cmd(intel_sdvo,
578 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
579 &ddc_bus, 1);
580 }
581
582 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
583 {
584 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
585 return false;
586
587 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
588 }
589
590 static bool
591 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
592 {
593 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
594 return false;
595
596 return intel_sdvo_read_response(intel_sdvo, value, len);
597 }
598
599 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
600 {
601 struct intel_sdvo_set_target_input_args targets = {0};
602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_TARGET_INPUT,
604 &targets, sizeof(targets));
605 }
606
607 /**
608 * Return whether each input is trained.
609 *
610 * This function is making an assumption about the layout of the response,
611 * which should be checked against the docs.
612 */
613 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
614 {
615 struct intel_sdvo_get_trained_inputs_response response;
616
617 BUILD_BUG_ON(sizeof(response) != 1);
618 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
619 &response, sizeof(response)))
620 return false;
621
622 *input_1 = response.input0_trained;
623 *input_2 = response.input1_trained;
624 return true;
625 }
626
627 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
628 u16 outputs)
629 {
630 return intel_sdvo_set_value(intel_sdvo,
631 SDVO_CMD_SET_ACTIVE_OUTPUTS,
632 &outputs, sizeof(outputs));
633 }
634
635 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
636 u16 *outputs)
637 {
638 return intel_sdvo_get_value(intel_sdvo,
639 SDVO_CMD_GET_ACTIVE_OUTPUTS,
640 outputs, sizeof(*outputs));
641 }
642
643 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
644 int mode)
645 {
646 u8 state = SDVO_ENCODER_STATE_ON;
647
648 switch (mode) {
649 case DRM_MODE_DPMS_ON:
650 state = SDVO_ENCODER_STATE_ON;
651 break;
652 case DRM_MODE_DPMS_STANDBY:
653 state = SDVO_ENCODER_STATE_STANDBY;
654 break;
655 case DRM_MODE_DPMS_SUSPEND:
656 state = SDVO_ENCODER_STATE_SUSPEND;
657 break;
658 case DRM_MODE_DPMS_OFF:
659 state = SDVO_ENCODER_STATE_OFF;
660 break;
661 }
662
663 return intel_sdvo_set_value(intel_sdvo,
664 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
665 }
666
667 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
668 int *clock_min,
669 int *clock_max)
670 {
671 struct intel_sdvo_pixel_clock_range clocks;
672
673 BUILD_BUG_ON(sizeof(clocks) != 4);
674 if (!intel_sdvo_get_value(intel_sdvo,
675 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
676 &clocks, sizeof(clocks)))
677 return false;
678
679 /* Convert the values from units of 10 kHz to kHz. */
680 *clock_min = clocks.min * 10;
681 *clock_max = clocks.max * 10;
682 return true;
683 }
684
685 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
686 u16 outputs)
687 {
688 return intel_sdvo_set_value(intel_sdvo,
689 SDVO_CMD_SET_TARGET_OUTPUT,
690 &outputs, sizeof(outputs));
691 }
692
693 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
694 struct intel_sdvo_dtd *dtd)
695 {
696 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
697 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
698 }
699
700 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
701 struct intel_sdvo_dtd *dtd)
702 {
703 return intel_sdvo_set_timing(intel_sdvo,
704 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
705 }
706
707 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
708 struct intel_sdvo_dtd *dtd)
709 {
710 return intel_sdvo_set_timing(intel_sdvo,
711 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
712 }
713
714 static bool
715 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
716 uint16_t clock,
717 uint16_t width,
718 uint16_t height)
719 {
720 struct intel_sdvo_preferred_input_timing_args args;
721
722 memset(&args, 0, sizeof(args));
723 args.clock = clock;
724 args.width = width;
725 args.height = height;
726 args.interlace = 0;
727
728 if (intel_sdvo->is_lvds &&
729 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
730 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
731 args.scaled = 1;
732
733 return intel_sdvo_set_value(intel_sdvo,
734 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
735 &args, sizeof(args));
736 }
737
738 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
739 struct intel_sdvo_dtd *dtd)
740 {
741 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
742 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
743 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
744 &dtd->part1, sizeof(dtd->part1)) &&
745 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
746 &dtd->part2, sizeof(dtd->part2));
747 }
748
749 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
750 {
751 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
752 }
753
754 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
755 const struct drm_display_mode *mode)
756 {
757 uint16_t width, height;
758 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
759 uint16_t h_sync_offset, v_sync_offset;
760 int mode_clock;
761
762 width = mode->hdisplay;
763 height = mode->vdisplay;
764
765 /* do some mode translations */
766 h_blank_len = mode->htotal - mode->hdisplay;
767 h_sync_len = mode->hsync_end - mode->hsync_start;
768
769 v_blank_len = mode->vtotal - mode->vdisplay;
770 v_sync_len = mode->vsync_end - mode->vsync_start;
771
772 h_sync_offset = mode->hsync_start - mode->hdisplay;
773 v_sync_offset = mode->vsync_start - mode->vdisplay;
774
775 mode_clock = mode->clock;
776 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
777 mode_clock /= 10;
778 dtd->part1.clock = mode_clock;
779
780 dtd->part1.h_active = width & 0xff;
781 dtd->part1.h_blank = h_blank_len & 0xff;
782 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
783 ((h_blank_len >> 8) & 0xf);
784 dtd->part1.v_active = height & 0xff;
785 dtd->part1.v_blank = v_blank_len & 0xff;
786 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
787 ((v_blank_len >> 8) & 0xf);
788
789 dtd->part2.h_sync_off = h_sync_offset & 0xff;
790 dtd->part2.h_sync_width = h_sync_len & 0xff;
791 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
792 (v_sync_len & 0xf);
793 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
794 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
795 ((v_sync_len & 0x30) >> 4);
796
797 dtd->part2.dtd_flags = 0x18;
798 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
799 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
800 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
801 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
802 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
803 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
804
805 dtd->part2.sdvo_flags = 0;
806 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
807 dtd->part2.reserved = 0;
808 }
809
810 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
811 const struct intel_sdvo_dtd *dtd)
812 {
813 mode->hdisplay = dtd->part1.h_active;
814 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
815 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
816 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
817 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
818 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
819 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
820 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
821
822 mode->vdisplay = dtd->part1.v_active;
823 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
824 mode->vsync_start = mode->vdisplay;
825 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
826 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
827 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
828 mode->vsync_end = mode->vsync_start +
829 (dtd->part2.v_sync_off_width & 0xf);
830 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
831 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
832 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
833
834 mode->clock = dtd->part1.clock * 10;
835
836 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
837 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
838 mode->flags |= DRM_MODE_FLAG_INTERLACE;
839 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
840 mode->flags |= DRM_MODE_FLAG_PHSYNC;
841 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
842 mode->flags |= DRM_MODE_FLAG_PVSYNC;
843 }
844
845 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
846 {
847 struct intel_sdvo_encode encode;
848
849 BUILD_BUG_ON(sizeof(encode) != 2);
850 return intel_sdvo_get_value(intel_sdvo,
851 SDVO_CMD_GET_SUPP_ENCODE,
852 &encode, sizeof(encode));
853 }
854
855 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
856 uint8_t mode)
857 {
858 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
859 }
860
861 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
862 uint8_t mode)
863 {
864 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
865 }
866
867 #if 0
868 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
869 {
870 int i, j;
871 uint8_t set_buf_index[2];
872 uint8_t av_split;
873 uint8_t buf_size;
874 uint8_t buf[48];
875 uint8_t *pos;
876
877 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
878
879 for (i = 0; i <= av_split; i++) {
880 set_buf_index[0] = i; set_buf_index[1] = 0;
881 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
882 set_buf_index, 2);
883 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
884 intel_sdvo_read_response(encoder, &buf_size, 1);
885
886 pos = buf;
887 for (j = 0; j <= buf_size; j += 8) {
888 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
889 NULL, 0);
890 intel_sdvo_read_response(encoder, pos, 8);
891 pos += 8;
892 }
893 }
894 }
895 #endif
896
897 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
898 unsigned if_index, uint8_t tx_rate,
899 uint8_t *data, unsigned length)
900 {
901 uint8_t set_buf_index[2] = { if_index, 0 };
902 uint8_t hbuf_size, tmp[8];
903 int i;
904
905 if (!intel_sdvo_set_value(intel_sdvo,
906 SDVO_CMD_SET_HBUF_INDEX,
907 set_buf_index, 2))
908 return false;
909
910 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
911 &hbuf_size, 1))
912 return false;
913
914 /* Buffer size is 0 based, hooray! */
915 hbuf_size++;
916
917 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
918 if_index, length, hbuf_size);
919
920 for (i = 0; i < hbuf_size; i += 8) {
921 memset(tmp, 0, 8);
922 if (i < length)
923 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
924
925 if (!intel_sdvo_set_value(intel_sdvo,
926 SDVO_CMD_SET_HBUF_DATA,
927 tmp, 8))
928 return false;
929 }
930
931 return intel_sdvo_set_value(intel_sdvo,
932 SDVO_CMD_SET_HBUF_TXRATE,
933 &tx_rate, 1);
934 }
935
936 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
937 {
938 struct dip_infoframe avi_if = {
939 .type = DIP_TYPE_AVI,
940 .ver = DIP_VERSION_AVI,
941 .len = DIP_LEN_AVI,
942 };
943 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
944
945 intel_dip_infoframe_csum(&avi_if);
946
947 /* sdvo spec says that the ecc is handled by the hw, and it looks like
948 * we must not send the ecc field, either. */
949 memcpy(sdvo_data, &avi_if, 3);
950 sdvo_data[3] = avi_if.checksum;
951 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
952
953 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
954 SDVO_HBUF_TX_VSYNC,
955 sdvo_data, sizeof(sdvo_data));
956 }
957
958 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
959 {
960 struct intel_sdvo_tv_format format;
961 uint32_t format_map;
962
963 format_map = 1 << intel_sdvo->tv_format_index;
964 memset(&format, 0, sizeof(format));
965 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
966
967 BUILD_BUG_ON(sizeof(format) != 6);
968 return intel_sdvo_set_value(intel_sdvo,
969 SDVO_CMD_SET_TV_FORMAT,
970 &format, sizeof(format));
971 }
972
973 static bool
974 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
975 const struct drm_display_mode *mode)
976 {
977 struct intel_sdvo_dtd output_dtd;
978
979 if (!intel_sdvo_set_target_output(intel_sdvo,
980 intel_sdvo->attached_output))
981 return false;
982
983 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
984 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
985 return false;
986
987 return true;
988 }
989
990 /* Asks the sdvo controller for the preferred input mode given the output mode.
991 * Unfortunately we have to set up the full output mode to do that. */
992 static bool
993 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
994 const struct drm_display_mode *mode,
995 struct drm_display_mode *adjusted_mode)
996 {
997 struct intel_sdvo_dtd input_dtd;
998
999 /* Reset the input timing to the screen. Assume always input 0. */
1000 if (!intel_sdvo_set_target_input(intel_sdvo))
1001 return false;
1002
1003 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1004 mode->clock / 10,
1005 mode->hdisplay,
1006 mode->vdisplay))
1007 return false;
1008
1009 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1010 &input_dtd))
1011 return false;
1012
1013 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1014 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1015
1016 return true;
1017 }
1018
1019 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1020 const struct drm_display_mode *mode,
1021 struct drm_display_mode *adjusted_mode)
1022 {
1023 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1024 int multiplier;
1025
1026 /* We need to construct preferred input timings based on our
1027 * output timings. To do that, we have to set the output
1028 * timings, even though this isn't really the right place in
1029 * the sequence to do it. Oh well.
1030 */
1031 if (intel_sdvo->is_tv) {
1032 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1033 return false;
1034
1035 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1036 mode,
1037 adjusted_mode);
1038 } else if (intel_sdvo->is_lvds) {
1039 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1040 intel_sdvo->sdvo_lvds_fixed_mode))
1041 return false;
1042
1043 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1044 mode,
1045 adjusted_mode);
1046 }
1047
1048 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1049 * SDVO device will factor out the multiplier during mode_set.
1050 */
1051 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1052 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1053
1054 return true;
1055 }
1056
1057 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1058 struct drm_display_mode *mode,
1059 struct drm_display_mode *adjusted_mode)
1060 {
1061 struct drm_device *dev = encoder->dev;
1062 struct drm_i915_private *dev_priv = dev->dev_private;
1063 struct drm_crtc *crtc = encoder->crtc;
1064 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1065 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1066 u32 sdvox;
1067 struct intel_sdvo_in_out_map in_out;
1068 struct intel_sdvo_dtd input_dtd, output_dtd;
1069 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1070 int rate;
1071
1072 if (!mode)
1073 return;
1074
1075 /* First, set the input mapping for the first input to our controlled
1076 * output. This is only correct if we're a single-input device, in
1077 * which case the first input is the output from the appropriate SDVO
1078 * channel on the motherboard. In a two-input device, the first input
1079 * will be SDVOB and the second SDVOC.
1080 */
1081 in_out.in0 = intel_sdvo->attached_output;
1082 in_out.in1 = 0;
1083
1084 intel_sdvo_set_value(intel_sdvo,
1085 SDVO_CMD_SET_IN_OUT_MAP,
1086 &in_out, sizeof(in_out));
1087
1088 /* Set the output timings to the screen */
1089 if (!intel_sdvo_set_target_output(intel_sdvo,
1090 intel_sdvo->attached_output))
1091 return;
1092
1093 /* lvds has a special fixed output timing. */
1094 if (intel_sdvo->is_lvds)
1095 intel_sdvo_get_dtd_from_mode(&output_dtd,
1096 intel_sdvo->sdvo_lvds_fixed_mode);
1097 else
1098 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1099 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1100 DRM_INFO("Setting output timings on %s failed\n",
1101 SDVO_NAME(intel_sdvo));
1102
1103 /* Set the input timing to the screen. Assume always input 0. */
1104 if (!intel_sdvo_set_target_input(intel_sdvo))
1105 return;
1106
1107 if (intel_sdvo->has_hdmi_monitor) {
1108 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1109 intel_sdvo_set_colorimetry(intel_sdvo,
1110 SDVO_COLORIMETRY_RGB256);
1111 intel_sdvo_set_avi_infoframe(intel_sdvo);
1112 } else
1113 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1114
1115 if (intel_sdvo->is_tv &&
1116 !intel_sdvo_set_tv_format(intel_sdvo))
1117 return;
1118
1119 /* We have tried to get input timing in mode_fixup, and filled into
1120 * adjusted_mode.
1121 */
1122 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1123 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1124 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1125 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1126 DRM_INFO("Setting input timings on %s failed\n",
1127 SDVO_NAME(intel_sdvo));
1128
1129 switch (pixel_multiplier) {
1130 default:
1131 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1132 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1133 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1134 }
1135 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1136 return;
1137
1138 /* Set the SDVO control regs. */
1139 if (INTEL_INFO(dev)->gen >= 4) {
1140 /* The real mode polarity is set by the SDVO commands, using
1141 * struct intel_sdvo_dtd. */
1142 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1143 if (intel_sdvo->is_hdmi)
1144 sdvox |= intel_sdvo->color_range;
1145 if (INTEL_INFO(dev)->gen < 5)
1146 sdvox |= SDVO_BORDER_ENABLE;
1147 } else {
1148 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1149 switch (intel_sdvo->sdvo_reg) {
1150 case SDVOB:
1151 sdvox &= SDVOB_PRESERVE_MASK;
1152 break;
1153 case SDVOC:
1154 sdvox &= SDVOC_PRESERVE_MASK;
1155 break;
1156 }
1157 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1158 }
1159
1160 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1161 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1162 else
1163 sdvox |= TRANSCODER(intel_crtc->pipe);
1164
1165 if (intel_sdvo->has_hdmi_audio)
1166 sdvox |= SDVO_AUDIO_ENABLE;
1167
1168 if (INTEL_INFO(dev)->gen >= 4) {
1169 /* done in crtc_mode_set as the dpll_md reg must be written early */
1170 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1171 /* done in crtc_mode_set as it lives inside the dpll register */
1172 } else {
1173 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1174 }
1175
1176 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1177 INTEL_INFO(dev)->gen < 5)
1178 sdvox |= SDVO_STALL_SELECT;
1179 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1180 }
1181
1182 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1183 {
1184 struct intel_sdvo_connector *intel_sdvo_connector =
1185 to_intel_sdvo_connector(&connector->base);
1186 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1187 u16 active_outputs;
1188
1189 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1190
1191 if (active_outputs & intel_sdvo_connector->output_flag)
1192 return true;
1193 else
1194 return false;
1195 }
1196
1197 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1198 enum pipe *pipe)
1199 {
1200 struct drm_device *dev = encoder->base.dev;
1201 struct drm_i915_private *dev_priv = dev->dev_private;
1202 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1203 u32 tmp;
1204
1205 tmp = I915_READ(intel_sdvo->sdvo_reg);
1206
1207 if (!(tmp & SDVO_ENABLE))
1208 return false;
1209
1210 if (HAS_PCH_CPT(dev))
1211 *pipe = PORT_TO_PIPE_CPT(tmp);
1212 else
1213 *pipe = PORT_TO_PIPE(tmp);
1214
1215 return true;
1216 }
1217
1218 static void intel_disable_sdvo(struct intel_encoder *encoder)
1219 {
1220 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1221 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1222 u32 temp;
1223
1224 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1225 if (0)
1226 intel_sdvo_set_encoder_power_state(intel_sdvo,
1227 DRM_MODE_DPMS_OFF);
1228
1229 temp = I915_READ(intel_sdvo->sdvo_reg);
1230 if ((temp & SDVO_ENABLE) != 0) {
1231 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1232 }
1233 }
1234
1235 static void intel_enable_sdvo(struct intel_encoder *encoder)
1236 {
1237 struct drm_device *dev = encoder->base.dev;
1238 struct drm_i915_private *dev_priv = dev->dev_private;
1239 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1240 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1241 u32 temp;
1242 bool input1, input2;
1243 int i;
1244 u8 status;
1245
1246 temp = I915_READ(intel_sdvo->sdvo_reg);
1247 if ((temp & SDVO_ENABLE) == 0)
1248 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1249 for (i = 0; i < 2; i++)
1250 intel_wait_for_vblank(dev, intel_crtc->pipe);
1251
1252 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1253 /* Warn if the device reported failure to sync.
1254 * A lot of SDVO devices fail to notify of sync, but it's
1255 * a given it the status is a success, we succeeded.
1256 */
1257 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1258 DRM_DEBUG_KMS("First %s output reported failure to "
1259 "sync\n", SDVO_NAME(intel_sdvo));
1260 }
1261
1262 if (0)
1263 intel_sdvo_set_encoder_power_state(intel_sdvo,
1264 DRM_MODE_DPMS_ON);
1265 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1266 }
1267
1268 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1269 {
1270 struct drm_crtc *crtc;
1271 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1272
1273 /* dvo supports only 2 dpms states. */
1274 if (mode != DRM_MODE_DPMS_ON)
1275 mode = DRM_MODE_DPMS_OFF;
1276
1277 if (mode == connector->dpms)
1278 return;
1279
1280 connector->dpms = mode;
1281
1282 /* Only need to change hw state when actually enabled */
1283 crtc = intel_sdvo->base.base.crtc;
1284 if (!crtc) {
1285 intel_sdvo->base.connectors_active = false;
1286 return;
1287 }
1288
1289 if (mode != DRM_MODE_DPMS_ON) {
1290 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1291 if (0)
1292 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1293
1294 intel_sdvo->base.connectors_active = false;
1295
1296 intel_crtc_update_dpms(crtc);
1297 } else {
1298 intel_sdvo->base.connectors_active = true;
1299
1300 intel_crtc_update_dpms(crtc);
1301
1302 if (0)
1303 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1304 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1305 }
1306
1307 intel_modeset_check_state(connector->dev);
1308 }
1309
1310 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1311 struct drm_display_mode *mode)
1312 {
1313 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1314
1315 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1316 return MODE_NO_DBLESCAN;
1317
1318 if (intel_sdvo->pixel_clock_min > mode->clock)
1319 return MODE_CLOCK_LOW;
1320
1321 if (intel_sdvo->pixel_clock_max < mode->clock)
1322 return MODE_CLOCK_HIGH;
1323
1324 if (intel_sdvo->is_lvds) {
1325 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1326 return MODE_PANEL;
1327
1328 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1329 return MODE_PANEL;
1330 }
1331
1332 return MODE_OK;
1333 }
1334
1335 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1336 {
1337 BUILD_BUG_ON(sizeof(*caps) != 8);
1338 if (!intel_sdvo_get_value(intel_sdvo,
1339 SDVO_CMD_GET_DEVICE_CAPS,
1340 caps, sizeof(*caps)))
1341 return false;
1342
1343 DRM_DEBUG_KMS("SDVO capabilities:\n"
1344 " vendor_id: %d\n"
1345 " device_id: %d\n"
1346 " device_rev_id: %d\n"
1347 " sdvo_version_major: %d\n"
1348 " sdvo_version_minor: %d\n"
1349 " sdvo_inputs_mask: %d\n"
1350 " smooth_scaling: %d\n"
1351 " sharp_scaling: %d\n"
1352 " up_scaling: %d\n"
1353 " down_scaling: %d\n"
1354 " stall_support: %d\n"
1355 " output_flags: %d\n",
1356 caps->vendor_id,
1357 caps->device_id,
1358 caps->device_rev_id,
1359 caps->sdvo_version_major,
1360 caps->sdvo_version_minor,
1361 caps->sdvo_inputs_mask,
1362 caps->smooth_scaling,
1363 caps->sharp_scaling,
1364 caps->up_scaling,
1365 caps->down_scaling,
1366 caps->stall_support,
1367 caps->output_flags);
1368
1369 return true;
1370 }
1371
1372 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1373 {
1374 struct drm_device *dev = intel_sdvo->base.base.dev;
1375 uint16_t hotplug;
1376
1377 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1378 * on the line. */
1379 if (IS_I945G(dev) || IS_I945GM(dev))
1380 return 0;
1381
1382 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1383 &hotplug, sizeof(hotplug)))
1384 return 0;
1385
1386 return hotplug;
1387 }
1388
1389 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1390 {
1391 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1392
1393 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1394 &intel_sdvo->hotplug_active, 2);
1395 }
1396
1397 static bool
1398 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1399 {
1400 /* Is there more than one type of output? */
1401 return hweight16(intel_sdvo->caps.output_flags) > 1;
1402 }
1403
1404 static struct edid *
1405 intel_sdvo_get_edid(struct drm_connector *connector)
1406 {
1407 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1408 return drm_get_edid(connector, &sdvo->ddc);
1409 }
1410
1411 /* Mac mini hack -- use the same DDC as the analog connector */
1412 static struct edid *
1413 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1414 {
1415 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1416
1417 return drm_get_edid(connector,
1418 intel_gmbus_get_adapter(dev_priv,
1419 dev_priv->crt_ddc_pin));
1420 }
1421
1422 static enum drm_connector_status
1423 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1424 {
1425 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1426 enum drm_connector_status status;
1427 struct edid *edid;
1428
1429 edid = intel_sdvo_get_edid(connector);
1430
1431 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1432 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1433
1434 /*
1435 * Don't use the 1 as the argument of DDC bus switch to get
1436 * the EDID. It is used for SDVO SPD ROM.
1437 */
1438 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1439 intel_sdvo->ddc_bus = ddc;
1440 edid = intel_sdvo_get_edid(connector);
1441 if (edid)
1442 break;
1443 }
1444 /*
1445 * If we found the EDID on the other bus,
1446 * assume that is the correct DDC bus.
1447 */
1448 if (edid == NULL)
1449 intel_sdvo->ddc_bus = saved_ddc;
1450 }
1451
1452 /*
1453 * When there is no edid and no monitor is connected with VGA
1454 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1455 */
1456 if (edid == NULL)
1457 edid = intel_sdvo_get_analog_edid(connector);
1458
1459 status = connector_status_unknown;
1460 if (edid != NULL) {
1461 /* DDC bus is shared, match EDID to connector type */
1462 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1463 status = connector_status_connected;
1464 if (intel_sdvo->is_hdmi) {
1465 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1466 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1467 }
1468 } else
1469 status = connector_status_disconnected;
1470 kfree(edid);
1471 }
1472
1473 if (status == connector_status_connected) {
1474 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1475 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1476 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1477 }
1478
1479 return status;
1480 }
1481
1482 static bool
1483 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1484 struct edid *edid)
1485 {
1486 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1487 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1488
1489 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1490 connector_is_digital, monitor_is_digital);
1491 return connector_is_digital == monitor_is_digital;
1492 }
1493
1494 static enum drm_connector_status
1495 intel_sdvo_detect(struct drm_connector *connector, bool force)
1496 {
1497 uint16_t response;
1498 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1499 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1500 enum drm_connector_status ret;
1501
1502 if (!intel_sdvo_write_cmd(intel_sdvo,
1503 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1504 return connector_status_unknown;
1505
1506 /* add 30ms delay when the output type might be TV */
1507 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1508 msleep(30);
1509
1510 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1511 return connector_status_unknown;
1512
1513 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1514 response & 0xff, response >> 8,
1515 intel_sdvo_connector->output_flag);
1516
1517 if (response == 0)
1518 return connector_status_disconnected;
1519
1520 intel_sdvo->attached_output = response;
1521
1522 intel_sdvo->has_hdmi_monitor = false;
1523 intel_sdvo->has_hdmi_audio = false;
1524
1525 if ((intel_sdvo_connector->output_flag & response) == 0)
1526 ret = connector_status_disconnected;
1527 else if (IS_TMDS(intel_sdvo_connector))
1528 ret = intel_sdvo_tmds_sink_detect(connector);
1529 else {
1530 struct edid *edid;
1531
1532 /* if we have an edid check it matches the connection */
1533 edid = intel_sdvo_get_edid(connector);
1534 if (edid == NULL)
1535 edid = intel_sdvo_get_analog_edid(connector);
1536 if (edid != NULL) {
1537 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1538 edid))
1539 ret = connector_status_connected;
1540 else
1541 ret = connector_status_disconnected;
1542
1543 kfree(edid);
1544 } else
1545 ret = connector_status_connected;
1546 }
1547
1548 /* May update encoder flag for like clock for SDVO TV, etc.*/
1549 if (ret == connector_status_connected) {
1550 intel_sdvo->is_tv = false;
1551 intel_sdvo->is_lvds = false;
1552 intel_sdvo->base.needs_tv_clock = false;
1553
1554 if (response & SDVO_TV_MASK) {
1555 intel_sdvo->is_tv = true;
1556 intel_sdvo->base.needs_tv_clock = true;
1557 }
1558 if (response & SDVO_LVDS_MASK)
1559 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1560 }
1561
1562 return ret;
1563 }
1564
1565 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1566 {
1567 struct edid *edid;
1568
1569 /* set the bus switch and get the modes */
1570 edid = intel_sdvo_get_edid(connector);
1571
1572 /*
1573 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1574 * link between analog and digital outputs. So, if the regular SDVO
1575 * DDC fails, check to see if the analog output is disconnected, in
1576 * which case we'll look there for the digital DDC data.
1577 */
1578 if (edid == NULL)
1579 edid = intel_sdvo_get_analog_edid(connector);
1580
1581 if (edid != NULL) {
1582 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1583 edid)) {
1584 drm_mode_connector_update_edid_property(connector, edid);
1585 drm_add_edid_modes(connector, edid);
1586 }
1587
1588 kfree(edid);
1589 }
1590 }
1591
1592 /*
1593 * Set of SDVO TV modes.
1594 * Note! This is in reply order (see loop in get_tv_modes).
1595 * XXX: all 60Hz refresh?
1596 */
1597 static const struct drm_display_mode sdvo_tv_modes[] = {
1598 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1599 416, 0, 200, 201, 232, 233, 0,
1600 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1601 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1602 416, 0, 240, 241, 272, 273, 0,
1603 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1605 496, 0, 300, 301, 332, 333, 0,
1606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1607 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1608 736, 0, 350, 351, 382, 383, 0,
1609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1610 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1611 736, 0, 400, 401, 432, 433, 0,
1612 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1613 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1614 736, 0, 480, 481, 512, 513, 0,
1615 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1616 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1617 800, 0, 480, 481, 512, 513, 0,
1618 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1619 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1620 800, 0, 576, 577, 608, 609, 0,
1621 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1622 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1623 816, 0, 350, 351, 382, 383, 0,
1624 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1625 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1626 816, 0, 400, 401, 432, 433, 0,
1627 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1628 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1629 816, 0, 480, 481, 512, 513, 0,
1630 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1631 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1632 816, 0, 540, 541, 572, 573, 0,
1633 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1634 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1635 816, 0, 576, 577, 608, 609, 0,
1636 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1637 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1638 864, 0, 576, 577, 608, 609, 0,
1639 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1640 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1641 896, 0, 600, 601, 632, 633, 0,
1642 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1643 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1644 928, 0, 624, 625, 656, 657, 0,
1645 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1646 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1647 1016, 0, 766, 767, 798, 799, 0,
1648 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1649 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1650 1120, 0, 768, 769, 800, 801, 0,
1651 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1652 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1653 1376, 0, 1024, 1025, 1056, 1057, 0,
1654 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1655 };
1656
1657 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1658 {
1659 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1660 struct intel_sdvo_sdtv_resolution_request tv_res;
1661 uint32_t reply = 0, format_map = 0;
1662 int i;
1663
1664 /* Read the list of supported input resolutions for the selected TV
1665 * format.
1666 */
1667 format_map = 1 << intel_sdvo->tv_format_index;
1668 memcpy(&tv_res, &format_map,
1669 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1670
1671 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1672 return;
1673
1674 BUILD_BUG_ON(sizeof(tv_res) != 3);
1675 if (!intel_sdvo_write_cmd(intel_sdvo,
1676 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1677 &tv_res, sizeof(tv_res)))
1678 return;
1679 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1680 return;
1681
1682 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1683 if (reply & (1 << i)) {
1684 struct drm_display_mode *nmode;
1685 nmode = drm_mode_duplicate(connector->dev,
1686 &sdvo_tv_modes[i]);
1687 if (nmode)
1688 drm_mode_probed_add(connector, nmode);
1689 }
1690 }
1691
1692 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1693 {
1694 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1695 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1696 struct drm_display_mode *newmode;
1697
1698 /*
1699 * Attempt to get the mode list from DDC.
1700 * Assume that the preferred modes are
1701 * arranged in priority order.
1702 */
1703 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1704 if (list_empty(&connector->probed_modes) == false)
1705 goto end;
1706
1707 /* Fetch modes from VBT */
1708 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1709 newmode = drm_mode_duplicate(connector->dev,
1710 dev_priv->sdvo_lvds_vbt_mode);
1711 if (newmode != NULL) {
1712 /* Guarantee the mode is preferred */
1713 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1714 DRM_MODE_TYPE_DRIVER);
1715 drm_mode_probed_add(connector, newmode);
1716 }
1717 }
1718
1719 end:
1720 list_for_each_entry(newmode, &connector->probed_modes, head) {
1721 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1722 intel_sdvo->sdvo_lvds_fixed_mode =
1723 drm_mode_duplicate(connector->dev, newmode);
1724
1725 intel_sdvo->is_lvds = true;
1726 break;
1727 }
1728 }
1729
1730 }
1731
1732 static int intel_sdvo_get_modes(struct drm_connector *connector)
1733 {
1734 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1735
1736 if (IS_TV(intel_sdvo_connector))
1737 intel_sdvo_get_tv_modes(connector);
1738 else if (IS_LVDS(intel_sdvo_connector))
1739 intel_sdvo_get_lvds_modes(connector);
1740 else
1741 intel_sdvo_get_ddc_modes(connector);
1742
1743 return !list_empty(&connector->probed_modes);
1744 }
1745
1746 static void
1747 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1748 {
1749 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1750 struct drm_device *dev = connector->dev;
1751
1752 if (intel_sdvo_connector->left)
1753 drm_property_destroy(dev, intel_sdvo_connector->left);
1754 if (intel_sdvo_connector->right)
1755 drm_property_destroy(dev, intel_sdvo_connector->right);
1756 if (intel_sdvo_connector->top)
1757 drm_property_destroy(dev, intel_sdvo_connector->top);
1758 if (intel_sdvo_connector->bottom)
1759 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1760 if (intel_sdvo_connector->hpos)
1761 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1762 if (intel_sdvo_connector->vpos)
1763 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1764 if (intel_sdvo_connector->saturation)
1765 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1766 if (intel_sdvo_connector->contrast)
1767 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1768 if (intel_sdvo_connector->hue)
1769 drm_property_destroy(dev, intel_sdvo_connector->hue);
1770 if (intel_sdvo_connector->sharpness)
1771 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1772 if (intel_sdvo_connector->flicker_filter)
1773 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1774 if (intel_sdvo_connector->flicker_filter_2d)
1775 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1776 if (intel_sdvo_connector->flicker_filter_adaptive)
1777 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1778 if (intel_sdvo_connector->tv_luma_filter)
1779 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1780 if (intel_sdvo_connector->tv_chroma_filter)
1781 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1782 if (intel_sdvo_connector->dot_crawl)
1783 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1784 if (intel_sdvo_connector->brightness)
1785 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1786 }
1787
1788 static void intel_sdvo_destroy(struct drm_connector *connector)
1789 {
1790 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1791
1792 if (intel_sdvo_connector->tv_format)
1793 drm_property_destroy(connector->dev,
1794 intel_sdvo_connector->tv_format);
1795
1796 intel_sdvo_destroy_enhance_property(connector);
1797 drm_sysfs_connector_remove(connector);
1798 drm_connector_cleanup(connector);
1799 kfree(connector);
1800 }
1801
1802 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1803 {
1804 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1805 struct edid *edid;
1806 bool has_audio = false;
1807
1808 if (!intel_sdvo->is_hdmi)
1809 return false;
1810
1811 edid = intel_sdvo_get_edid(connector);
1812 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1813 has_audio = drm_detect_monitor_audio(edid);
1814 kfree(edid);
1815
1816 return has_audio;
1817 }
1818
1819 static int
1820 intel_sdvo_set_property(struct drm_connector *connector,
1821 struct drm_property *property,
1822 uint64_t val)
1823 {
1824 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1825 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1826 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1827 uint16_t temp_value;
1828 uint8_t cmd;
1829 int ret;
1830
1831 ret = drm_connector_property_set_value(connector, property, val);
1832 if (ret)
1833 return ret;
1834
1835 if (property == dev_priv->force_audio_property) {
1836 int i = val;
1837 bool has_audio;
1838
1839 if (i == intel_sdvo_connector->force_audio)
1840 return 0;
1841
1842 intel_sdvo_connector->force_audio = i;
1843
1844 if (i == HDMI_AUDIO_AUTO)
1845 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1846 else
1847 has_audio = (i == HDMI_AUDIO_ON);
1848
1849 if (has_audio == intel_sdvo->has_hdmi_audio)
1850 return 0;
1851
1852 intel_sdvo->has_hdmi_audio = has_audio;
1853 goto done;
1854 }
1855
1856 if (property == dev_priv->broadcast_rgb_property) {
1857 if (val == !!intel_sdvo->color_range)
1858 return 0;
1859
1860 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1861 goto done;
1862 }
1863
1864 #define CHECK_PROPERTY(name, NAME) \
1865 if (intel_sdvo_connector->name == property) { \
1866 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1867 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1868 cmd = SDVO_CMD_SET_##NAME; \
1869 intel_sdvo_connector->cur_##name = temp_value; \
1870 goto set_value; \
1871 }
1872
1873 if (property == intel_sdvo_connector->tv_format) {
1874 if (val >= TV_FORMAT_NUM)
1875 return -EINVAL;
1876
1877 if (intel_sdvo->tv_format_index ==
1878 intel_sdvo_connector->tv_format_supported[val])
1879 return 0;
1880
1881 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1882 goto done;
1883 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1884 temp_value = val;
1885 if (intel_sdvo_connector->left == property) {
1886 drm_connector_property_set_value(connector,
1887 intel_sdvo_connector->right, val);
1888 if (intel_sdvo_connector->left_margin == temp_value)
1889 return 0;
1890
1891 intel_sdvo_connector->left_margin = temp_value;
1892 intel_sdvo_connector->right_margin = temp_value;
1893 temp_value = intel_sdvo_connector->max_hscan -
1894 intel_sdvo_connector->left_margin;
1895 cmd = SDVO_CMD_SET_OVERSCAN_H;
1896 goto set_value;
1897 } else if (intel_sdvo_connector->right == property) {
1898 drm_connector_property_set_value(connector,
1899 intel_sdvo_connector->left, val);
1900 if (intel_sdvo_connector->right_margin == temp_value)
1901 return 0;
1902
1903 intel_sdvo_connector->left_margin = temp_value;
1904 intel_sdvo_connector->right_margin = temp_value;
1905 temp_value = intel_sdvo_connector->max_hscan -
1906 intel_sdvo_connector->left_margin;
1907 cmd = SDVO_CMD_SET_OVERSCAN_H;
1908 goto set_value;
1909 } else if (intel_sdvo_connector->top == property) {
1910 drm_connector_property_set_value(connector,
1911 intel_sdvo_connector->bottom, val);
1912 if (intel_sdvo_connector->top_margin == temp_value)
1913 return 0;
1914
1915 intel_sdvo_connector->top_margin = temp_value;
1916 intel_sdvo_connector->bottom_margin = temp_value;
1917 temp_value = intel_sdvo_connector->max_vscan -
1918 intel_sdvo_connector->top_margin;
1919 cmd = SDVO_CMD_SET_OVERSCAN_V;
1920 goto set_value;
1921 } else if (intel_sdvo_connector->bottom == property) {
1922 drm_connector_property_set_value(connector,
1923 intel_sdvo_connector->top, val);
1924 if (intel_sdvo_connector->bottom_margin == temp_value)
1925 return 0;
1926
1927 intel_sdvo_connector->top_margin = temp_value;
1928 intel_sdvo_connector->bottom_margin = temp_value;
1929 temp_value = intel_sdvo_connector->max_vscan -
1930 intel_sdvo_connector->top_margin;
1931 cmd = SDVO_CMD_SET_OVERSCAN_V;
1932 goto set_value;
1933 }
1934 CHECK_PROPERTY(hpos, HPOS)
1935 CHECK_PROPERTY(vpos, VPOS)
1936 CHECK_PROPERTY(saturation, SATURATION)
1937 CHECK_PROPERTY(contrast, CONTRAST)
1938 CHECK_PROPERTY(hue, HUE)
1939 CHECK_PROPERTY(brightness, BRIGHTNESS)
1940 CHECK_PROPERTY(sharpness, SHARPNESS)
1941 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1942 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1943 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1944 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1945 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1946 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1947 }
1948
1949 return -EINVAL; /* unknown property */
1950
1951 set_value:
1952 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1953 return -EIO;
1954
1955
1956 done:
1957 if (intel_sdvo->base.base.crtc) {
1958 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1959 intel_set_mode(crtc, &crtc->mode,
1960 crtc->x, crtc->y, crtc->fb);
1961 }
1962
1963 return 0;
1964 #undef CHECK_PROPERTY
1965 }
1966
1967 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1968 .mode_fixup = intel_sdvo_mode_fixup,
1969 .mode_set = intel_sdvo_mode_set,
1970 .disable = intel_encoder_noop,
1971 };
1972
1973 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1974 .dpms = intel_sdvo_dpms,
1975 .detect = intel_sdvo_detect,
1976 .fill_modes = drm_helper_probe_single_connector_modes,
1977 .set_property = intel_sdvo_set_property,
1978 .destroy = intel_sdvo_destroy,
1979 };
1980
1981 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1982 .get_modes = intel_sdvo_get_modes,
1983 .mode_valid = intel_sdvo_mode_valid,
1984 .best_encoder = intel_best_encoder,
1985 };
1986
1987 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1988 {
1989 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1990
1991 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1992 drm_mode_destroy(encoder->dev,
1993 intel_sdvo->sdvo_lvds_fixed_mode);
1994
1995 i2c_del_adapter(&intel_sdvo->ddc);
1996 intel_encoder_destroy(encoder);
1997 }
1998
1999 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2000 .destroy = intel_sdvo_enc_destroy,
2001 };
2002
2003 static void
2004 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2005 {
2006 uint16_t mask = 0;
2007 unsigned int num_bits;
2008
2009 /* Make a mask of outputs less than or equal to our own priority in the
2010 * list.
2011 */
2012 switch (sdvo->controlled_output) {
2013 case SDVO_OUTPUT_LVDS1:
2014 mask |= SDVO_OUTPUT_LVDS1;
2015 case SDVO_OUTPUT_LVDS0:
2016 mask |= SDVO_OUTPUT_LVDS0;
2017 case SDVO_OUTPUT_TMDS1:
2018 mask |= SDVO_OUTPUT_TMDS1;
2019 case SDVO_OUTPUT_TMDS0:
2020 mask |= SDVO_OUTPUT_TMDS0;
2021 case SDVO_OUTPUT_RGB1:
2022 mask |= SDVO_OUTPUT_RGB1;
2023 case SDVO_OUTPUT_RGB0:
2024 mask |= SDVO_OUTPUT_RGB0;
2025 break;
2026 }
2027
2028 /* Count bits to find what number we are in the priority list. */
2029 mask &= sdvo->caps.output_flags;
2030 num_bits = hweight16(mask);
2031 /* If more than 3 outputs, default to DDC bus 3 for now. */
2032 if (num_bits > 3)
2033 num_bits = 3;
2034
2035 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2036 sdvo->ddc_bus = 1 << num_bits;
2037 }
2038
2039 /**
2040 * Choose the appropriate DDC bus for control bus switch command for this
2041 * SDVO output based on the controlled output.
2042 *
2043 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2044 * outputs, then LVDS outputs.
2045 */
2046 static void
2047 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2048 struct intel_sdvo *sdvo, u32 reg)
2049 {
2050 struct sdvo_device_mapping *mapping;
2051
2052 if (sdvo->is_sdvob)
2053 mapping = &(dev_priv->sdvo_mappings[0]);
2054 else
2055 mapping = &(dev_priv->sdvo_mappings[1]);
2056
2057 if (mapping->initialized)
2058 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2059 else
2060 intel_sdvo_guess_ddc_bus(sdvo);
2061 }
2062
2063 static void
2064 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2065 struct intel_sdvo *sdvo, u32 reg)
2066 {
2067 struct sdvo_device_mapping *mapping;
2068 u8 pin;
2069
2070 if (sdvo->is_sdvob)
2071 mapping = &dev_priv->sdvo_mappings[0];
2072 else
2073 mapping = &dev_priv->sdvo_mappings[1];
2074
2075 pin = GMBUS_PORT_DPB;
2076 if (mapping->initialized)
2077 pin = mapping->i2c_pin;
2078
2079 if (intel_gmbus_is_port_valid(pin)) {
2080 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2081 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
2082 intel_gmbus_force_bit(sdvo->i2c, true);
2083 } else {
2084 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
2085 }
2086 }
2087
2088 static bool
2089 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2090 {
2091 return intel_sdvo_check_supp_encode(intel_sdvo);
2092 }
2093
2094 static u8
2095 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2096 {
2097 struct drm_i915_private *dev_priv = dev->dev_private;
2098 struct sdvo_device_mapping *my_mapping, *other_mapping;
2099
2100 if (sdvo->is_sdvob) {
2101 my_mapping = &dev_priv->sdvo_mappings[0];
2102 other_mapping = &dev_priv->sdvo_mappings[1];
2103 } else {
2104 my_mapping = &dev_priv->sdvo_mappings[1];
2105 other_mapping = &dev_priv->sdvo_mappings[0];
2106 }
2107
2108 /* If the BIOS described our SDVO device, take advantage of it. */
2109 if (my_mapping->slave_addr)
2110 return my_mapping->slave_addr;
2111
2112 /* If the BIOS only described a different SDVO device, use the
2113 * address that it isn't using.
2114 */
2115 if (other_mapping->slave_addr) {
2116 if (other_mapping->slave_addr == 0x70)
2117 return 0x72;
2118 else
2119 return 0x70;
2120 }
2121
2122 /* No SDVO device info is found for another DVO port,
2123 * so use mapping assumption we had before BIOS parsing.
2124 */
2125 if (sdvo->is_sdvob)
2126 return 0x70;
2127 else
2128 return 0x72;
2129 }
2130
2131 static void
2132 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2133 struct intel_sdvo *encoder)
2134 {
2135 drm_connector_init(encoder->base.base.dev,
2136 &connector->base.base,
2137 &intel_sdvo_connector_funcs,
2138 connector->base.base.connector_type);
2139
2140 drm_connector_helper_add(&connector->base.base,
2141 &intel_sdvo_connector_helper_funcs);
2142
2143 connector->base.base.interlace_allowed = 1;
2144 connector->base.base.doublescan_allowed = 0;
2145 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2146 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2147
2148 intel_connector_attach_encoder(&connector->base, &encoder->base);
2149 drm_sysfs_connector_add(&connector->base.base);
2150 }
2151
2152 static void
2153 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2154 {
2155 struct drm_device *dev = connector->base.base.dev;
2156
2157 intel_attach_force_audio_property(&connector->base.base);
2158 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2159 intel_attach_broadcast_rgb_property(&connector->base.base);
2160 }
2161
2162 static bool
2163 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2164 {
2165 struct drm_encoder *encoder = &intel_sdvo->base.base;
2166 struct drm_connector *connector;
2167 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2168 struct intel_connector *intel_connector;
2169 struct intel_sdvo_connector *intel_sdvo_connector;
2170
2171 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2172 if (!intel_sdvo_connector)
2173 return false;
2174
2175 if (device == 0) {
2176 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2178 } else if (device == 1) {
2179 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2180 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2181 }
2182
2183 intel_connector = &intel_sdvo_connector->base;
2184 connector = &intel_connector->base;
2185 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2186 intel_sdvo_connector->output_flag) {
2187 connector->polled = DRM_CONNECTOR_POLL_HPD;
2188 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2189 /* Some SDVO devices have one-shot hotplug interrupts.
2190 * Ensure that they get re-enabled when an interrupt happens.
2191 */
2192 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2193 intel_sdvo_enable_hotplug(intel_encoder);
2194 } else {
2195 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2196 }
2197 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2198 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2199
2200 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2201 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2202 intel_sdvo->is_hdmi = true;
2203 }
2204 intel_sdvo->base.cloneable = true;
2205
2206 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2207 if (intel_sdvo->is_hdmi)
2208 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2209
2210 return true;
2211 }
2212
2213 static bool
2214 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2215 {
2216 struct drm_encoder *encoder = &intel_sdvo->base.base;
2217 struct drm_connector *connector;
2218 struct intel_connector *intel_connector;
2219 struct intel_sdvo_connector *intel_sdvo_connector;
2220
2221 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2222 if (!intel_sdvo_connector)
2223 return false;
2224
2225 intel_connector = &intel_sdvo_connector->base;
2226 connector = &intel_connector->base;
2227 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2228 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2229
2230 intel_sdvo->controlled_output |= type;
2231 intel_sdvo_connector->output_flag = type;
2232
2233 intel_sdvo->is_tv = true;
2234 intel_sdvo->base.needs_tv_clock = true;
2235 intel_sdvo->base.cloneable = false;
2236
2237 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2238
2239 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2240 goto err;
2241
2242 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2243 goto err;
2244
2245 return true;
2246
2247 err:
2248 intel_sdvo_destroy(connector);
2249 return false;
2250 }
2251
2252 static bool
2253 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2254 {
2255 struct drm_encoder *encoder = &intel_sdvo->base.base;
2256 struct drm_connector *connector;
2257 struct intel_connector *intel_connector;
2258 struct intel_sdvo_connector *intel_sdvo_connector;
2259
2260 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2261 if (!intel_sdvo_connector)
2262 return false;
2263
2264 intel_connector = &intel_sdvo_connector->base;
2265 connector = &intel_connector->base;
2266 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2267 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2268 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2269
2270 if (device == 0) {
2271 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2272 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2273 } else if (device == 1) {
2274 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2275 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2276 }
2277
2278 intel_sdvo->base.cloneable = true;
2279
2280 intel_sdvo_connector_init(intel_sdvo_connector,
2281 intel_sdvo);
2282 return true;
2283 }
2284
2285 static bool
2286 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2287 {
2288 struct drm_encoder *encoder = &intel_sdvo->base.base;
2289 struct drm_connector *connector;
2290 struct intel_connector *intel_connector;
2291 struct intel_sdvo_connector *intel_sdvo_connector;
2292
2293 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2294 if (!intel_sdvo_connector)
2295 return false;
2296
2297 intel_connector = &intel_sdvo_connector->base;
2298 connector = &intel_connector->base;
2299 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2300 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2301
2302 if (device == 0) {
2303 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2304 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2305 } else if (device == 1) {
2306 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2307 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2308 }
2309
2310 /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
2311 intel_sdvo->base.cloneable = false;
2312
2313 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2314 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2315 goto err;
2316
2317 return true;
2318
2319 err:
2320 intel_sdvo_destroy(connector);
2321 return false;
2322 }
2323
2324 static bool
2325 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2326 {
2327 intel_sdvo->is_tv = false;
2328 intel_sdvo->base.needs_tv_clock = false;
2329 intel_sdvo->is_lvds = false;
2330
2331 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2332
2333 if (flags & SDVO_OUTPUT_TMDS0)
2334 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2335 return false;
2336
2337 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2338 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2339 return false;
2340
2341 /* TV has no XXX1 function block */
2342 if (flags & SDVO_OUTPUT_SVID0)
2343 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2344 return false;
2345
2346 if (flags & SDVO_OUTPUT_CVBS0)
2347 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2348 return false;
2349
2350 if (flags & SDVO_OUTPUT_YPRPB0)
2351 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2352 return false;
2353
2354 if (flags & SDVO_OUTPUT_RGB0)
2355 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2356 return false;
2357
2358 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2359 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2360 return false;
2361
2362 if (flags & SDVO_OUTPUT_LVDS0)
2363 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2364 return false;
2365
2366 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2367 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2368 return false;
2369
2370 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2371 unsigned char bytes[2];
2372
2373 intel_sdvo->controlled_output = 0;
2374 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2375 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2376 SDVO_NAME(intel_sdvo),
2377 bytes[0], bytes[1]);
2378 return false;
2379 }
2380 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2381
2382 return true;
2383 }
2384
2385 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2386 {
2387 struct drm_device *dev = intel_sdvo->base.base.dev;
2388 struct drm_connector *connector, *tmp;
2389
2390 list_for_each_entry_safe(connector, tmp,
2391 &dev->mode_config.connector_list, head) {
2392 if (intel_attached_encoder(connector) == &intel_sdvo->base)
2393 intel_sdvo_destroy(connector);
2394 }
2395 }
2396
2397 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2398 struct intel_sdvo_connector *intel_sdvo_connector,
2399 int type)
2400 {
2401 struct drm_device *dev = intel_sdvo->base.base.dev;
2402 struct intel_sdvo_tv_format format;
2403 uint32_t format_map, i;
2404
2405 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2406 return false;
2407
2408 BUILD_BUG_ON(sizeof(format) != 6);
2409 if (!intel_sdvo_get_value(intel_sdvo,
2410 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2411 &format, sizeof(format)))
2412 return false;
2413
2414 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2415
2416 if (format_map == 0)
2417 return false;
2418
2419 intel_sdvo_connector->format_supported_num = 0;
2420 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2421 if (format_map & (1 << i))
2422 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2423
2424
2425 intel_sdvo_connector->tv_format =
2426 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2427 "mode", intel_sdvo_connector->format_supported_num);
2428 if (!intel_sdvo_connector->tv_format)
2429 return false;
2430
2431 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2432 drm_property_add_enum(
2433 intel_sdvo_connector->tv_format, i,
2434 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2435
2436 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2437 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2438 intel_sdvo_connector->tv_format, 0);
2439 return true;
2440
2441 }
2442
2443 #define ENHANCEMENT(name, NAME) do { \
2444 if (enhancements.name) { \
2445 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2446 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2447 return false; \
2448 intel_sdvo_connector->max_##name = data_value[0]; \
2449 intel_sdvo_connector->cur_##name = response; \
2450 intel_sdvo_connector->name = \
2451 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2452 if (!intel_sdvo_connector->name) return false; \
2453 drm_connector_attach_property(connector, \
2454 intel_sdvo_connector->name, \
2455 intel_sdvo_connector->cur_##name); \
2456 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2457 data_value[0], data_value[1], response); \
2458 } \
2459 } while (0)
2460
2461 static bool
2462 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2463 struct intel_sdvo_connector *intel_sdvo_connector,
2464 struct intel_sdvo_enhancements_reply enhancements)
2465 {
2466 struct drm_device *dev = intel_sdvo->base.base.dev;
2467 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2468 uint16_t response, data_value[2];
2469
2470 /* when horizontal overscan is supported, Add the left/right property */
2471 if (enhancements.overscan_h) {
2472 if (!intel_sdvo_get_value(intel_sdvo,
2473 SDVO_CMD_GET_MAX_OVERSCAN_H,
2474 &data_value, 4))
2475 return false;
2476
2477 if (!intel_sdvo_get_value(intel_sdvo,
2478 SDVO_CMD_GET_OVERSCAN_H,
2479 &response, 2))
2480 return false;
2481
2482 intel_sdvo_connector->max_hscan = data_value[0];
2483 intel_sdvo_connector->left_margin = data_value[0] - response;
2484 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2485 intel_sdvo_connector->left =
2486 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2487 if (!intel_sdvo_connector->left)
2488 return false;
2489
2490 drm_connector_attach_property(connector,
2491 intel_sdvo_connector->left,
2492 intel_sdvo_connector->left_margin);
2493
2494 intel_sdvo_connector->right =
2495 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2496 if (!intel_sdvo_connector->right)
2497 return false;
2498
2499 drm_connector_attach_property(connector,
2500 intel_sdvo_connector->right,
2501 intel_sdvo_connector->right_margin);
2502 DRM_DEBUG_KMS("h_overscan: max %d, "
2503 "default %d, current %d\n",
2504 data_value[0], data_value[1], response);
2505 }
2506
2507 if (enhancements.overscan_v) {
2508 if (!intel_sdvo_get_value(intel_sdvo,
2509 SDVO_CMD_GET_MAX_OVERSCAN_V,
2510 &data_value, 4))
2511 return false;
2512
2513 if (!intel_sdvo_get_value(intel_sdvo,
2514 SDVO_CMD_GET_OVERSCAN_V,
2515 &response, 2))
2516 return false;
2517
2518 intel_sdvo_connector->max_vscan = data_value[0];
2519 intel_sdvo_connector->top_margin = data_value[0] - response;
2520 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2521 intel_sdvo_connector->top =
2522 drm_property_create_range(dev, 0,
2523 "top_margin", 0, data_value[0]);
2524 if (!intel_sdvo_connector->top)
2525 return false;
2526
2527 drm_connector_attach_property(connector,
2528 intel_sdvo_connector->top,
2529 intel_sdvo_connector->top_margin);
2530
2531 intel_sdvo_connector->bottom =
2532 drm_property_create_range(dev, 0,
2533 "bottom_margin", 0, data_value[0]);
2534 if (!intel_sdvo_connector->bottom)
2535 return false;
2536
2537 drm_connector_attach_property(connector,
2538 intel_sdvo_connector->bottom,
2539 intel_sdvo_connector->bottom_margin);
2540 DRM_DEBUG_KMS("v_overscan: max %d, "
2541 "default %d, current %d\n",
2542 data_value[0], data_value[1], response);
2543 }
2544
2545 ENHANCEMENT(hpos, HPOS);
2546 ENHANCEMENT(vpos, VPOS);
2547 ENHANCEMENT(saturation, SATURATION);
2548 ENHANCEMENT(contrast, CONTRAST);
2549 ENHANCEMENT(hue, HUE);
2550 ENHANCEMENT(sharpness, SHARPNESS);
2551 ENHANCEMENT(brightness, BRIGHTNESS);
2552 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2553 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2554 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2555 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2556 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2557
2558 if (enhancements.dot_crawl) {
2559 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2560 return false;
2561
2562 intel_sdvo_connector->max_dot_crawl = 1;
2563 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2564 intel_sdvo_connector->dot_crawl =
2565 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2566 if (!intel_sdvo_connector->dot_crawl)
2567 return false;
2568
2569 drm_connector_attach_property(connector,
2570 intel_sdvo_connector->dot_crawl,
2571 intel_sdvo_connector->cur_dot_crawl);
2572 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2573 }
2574
2575 return true;
2576 }
2577
2578 static bool
2579 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2580 struct intel_sdvo_connector *intel_sdvo_connector,
2581 struct intel_sdvo_enhancements_reply enhancements)
2582 {
2583 struct drm_device *dev = intel_sdvo->base.base.dev;
2584 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2585 uint16_t response, data_value[2];
2586
2587 ENHANCEMENT(brightness, BRIGHTNESS);
2588
2589 return true;
2590 }
2591 #undef ENHANCEMENT
2592
2593 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2594 struct intel_sdvo_connector *intel_sdvo_connector)
2595 {
2596 union {
2597 struct intel_sdvo_enhancements_reply reply;
2598 uint16_t response;
2599 } enhancements;
2600
2601 BUILD_BUG_ON(sizeof(enhancements) != 2);
2602
2603 enhancements.response = 0;
2604 intel_sdvo_get_value(intel_sdvo,
2605 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2606 &enhancements, sizeof(enhancements));
2607 if (enhancements.response == 0) {
2608 DRM_DEBUG_KMS("No enhancement is supported\n");
2609 return true;
2610 }
2611
2612 if (IS_TV(intel_sdvo_connector))
2613 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2614 else if (IS_LVDS(intel_sdvo_connector))
2615 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2616 else
2617 return true;
2618 }
2619
2620 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2621 struct i2c_msg *msgs,
2622 int num)
2623 {
2624 struct intel_sdvo *sdvo = adapter->algo_data;
2625
2626 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2627 return -EIO;
2628
2629 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2630 }
2631
2632 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2633 {
2634 struct intel_sdvo *sdvo = adapter->algo_data;
2635 return sdvo->i2c->algo->functionality(sdvo->i2c);
2636 }
2637
2638 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2639 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2640 .functionality = intel_sdvo_ddc_proxy_func
2641 };
2642
2643 static bool
2644 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2645 struct drm_device *dev)
2646 {
2647 sdvo->ddc.owner = THIS_MODULE;
2648 sdvo->ddc.class = I2C_CLASS_DDC;
2649 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2650 sdvo->ddc.dev.parent = &dev->pdev->dev;
2651 sdvo->ddc.algo_data = sdvo;
2652 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2653
2654 return i2c_add_adapter(&sdvo->ddc) == 0;
2655 }
2656
2657 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2658 {
2659 struct drm_i915_private *dev_priv = dev->dev_private;
2660 struct intel_encoder *intel_encoder;
2661 struct intel_sdvo *intel_sdvo;
2662 u32 hotplug_mask;
2663 int i;
2664
2665 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2666 if (!intel_sdvo)
2667 return false;
2668
2669 intel_sdvo->sdvo_reg = sdvo_reg;
2670 intel_sdvo->is_sdvob = is_sdvob;
2671 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2672 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2673 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2674 kfree(intel_sdvo);
2675 return false;
2676 }
2677
2678 /* encoder type will be decided later */
2679 intel_encoder = &intel_sdvo->base;
2680 intel_encoder->type = INTEL_OUTPUT_SDVO;
2681 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2682
2683 /* Read the regs to test if we can talk to the device */
2684 for (i = 0; i < 0x40; i++) {
2685 u8 byte;
2686
2687 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2688 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2689 SDVO_NAME(intel_sdvo));
2690 goto err;
2691 }
2692 }
2693
2694 hotplug_mask = 0;
2695 if (IS_G4X(dev)) {
2696 hotplug_mask = intel_sdvo->is_sdvob ?
2697 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2698 } else if (IS_GEN4(dev)) {
2699 hotplug_mask = intel_sdvo->is_sdvob ?
2700 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2701 } else {
2702 hotplug_mask = intel_sdvo->is_sdvob ?
2703 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2704 }
2705
2706 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2707
2708 intel_encoder->disable = intel_disable_sdvo;
2709 intel_encoder->enable = intel_enable_sdvo;
2710 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2711
2712 /* In default case sdvo lvds is false */
2713 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2714 goto err;
2715
2716 if (intel_sdvo_output_setup(intel_sdvo,
2717 intel_sdvo->caps.output_flags) != true) {
2718 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2719 SDVO_NAME(intel_sdvo));
2720 /* Output_setup can leave behind connectors! */
2721 goto err_output;
2722 }
2723
2724 /* Only enable the hotplug irq if we need it, to work around noisy
2725 * hotplug lines.
2726 */
2727 if (intel_sdvo->hotplug_active)
2728 dev_priv->hotplug_supported_mask |= hotplug_mask;
2729
2730 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2731
2732 /* Set the input timing to the screen. Assume always input 0. */
2733 if (!intel_sdvo_set_target_input(intel_sdvo))
2734 goto err_output;
2735
2736 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2737 &intel_sdvo->pixel_clock_min,
2738 &intel_sdvo->pixel_clock_max))
2739 goto err_output;
2740
2741 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2742 "clock range %dMHz - %dMHz, "
2743 "input 1: %c, input 2: %c, "
2744 "output 1: %c, output 2: %c\n",
2745 SDVO_NAME(intel_sdvo),
2746 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2747 intel_sdvo->caps.device_rev_id,
2748 intel_sdvo->pixel_clock_min / 1000,
2749 intel_sdvo->pixel_clock_max / 1000,
2750 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2751 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2752 /* check currently supported outputs */
2753 intel_sdvo->caps.output_flags &
2754 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2755 intel_sdvo->caps.output_flags &
2756 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2757 return true;
2758
2759 err_output:
2760 intel_sdvo_output_cleanup(intel_sdvo);
2761
2762 err:
2763 drm_encoder_cleanup(&intel_encoder->base);
2764 i2c_del_adapter(&intel_sdvo->ddc);
2765 kfree(intel_sdvo);
2766
2767 return false;
2768 }
Linux kernel - Deliverables
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