2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_atomic_helper.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_crtc_helper.h>
23 #include <drm/drm_of.h>
24 #include <drm/drm_panel.h>
25 #include <linux/mfd/syscon.h>
26 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include <linux/of_device.h>
28 #include <linux/of_graph.h>
29 #include <video/of_display_timing.h>
30 #include <video/of_videomode.h>
31 #include <linux/regmap.h>
32 #include <linux/videodev2.h>
36 #define DRIVER_NAME "imx-ldb"
38 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
39 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
40 #define LDB_CH0_MODE_EN_MASK (3 << 0)
41 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
42 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
43 #define LDB_CH1_MODE_EN_MASK (3 << 2)
44 #define LDB_SPLIT_MODE_EN (1 << 4)
45 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
46 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
47 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
48 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
49 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
50 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
51 #define LDB_BGREF_RMODE_INT (1 << 15)
53 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
54 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
58 struct imx_ldb_channel
{
60 struct drm_connector connector
;
61 struct drm_encoder encoder
;
62 struct drm_panel
*panel
;
63 struct device_node
*child
;
64 struct i2c_adapter
*ddc
;
68 struct drm_display_mode mode
;
80 struct regmap
*regmap
;
82 struct imx_ldb_channel channel
[2];
83 struct clk
*clk
[2]; /* our own clock */
84 struct clk
*clk_sel
[4]; /* parent of display clock */
85 struct clk
*clk_parent
[4]; /* original parent of clk_sel */
86 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
88 const struct bus_mux
*lvds_mux
;
91 static enum drm_connector_status
imx_ldb_connector_detect(
92 struct drm_connector
*connector
, bool force
)
94 return connector_status_connected
;
97 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
99 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
102 if (imx_ldb_ch
->panel
&& imx_ldb_ch
->panel
->funcs
&&
103 imx_ldb_ch
->panel
->funcs
->get_modes
) {
104 struct drm_display_info
*di
= &connector
->display_info
;
106 num_modes
= imx_ldb_ch
->panel
->funcs
->get_modes(imx_ldb_ch
->panel
);
107 if (!imx_ldb_ch
->bus_format
&& di
->num_bus_formats
)
108 imx_ldb_ch
->bus_format
= di
->bus_formats
[0];
113 if (!imx_ldb_ch
->edid
&& imx_ldb_ch
->ddc
)
114 imx_ldb_ch
->edid
= drm_get_edid(connector
, imx_ldb_ch
->ddc
);
116 if (imx_ldb_ch
->edid
) {
117 drm_mode_connector_update_edid_property(connector
,
119 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
122 if (imx_ldb_ch
->mode_valid
) {
123 struct drm_display_mode
*mode
;
125 mode
= drm_mode_create(connector
->dev
);
128 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
129 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
130 drm_mode_probed_add(connector
, mode
);
137 static struct drm_encoder
*imx_ldb_connector_best_encoder(
138 struct drm_connector
*connector
)
140 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
142 return &imx_ldb_ch
->encoder
;
145 static void imx_ldb_encoder_dpms(struct drm_encoder
*encoder
, int mode
)
149 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
150 unsigned long serial_clk
, unsigned long di_clk
)
154 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
155 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
156 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
158 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
159 clk_get_rate(ldb
->clk_pll
[chno
]));
161 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
162 clk_get_rate(ldb
->clk
[chno
]),
164 clk_set_rate(ldb
->clk
[chno
], di_clk
);
166 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
167 clk_get_rate(ldb
->clk
[chno
]));
169 /* set display clock mux to LDB input clock */
170 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
173 "unable to set di%d parent clock to ldb_di%d\n", mux
,
177 static void imx_ldb_encoder_prepare(struct drm_encoder
*encoder
)
179 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
180 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
181 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
184 switch (imx_ldb_ch
->bus_format
) {
187 "could not determine data mapping, default to 18-bit \"spwg\"\n");
189 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
:
190 bus_format
= MEDIA_BUS_FMT_RGB666_1X18
;
192 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
:
193 bus_format
= MEDIA_BUS_FMT_RGB888_1X24
;
194 if (imx_ldb_ch
->chno
== 0 || dual
)
195 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
;
196 if (imx_ldb_ch
->chno
== 1 || dual
)
197 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
;
199 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
:
200 bus_format
= MEDIA_BUS_FMT_RGB888_1X24
;
201 if (imx_ldb_ch
->chno
== 0 || dual
)
202 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
|
203 LDB_BIT_MAP_CH0_JEIDA
;
204 if (imx_ldb_ch
->chno
== 1 || dual
)
205 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
|
206 LDB_BIT_MAP_CH1_JEIDA
;
210 imx_drm_set_bus_format(encoder
, bus_format
);
213 static void imx_ldb_encoder_commit(struct drm_encoder
*encoder
)
215 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
216 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
217 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
218 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
220 drm_panel_prepare(imx_ldb_ch
->panel
);
223 clk_prepare_enable(ldb
->clk
[0]);
224 clk_prepare_enable(ldb
->clk
[1]);
227 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
228 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
229 if (mux
== 0 || ldb
->lvds_mux
)
230 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
232 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
234 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
235 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
236 if (mux
== 1 || ldb
->lvds_mux
)
237 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
239 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
243 const struct bus_mux
*lvds_mux
= NULL
;
245 if (imx_ldb_ch
== &ldb
->channel
[0])
246 lvds_mux
= &ldb
->lvds_mux
[0];
247 else if (imx_ldb_ch
== &ldb
->channel
[1])
248 lvds_mux
= &ldb
->lvds_mux
[1];
250 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
251 mux
<< lvds_mux
->shift
);
254 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
256 drm_panel_enable(imx_ldb_ch
->panel
);
259 static void imx_ldb_encoder_mode_set(struct drm_encoder
*encoder
,
260 struct drm_display_mode
*orig_mode
,
261 struct drm_display_mode
*mode
)
263 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
264 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
265 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
266 unsigned long serial_clk
;
267 unsigned long di_clk
= mode
->clock
* 1000;
268 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
270 if (mode
->clock
> 170000) {
272 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
274 if (mode
->clock
> 85000 && !dual
) {
276 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
280 serial_clk
= 3500UL * mode
->clock
;
281 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
282 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
284 serial_clk
= 7000UL * mode
->clock
;
285 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
,
289 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
290 if (imx_ldb_ch
== &ldb
->channel
[0]) {
291 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
292 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
293 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
294 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
296 if (imx_ldb_ch
== &ldb
->channel
[1]) {
297 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
298 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
299 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
300 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
304 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
306 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
307 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
311 * imx_ldb_encoder_disable is called by
312 * drm_helper_disable_unused_functions without
313 * the encoder being enabled before.
315 if (imx_ldb_ch
== &ldb
->channel
[0] &&
316 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
318 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
319 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
322 drm_panel_disable(imx_ldb_ch
->panel
);
324 if (imx_ldb_ch
== &ldb
->channel
[0])
325 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
326 else if (imx_ldb_ch
== &ldb
->channel
[1])
327 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
329 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
331 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
332 clk_disable_unprepare(ldb
->clk
[0]);
333 clk_disable_unprepare(ldb
->clk
[1]);
337 const struct bus_mux
*lvds_mux
= NULL
;
339 if (imx_ldb_ch
== &ldb
->channel
[0])
340 lvds_mux
= &ldb
->lvds_mux
[0];
341 else if (imx_ldb_ch
== &ldb
->channel
[1])
342 lvds_mux
= &ldb
->lvds_mux
[1];
344 regmap_read(ldb
->regmap
, lvds_mux
->reg
, &mux
);
345 mux
&= lvds_mux
->mask
;
346 mux
>>= lvds_mux
->shift
;
348 mux
= (imx_ldb_ch
== &ldb
->channel
[0]) ? 0 : 1;
351 /* set display clock mux back to original input clock */
352 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk_parent
[mux
]);
355 "unable to set di%d parent clock to original parent\n",
358 drm_panel_unprepare(imx_ldb_ch
->panel
);
361 static const struct drm_connector_funcs imx_ldb_connector_funcs
= {
362 .dpms
= drm_helper_connector_dpms
,
363 .fill_modes
= drm_helper_probe_single_connector_modes
,
364 .detect
= imx_ldb_connector_detect
,
365 .destroy
= imx_drm_connector_destroy
,
366 .reset
= drm_atomic_helper_connector_reset
,
367 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
368 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
371 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
372 .get_modes
= imx_ldb_connector_get_modes
,
373 .best_encoder
= imx_ldb_connector_best_encoder
,
376 static const struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
377 .destroy
= imx_drm_encoder_destroy
,
380 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
381 .dpms
= imx_ldb_encoder_dpms
,
382 .prepare
= imx_ldb_encoder_prepare
,
383 .commit
= imx_ldb_encoder_commit
,
384 .mode_set
= imx_ldb_encoder_mode_set
,
385 .disable
= imx_ldb_encoder_disable
,
388 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
392 snprintf(clkname
, sizeof(clkname
), "di%d", chno
);
393 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
394 if (IS_ERR(ldb
->clk
[chno
]))
395 return PTR_ERR(ldb
->clk
[chno
]);
397 snprintf(clkname
, sizeof(clkname
), "di%d_pll", chno
);
398 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
400 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
403 static int imx_ldb_register(struct drm_device
*drm
,
404 struct imx_ldb_channel
*imx_ldb_ch
)
406 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
409 ret
= imx_drm_encoder_parse_of(drm
, &imx_ldb_ch
->encoder
,
414 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
418 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
419 ret
= imx_ldb_get_clk(ldb
, 1);
424 drm_encoder_helper_add(&imx_ldb_ch
->encoder
,
425 &imx_ldb_encoder_helper_funcs
);
426 drm_encoder_init(drm
, &imx_ldb_ch
->encoder
, &imx_ldb_encoder_funcs
,
427 DRM_MODE_ENCODER_LVDS
, NULL
);
429 drm_connector_helper_add(&imx_ldb_ch
->connector
,
430 &imx_ldb_connector_helper_funcs
);
431 drm_connector_init(drm
, &imx_ldb_ch
->connector
,
432 &imx_ldb_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
434 if (imx_ldb_ch
->panel
)
435 drm_panel_attach(imx_ldb_ch
->panel
, &imx_ldb_ch
->connector
);
437 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
,
438 &imx_ldb_ch
->encoder
);
448 struct imx_ldb_bit_mapping
{
451 const char * const mapping
;
454 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings
[] = {
455 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
, 18, "spwg" },
456 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
, 24, "spwg" },
457 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
, 24, "jeida" },
460 static u32
of_get_bus_format(struct device
*dev
, struct device_node
*np
)
466 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
470 of_property_read_u32(np
, "fsl,data-width", &datawidth
);
472 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++) {
473 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
].mapping
) &&
474 datawidth
== imx_ldb_bit_mappings
[i
].datawidth
)
475 return imx_ldb_bit_mappings
[i
].bus_format
;
478 dev_err(dev
, "invalid data mapping: %d-bit \"%s\"\n", datawidth
, bm
);
483 static struct bus_mux imx6q_lvds_mux
[2] = {
487 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
491 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
496 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
497 * of_match_device will walk through this list and take the first entry
498 * matching any of its compatible values. Therefore, the more generic
499 * entries (in this case fsl,imx53-ldb) need to be ordered last.
501 static const struct of_device_id imx_ldb_dt_ids
[] = {
502 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
503 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
506 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
508 static int imx_ldb_bind(struct device
*dev
, struct device
*master
, void *data
)
510 struct drm_device
*drm
= data
;
511 struct device_node
*np
= dev
->of_node
;
512 const struct of_device_id
*of_id
=
513 of_match_device(imx_ldb_dt_ids
, dev
);
514 struct device_node
*child
;
516 struct imx_ldb
*imx_ldb
;
521 imx_ldb
= devm_kzalloc(dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
525 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
526 if (IS_ERR(imx_ldb
->regmap
)) {
527 dev_err(dev
, "failed to get parent regmap\n");
528 return PTR_ERR(imx_ldb
->regmap
);
534 imx_ldb
->lvds_mux
= of_id
->data
;
536 dual
= of_property_read_bool(np
, "fsl,dual-channel");
538 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
541 * There are three different possible clock mux configurations:
542 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
543 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
544 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
545 * Map them all to di0_sel...di3_sel.
547 for (i
= 0; i
< 4; i
++) {
550 sprintf(clkname
, "di%d_sel", i
);
551 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
552 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
553 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
554 imx_ldb
->clk_sel
[i
] = NULL
;
558 imx_ldb
->clk_parent
[i
] = clk_get_parent(imx_ldb
->clk_sel
[i
]);
563 for_each_child_of_node(np
, child
) {
564 struct imx_ldb_channel
*channel
;
565 struct device_node
*ddc_node
;
566 struct device_node
*ep
;
568 ret
= of_property_read_u32(child
, "reg", &i
);
569 if (ret
|| i
< 0 || i
> 1)
573 dev_warn(dev
, "dual-channel mode, ignoring second output\n");
577 if (!of_device_is_available(child
))
580 channel
= &imx_ldb
->channel
[i
];
581 channel
->ldb
= imx_ldb
;
583 channel
->child
= child
;
586 * The output port is port@4 with an external 4-port mux or
587 * port@2 with the internal 2-port mux.
589 ep
= of_graph_get_endpoint_by_regs(child
,
590 imx_ldb
->lvds_mux
? 4 : 2,
593 struct device_node
*remote
;
595 remote
= of_graph_get_remote_port_parent(ep
);
598 channel
->panel
= of_drm_find_panel(remote
);
600 return -EPROBE_DEFER
;
602 if (!channel
->panel
) {
603 dev_err(dev
, "panel not found: %s\n",
605 return -EPROBE_DEFER
;
609 ddc_node
= of_parse_phandle(child
, "ddc-i2c-bus", 0);
611 channel
->ddc
= of_find_i2c_adapter_by_node(ddc_node
);
612 of_node_put(ddc_node
);
614 dev_warn(dev
, "failed to get ddc i2c adapter\n");
615 return -EPROBE_DEFER
;
620 /* if no DDC available, fallback to hardcoded EDID */
621 dev_dbg(dev
, "no ddc available\n");
623 edidp
= of_get_property(child
, "edid",
626 channel
->edid
= kmemdup(edidp
,
629 } else if (!channel
->panel
) {
630 /* fallback to display-timings node */
631 ret
= of_get_drm_display_mode(child
,
635 channel
->mode_valid
= 1;
639 channel
->bus_format
= of_get_bus_format(dev
, child
);
640 if (channel
->bus_format
== -EINVAL
) {
642 * If no bus format was specified in the device tree,
643 * we can still get it from the connected panel later.
645 if (channel
->panel
&& channel
->panel
->funcs
&&
646 channel
->panel
->funcs
->get_modes
)
647 channel
->bus_format
= 0;
649 if (channel
->bus_format
< 0) {
650 dev_err(dev
, "could not determine data mapping: %d\n",
651 channel
->bus_format
);
652 return channel
->bus_format
;
655 ret
= imx_ldb_register(drm
, channel
);
660 dev_set_drvdata(dev
, imx_ldb
);
665 static void imx_ldb_unbind(struct device
*dev
, struct device
*master
,
668 struct imx_ldb
*imx_ldb
= dev_get_drvdata(dev
);
671 for (i
= 0; i
< 2; i
++) {
672 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
674 if (!channel
->connector
.funcs
)
677 channel
->connector
.funcs
->destroy(&channel
->connector
);
678 channel
->encoder
.funcs
->destroy(&channel
->encoder
);
680 kfree(channel
->edid
);
681 i2c_put_adapter(channel
->ddc
);
685 static const struct component_ops imx_ldb_ops
= {
686 .bind
= imx_ldb_bind
,
687 .unbind
= imx_ldb_unbind
,
690 static int imx_ldb_probe(struct platform_device
*pdev
)
692 return component_add(&pdev
->dev
, &imx_ldb_ops
);
695 static int imx_ldb_remove(struct platform_device
*pdev
)
697 component_del(&pdev
->dev
, &imx_ldb_ops
);
701 static struct platform_driver imx_ldb_driver
= {
702 .probe
= imx_ldb_probe
,
703 .remove
= imx_ldb_remove
,
705 .of_match_table
= imx_ldb_dt_ids
,
710 module_platform_driver(imx_ldb_driver
);
712 MODULE_DESCRIPTION("i.MX LVDS driver");
713 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
714 MODULE_LICENSE("GPL");
715 MODULE_ALIAS("platform:" DRIVER_NAME
);