2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_atomic.h>
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_of.h>
25 #include <drm/drm_panel.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28 #include <linux/of_device.h>
29 #include <linux/of_graph.h>
30 #include <video/of_display_timing.h>
31 #include <video/of_videomode.h>
32 #include <linux/regmap.h>
33 #include <linux/videodev2.h>
37 #define DRIVER_NAME "imx-ldb"
39 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
40 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
41 #define LDB_CH0_MODE_EN_MASK (3 << 0)
42 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
43 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
44 #define LDB_CH1_MODE_EN_MASK (3 << 2)
45 #define LDB_SPLIT_MODE_EN (1 << 4)
46 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
47 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
48 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
49 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
50 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
51 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
52 #define LDB_BGREF_RMODE_INT (1 << 15)
56 struct imx_ldb_channel
{
58 struct drm_connector connector
;
59 struct drm_encoder encoder
;
60 struct drm_panel
*panel
;
61 struct device_node
*child
;
62 struct i2c_adapter
*ddc
;
66 struct drm_display_mode mode
;
71 static inline struct imx_ldb_channel
*con_to_imx_ldb_ch(struct drm_connector
*c
)
73 return container_of(c
, struct imx_ldb_channel
, connector
);
76 static inline struct imx_ldb_channel
*enc_to_imx_ldb_ch(struct drm_encoder
*e
)
78 return container_of(e
, struct imx_ldb_channel
, encoder
);
88 struct regmap
*regmap
;
90 struct imx_ldb_channel channel
[2];
91 struct clk
*clk
[2]; /* our own clock */
92 struct clk
*clk_sel
[4]; /* parent of display clock */
93 struct clk
*clk_parent
[4]; /* original parent of clk_sel */
94 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
96 const struct bus_mux
*lvds_mux
;
99 static enum drm_connector_status
imx_ldb_connector_detect(
100 struct drm_connector
*connector
, bool force
)
102 return connector_status_connected
;
105 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel
*imx_ldb_ch
,
108 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
109 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
111 switch (bus_format
) {
112 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
:
114 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
:
115 if (imx_ldb_ch
->chno
== 0 || dual
)
116 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
;
117 if (imx_ldb_ch
->chno
== 1 || dual
)
118 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
;
120 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
:
121 if (imx_ldb_ch
->chno
== 0 || dual
)
122 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
|
123 LDB_BIT_MAP_CH0_JEIDA
;
124 if (imx_ldb_ch
->chno
== 1 || dual
)
125 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
|
126 LDB_BIT_MAP_CH1_JEIDA
;
131 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
133 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
136 if (imx_ldb_ch
->panel
&& imx_ldb_ch
->panel
->funcs
&&
137 imx_ldb_ch
->panel
->funcs
->get_modes
) {
138 num_modes
= imx_ldb_ch
->panel
->funcs
->get_modes(imx_ldb_ch
->panel
);
143 if (!imx_ldb_ch
->edid
&& imx_ldb_ch
->ddc
)
144 imx_ldb_ch
->edid
= drm_get_edid(connector
, imx_ldb_ch
->ddc
);
146 if (imx_ldb_ch
->edid
) {
147 drm_mode_connector_update_edid_property(connector
,
149 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
152 if (imx_ldb_ch
->mode_valid
) {
153 struct drm_display_mode
*mode
;
155 mode
= drm_mode_create(connector
->dev
);
158 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
159 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
160 drm_mode_probed_add(connector
, mode
);
167 static struct drm_encoder
*imx_ldb_connector_best_encoder(
168 struct drm_connector
*connector
)
170 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
172 return &imx_ldb_ch
->encoder
;
175 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
176 unsigned long serial_clk
, unsigned long di_clk
)
180 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
181 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
182 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
184 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
185 clk_get_rate(ldb
->clk_pll
[chno
]));
187 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
188 clk_get_rate(ldb
->clk
[chno
]),
190 clk_set_rate(ldb
->clk
[chno
], di_clk
);
192 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
193 clk_get_rate(ldb
->clk
[chno
]));
195 /* set display clock mux to LDB input clock */
196 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
199 "unable to set di%d parent clock to ldb_di%d\n", mux
,
203 static void imx_ldb_encoder_enable(struct drm_encoder
*encoder
)
205 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
206 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
207 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
208 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
210 drm_panel_prepare(imx_ldb_ch
->panel
);
213 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[0]);
214 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[1]);
216 clk_prepare_enable(ldb
->clk
[0]);
217 clk_prepare_enable(ldb
->clk
[1]);
219 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[imx_ldb_ch
->chno
]);
222 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
223 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
224 if (mux
== 0 || ldb
->lvds_mux
)
225 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
227 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
229 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
230 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
231 if (mux
== 1 || ldb
->lvds_mux
)
232 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
234 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
238 const struct bus_mux
*lvds_mux
= NULL
;
240 if (imx_ldb_ch
== &ldb
->channel
[0])
241 lvds_mux
= &ldb
->lvds_mux
[0];
242 else if (imx_ldb_ch
== &ldb
->channel
[1])
243 lvds_mux
= &ldb
->lvds_mux
[1];
245 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
246 mux
<< lvds_mux
->shift
);
249 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
251 drm_panel_enable(imx_ldb_ch
->panel
);
254 static void imx_ldb_encoder_mode_set(struct drm_encoder
*encoder
,
255 struct drm_display_mode
*orig_mode
,
256 struct drm_display_mode
*mode
)
258 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
259 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
260 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
261 unsigned long serial_clk
;
262 unsigned long di_clk
= mode
->clock
* 1000;
263 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
264 u32 bus_format
= imx_ldb_ch
->bus_format
;
266 if (mode
->clock
> 170000) {
268 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
270 if (mode
->clock
> 85000 && !dual
) {
272 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
276 serial_clk
= 3500UL * mode
->clock
;
277 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
278 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
280 serial_clk
= 7000UL * mode
->clock
;
281 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
,
285 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
286 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
287 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
288 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
289 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
290 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
292 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
293 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
294 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
295 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
296 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
300 struct drm_connector_state
*conn_state
;
301 struct drm_connector
*connector
;
304 for_each_connector_in_state(encoder
->crtc
->state
->state
,
305 connector
, conn_state
, i
) {
306 struct drm_display_info
*di
= &connector
->display_info
;
308 if (conn_state
->crtc
== encoder
->crtc
&&
309 di
->num_bus_formats
) {
310 bus_format
= di
->bus_formats
[0];
315 imx_ldb_ch_set_bus_format(imx_ldb_ch
, bus_format
);
318 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
320 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
321 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
325 * imx_ldb_encoder_disable is called by
326 * drm_helper_disable_unused_functions without
327 * the encoder being enabled before.
329 if (imx_ldb_ch
== &ldb
->channel
[0] &&
330 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
332 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
333 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
336 drm_panel_disable(imx_ldb_ch
->panel
);
338 if (imx_ldb_ch
== &ldb
->channel
[0])
339 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
340 else if (imx_ldb_ch
== &ldb
->channel
[1])
341 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
343 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
345 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
346 clk_disable_unprepare(ldb
->clk
[0]);
347 clk_disable_unprepare(ldb
->clk
[1]);
351 const struct bus_mux
*lvds_mux
= NULL
;
353 if (imx_ldb_ch
== &ldb
->channel
[0])
354 lvds_mux
= &ldb
->lvds_mux
[0];
355 else if (imx_ldb_ch
== &ldb
->channel
[1])
356 lvds_mux
= &ldb
->lvds_mux
[1];
358 regmap_read(ldb
->regmap
, lvds_mux
->reg
, &mux
);
359 mux
&= lvds_mux
->mask
;
360 mux
>>= lvds_mux
->shift
;
362 mux
= (imx_ldb_ch
== &ldb
->channel
[0]) ? 0 : 1;
365 /* set display clock mux back to original input clock */
366 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk_parent
[mux
]);
369 "unable to set di%d parent clock to original parent\n",
372 drm_panel_unprepare(imx_ldb_ch
->panel
);
375 static int imx_ldb_encoder_atomic_check(struct drm_encoder
*encoder
,
376 struct drm_crtc_state
*crtc_state
,
377 struct drm_connector_state
*conn_state
)
379 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc_state
);
380 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
381 struct drm_display_info
*di
= &conn_state
->connector
->display_info
;
382 u32 bus_format
= imx_ldb_ch
->bus_format
;
384 /* Bus format description in DT overrides connector display info. */
385 if (!bus_format
&& di
->num_bus_formats
)
386 bus_format
= di
->bus_formats
[0];
387 switch (bus_format
) {
388 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
:
389 imx_crtc_state
->bus_format
= MEDIA_BUS_FMT_RGB666_1X18
;
391 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
:
392 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
:
393 imx_crtc_state
->bus_format
= MEDIA_BUS_FMT_RGB888_1X24
;
399 imx_crtc_state
->di_hsync_pin
= 2;
400 imx_crtc_state
->di_vsync_pin
= 3;
406 static const struct drm_connector_funcs imx_ldb_connector_funcs
= {
407 .dpms
= drm_atomic_helper_connector_dpms
,
408 .fill_modes
= drm_helper_probe_single_connector_modes
,
409 .detect
= imx_ldb_connector_detect
,
410 .destroy
= imx_drm_connector_destroy
,
411 .reset
= drm_atomic_helper_connector_reset
,
412 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
413 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
416 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
417 .get_modes
= imx_ldb_connector_get_modes
,
418 .best_encoder
= imx_ldb_connector_best_encoder
,
421 static const struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
422 .destroy
= imx_drm_encoder_destroy
,
425 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
426 .mode_set
= imx_ldb_encoder_mode_set
,
427 .enable
= imx_ldb_encoder_enable
,
428 .disable
= imx_ldb_encoder_disable
,
429 .atomic_check
= imx_ldb_encoder_atomic_check
,
432 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
436 snprintf(clkname
, sizeof(clkname
), "di%d", chno
);
437 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
438 if (IS_ERR(ldb
->clk
[chno
]))
439 return PTR_ERR(ldb
->clk
[chno
]);
441 snprintf(clkname
, sizeof(clkname
), "di%d_pll", chno
);
442 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
444 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
447 static int imx_ldb_register(struct drm_device
*drm
,
448 struct imx_ldb_channel
*imx_ldb_ch
)
450 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
451 struct drm_encoder
*encoder
= &imx_ldb_ch
->encoder
;
454 ret
= imx_drm_encoder_parse_of(drm
, encoder
, imx_ldb_ch
->child
);
458 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
462 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
463 ret
= imx_ldb_get_clk(ldb
, 1);
468 drm_encoder_helper_add(encoder
, &imx_ldb_encoder_helper_funcs
);
469 drm_encoder_init(drm
, encoder
, &imx_ldb_encoder_funcs
,
470 DRM_MODE_ENCODER_LVDS
, NULL
);
472 drm_connector_helper_add(&imx_ldb_ch
->connector
,
473 &imx_ldb_connector_helper_funcs
);
474 drm_connector_init(drm
, &imx_ldb_ch
->connector
,
475 &imx_ldb_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
477 if (imx_ldb_ch
->panel
) {
478 ret
= drm_panel_attach(imx_ldb_ch
->panel
,
479 &imx_ldb_ch
->connector
);
484 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
, encoder
);
494 struct imx_ldb_bit_mapping
{
497 const char * const mapping
;
500 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings
[] = {
501 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
, 18, "spwg" },
502 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
, 24, "spwg" },
503 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
, 24, "jeida" },
506 static u32
of_get_bus_format(struct device
*dev
, struct device_node
*np
)
512 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
516 of_property_read_u32(np
, "fsl,data-width", &datawidth
);
518 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++) {
519 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
].mapping
) &&
520 datawidth
== imx_ldb_bit_mappings
[i
].datawidth
)
521 return imx_ldb_bit_mappings
[i
].bus_format
;
524 dev_err(dev
, "invalid data mapping: %d-bit \"%s\"\n", datawidth
, bm
);
529 static struct bus_mux imx6q_lvds_mux
[2] = {
533 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
537 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
542 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
543 * of_match_device will walk through this list and take the first entry
544 * matching any of its compatible values. Therefore, the more generic
545 * entries (in this case fsl,imx53-ldb) need to be ordered last.
547 static const struct of_device_id imx_ldb_dt_ids
[] = {
548 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
549 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
552 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
554 static int imx_ldb_bind(struct device
*dev
, struct device
*master
, void *data
)
556 struct drm_device
*drm
= data
;
557 struct device_node
*np
= dev
->of_node
;
558 const struct of_device_id
*of_id
=
559 of_match_device(imx_ldb_dt_ids
, dev
);
560 struct device_node
*child
;
562 struct imx_ldb
*imx_ldb
;
567 imx_ldb
= devm_kzalloc(dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
571 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
572 if (IS_ERR(imx_ldb
->regmap
)) {
573 dev_err(dev
, "failed to get parent regmap\n");
574 return PTR_ERR(imx_ldb
->regmap
);
580 imx_ldb
->lvds_mux
= of_id
->data
;
582 dual
= of_property_read_bool(np
, "fsl,dual-channel");
584 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
587 * There are three different possible clock mux configurations:
588 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
589 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
590 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
591 * Map them all to di0_sel...di3_sel.
593 for (i
= 0; i
< 4; i
++) {
596 sprintf(clkname
, "di%d_sel", i
);
597 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
598 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
599 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
600 imx_ldb
->clk_sel
[i
] = NULL
;
604 imx_ldb
->clk_parent
[i
] = clk_get_parent(imx_ldb
->clk_sel
[i
]);
609 for_each_child_of_node(np
, child
) {
610 struct imx_ldb_channel
*channel
;
611 struct device_node
*ddc_node
;
612 struct device_node
*ep
;
615 ret
= of_property_read_u32(child
, "reg", &i
);
616 if (ret
|| i
< 0 || i
> 1)
620 dev_warn(dev
, "dual-channel mode, ignoring second output\n");
624 if (!of_device_is_available(child
))
627 channel
= &imx_ldb
->channel
[i
];
628 channel
->ldb
= imx_ldb
;
630 channel
->child
= child
;
633 * The output port is port@4 with an external 4-port mux or
634 * port@2 with the internal 2-port mux.
636 ep
= of_graph_get_endpoint_by_regs(child
,
637 imx_ldb
->lvds_mux
? 4 : 2,
640 struct device_node
*remote
;
642 remote
= of_graph_get_remote_port_parent(ep
);
645 channel
->panel
= of_drm_find_panel(remote
);
647 return -EPROBE_DEFER
;
649 if (!channel
->panel
) {
650 dev_err(dev
, "panel not found: %s\n",
652 return -EPROBE_DEFER
;
656 ddc_node
= of_parse_phandle(child
, "ddc-i2c-bus", 0);
658 channel
->ddc
= of_find_i2c_adapter_by_node(ddc_node
);
659 of_node_put(ddc_node
);
661 dev_warn(dev
, "failed to get ddc i2c adapter\n");
662 return -EPROBE_DEFER
;
667 /* if no DDC available, fallback to hardcoded EDID */
668 dev_dbg(dev
, "no ddc available\n");
670 edidp
= of_get_property(child
, "edid",
673 channel
->edid
= kmemdup(edidp
,
676 } else if (!channel
->panel
) {
677 /* fallback to display-timings node */
678 ret
= of_get_drm_display_mode(child
,
682 channel
->mode_valid
= 1;
686 bus_format
= of_get_bus_format(dev
, child
);
687 if (bus_format
== -EINVAL
) {
689 * If no bus format was specified in the device tree,
690 * we can still get it from the connected panel later.
692 if (channel
->panel
&& channel
->panel
->funcs
&&
693 channel
->panel
->funcs
->get_modes
)
696 if (bus_format
< 0) {
697 dev_err(dev
, "could not determine data mapping: %d\n",
701 channel
->bus_format
= bus_format
;
703 ret
= imx_ldb_register(drm
, channel
);
708 dev_set_drvdata(dev
, imx_ldb
);
713 static void imx_ldb_unbind(struct device
*dev
, struct device
*master
,
716 struct imx_ldb
*imx_ldb
= dev_get_drvdata(dev
);
719 for (i
= 0; i
< 2; i
++) {
720 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
722 if (!channel
->connector
.funcs
)
725 channel
->connector
.funcs
->destroy(&channel
->connector
);
726 channel
->encoder
.funcs
->destroy(&channel
->encoder
);
728 kfree(channel
->edid
);
729 i2c_put_adapter(channel
->ddc
);
733 static const struct component_ops imx_ldb_ops
= {
734 .bind
= imx_ldb_bind
,
735 .unbind
= imx_ldb_unbind
,
738 static int imx_ldb_probe(struct platform_device
*pdev
)
740 return component_add(&pdev
->dev
, &imx_ldb_ops
);
743 static int imx_ldb_remove(struct platform_device
*pdev
)
745 component_del(&pdev
->dev
, &imx_ldb_ops
);
749 static struct platform_driver imx_ldb_driver
= {
750 .probe
= imx_ldb_probe
,
751 .remove
= imx_ldb_remove
,
753 .of_match_table
= imx_ldb_dt_ids
,
758 module_platform_driver(imx_ldb_driver
);
760 MODULE_DESCRIPTION("i.MX LVDS driver");
761 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
762 MODULE_LICENSE("GPL");
763 MODULE_ALIAS("platform:" DRIVER_NAME
);