drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_fb_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <drm/drm_of.h>
  23 #include <drm/drm_panel.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  26 #include <linux/of_device.h>
  27 #include <linux/of_graph.h>
  28 #include <video/of_videomode.h>
  29 #include <linux/regmap.h>
  30 #include <linux/videodev2.h>
  31
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_NAME "imx-ldb"
  35
  36 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  37 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  38 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  39 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  40 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  41 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  42 #define LDB_SPLIT_MODE_EN               (1 << 4)
  43 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  44 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  45 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  46 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  47 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  48 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  49 #define LDB_BGREF_RMODE_INT             (1 << 15)
  50
  51 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  52 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  53
  54 struct imx_ldb;
  55
  56 struct imx_ldb_channel {
  57         struct imx_ldb *ldb;
  58         struct drm_connector connector;
  59         struct drm_encoder encoder;
  60         struct drm_panel *panel;
  61         struct device_node *child;
  62         int chno;
  63         void *edid;
  64         int edid_len;
  65         struct drm_display_mode mode;
  66         int mode_valid;
  67         int bus_format;
  68 };
  69
  70 struct bus_mux {
  71         int reg;
  72         int shift;
  73         int mask;
  74 };
  75
  76 struct imx_ldb {
  77         struct regmap *regmap;
  78         struct device *dev;
  79         struct imx_ldb_channel channel[2];
  80         struct clk *clk[2]; /* our own clock */
  81         struct clk *clk_sel[4]; /* parent of display clock */
  82         struct clk *clk_parent[4]; /* original parent of clk_sel */
  83         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  84         u32 ldb_ctrl;
  85         const struct bus_mux *lvds_mux;
  86 };
  87
  88 static enum drm_connector_status imx_ldb_connector_detect(
  89                 struct drm_connector *connector, bool force)
  90 {
  91         return connector_status_connected;
  92 }
  93
  94 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
  95 {
  96         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
  97         int num_modes = 0;
  98
  99         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
 100             imx_ldb_ch->panel->funcs->get_modes) {
 101                 struct drm_display_info *di = &connector->display_info;
 102
 103                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 104                 if (!imx_ldb_ch->bus_format && di->num_bus_formats)
 105                         imx_ldb_ch->bus_format = di->bus_formats[0];
 106                 if (num_modes > 0)
 107                         return num_modes;
 108         }
 109
 110         if (imx_ldb_ch->edid) {
 111                 drm_mode_connector_update_edid_property(connector,
 112                                                         imx_ldb_ch->edid);
 113                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 114         }
 115
 116         if (imx_ldb_ch->mode_valid) {
 117                 struct drm_display_mode *mode;
 118
 119                 mode = drm_mode_create(connector->dev);
 120                 if (!mode)
 121                         return -EINVAL;
 122                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 123                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 124                 drm_mode_probed_add(connector, mode);
 125                 num_modes++;
 126         }
 127
 128         return num_modes;
 129 }
 130
 131 static struct drm_encoder *imx_ldb_connector_best_encoder(
 132                 struct drm_connector *connector)
 133 {
 134         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 135
 136         return &imx_ldb_ch->encoder;
 137 }
 138
 139 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 140 {
 141 }
 142
 143 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 144                 unsigned long serial_clk, unsigned long di_clk)
 145 {
 146         int ret;
 147
 148         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 149                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 150         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 151
 152         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 153                         clk_get_rate(ldb->clk_pll[chno]));
 154
 155         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 156                         clk_get_rate(ldb->clk[chno]),
 157                         (long int)di_clk);
 158         clk_set_rate(ldb->clk[chno], di_clk);
 159
 160         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 161                         clk_get_rate(ldb->clk[chno]));
 162
 163         /* set display clock mux to LDB input clock */
 164         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 165         if (ret)
 166                 dev_err(ldb->dev,
 167                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 168                         chno);
 169 }
 170
 171 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 172 {
 173         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 174         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 175         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 176         u32 bus_format;
 177
 178         switch (imx_ldb_ch->bus_format) {
 179         default:
 180                 dev_warn(ldb->dev,
 181                          "could not determine data mapping, default to 18-bit \"spwg\"\n");
 182                 /* fallthrough */
 183         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 184                 bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 185                 break;
 186         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 187                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 188                 if (imx_ldb_ch->chno == 0 || dual)
 189                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 190                 if (imx_ldb_ch->chno == 1 || dual)
 191                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 192                 break;
 193         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 194                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 195                 if (imx_ldb_ch->chno == 0 || dual)
 196                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 197                                          LDB_BIT_MAP_CH0_JEIDA;
 198                 if (imx_ldb_ch->chno == 1 || dual)
 199                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 200                                          LDB_BIT_MAP_CH1_JEIDA;
 201                 break;
 202         }
 203
 204         imx_drm_set_bus_format(encoder, bus_format);
 205 }
 206
 207 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 208 {
 209         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 210         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 211         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 212         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 213
 214         drm_panel_prepare(imx_ldb_ch->panel);
 215
 216         if (dual) {
 217                 clk_prepare_enable(ldb->clk[0]);
 218                 clk_prepare_enable(ldb->clk[1]);
 219         }
 220
 221         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 222                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 223                 if (mux == 0 || ldb->lvds_mux)
 224                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 225                 else if (mux == 1)
 226                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 227         }
 228         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 229                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 230                 if (mux == 1 || ldb->lvds_mux)
 231                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 232                 else if (mux == 0)
 233                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 234         }
 235
 236         if (ldb->lvds_mux) {
 237                 const struct bus_mux *lvds_mux = NULL;
 238
 239                 if (imx_ldb_ch == &ldb->channel[0])
 240                         lvds_mux = &ldb->lvds_mux[0];
 241                 else if (imx_ldb_ch == &ldb->channel[1])
 242                         lvds_mux = &ldb->lvds_mux[1];
 243
 244                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 245                                    mux << lvds_mux->shift);
 246         }
 247
 248         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 249
 250         drm_panel_enable(imx_ldb_ch->panel);
 251 }
 252
 253 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 254                          struct drm_display_mode *orig_mode,
 255                          struct drm_display_mode *mode)
 256 {
 257         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 258         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 259         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 260         unsigned long serial_clk;
 261         unsigned long di_clk = mode->clock * 1000;
 262         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 263
 264         if (mode->clock > 170000) {
 265                 dev_warn(ldb->dev,
 266                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 267         }
 268         if (mode->clock > 85000 && !dual) {
 269                 dev_warn(ldb->dev,
 270                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 271         }
 272
 273         if (dual) {
 274                 serial_clk = 3500UL * mode->clock;
 275                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 276                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 277         } else {
 278                 serial_clk = 7000UL * mode->clock;
 279                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 280                                   di_clk);
 281         }
 282
 283         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 284         if (imx_ldb_ch == &ldb->channel[0]) {
 285                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 286                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 287                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 288                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 289         }
 290         if (imx_ldb_ch == &ldb->channel[1]) {
 291                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 292                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 293                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 294                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 295         }
 296 }
 297
 298 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 299 {
 300         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 301         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 302         int mux, ret;
 303
 304         /*
 305          * imx_ldb_encoder_disable is called by
 306          * drm_helper_disable_unused_functions without
 307          * the encoder being enabled before.
 308          */
 309         if (imx_ldb_ch == &ldb->channel[0] &&
 310             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 311                 return;
 312         else if (imx_ldb_ch == &ldb->channel[1] &&
 313                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 314                 return;
 315
 316         drm_panel_disable(imx_ldb_ch->panel);
 317
 318         if (imx_ldb_ch == &ldb->channel[0])
 319                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 320         else if (imx_ldb_ch == &ldb->channel[1])
 321                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 322
 323         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 324
 325         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 326                 clk_disable_unprepare(ldb->clk[0]);
 327                 clk_disable_unprepare(ldb->clk[1]);
 328         }
 329
 330         if (ldb->lvds_mux) {
 331                 const struct bus_mux *lvds_mux = NULL;
 332
 333                 if (imx_ldb_ch == &ldb->channel[0])
 334                         lvds_mux = &ldb->lvds_mux[0];
 335                 else if (imx_ldb_ch == &ldb->channel[1])
 336                         lvds_mux = &ldb->lvds_mux[1];
 337
 338                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 339                 mux &= lvds_mux->mask;
 340                 mux >>= lvds_mux->shift;
 341         } else {
 342                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 343         }
 344
 345         /* set display clock mux back to original input clock */
 346         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 347         if (ret)
 348                 dev_err(ldb->dev,
 349                         "unable to set di%d parent clock to original parent\n",
 350                         mux);
 351
 352         drm_panel_unprepare(imx_ldb_ch->panel);
 353 }
 354
 355 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 356         .dpms = drm_helper_connector_dpms,
 357         .fill_modes = drm_helper_probe_single_connector_modes,
 358         .detect = imx_ldb_connector_detect,
 359         .destroy = imx_drm_connector_destroy,
 360 };
 361
 362 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 363         .get_modes = imx_ldb_connector_get_modes,
 364         .best_encoder = imx_ldb_connector_best_encoder,
 365 };
 366
 367 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 368         .destroy = imx_drm_encoder_destroy,
 369 };
 370
 371 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 372         .dpms = imx_ldb_encoder_dpms,
 373         .prepare = imx_ldb_encoder_prepare,
 374         .commit = imx_ldb_encoder_commit,
 375         .mode_set = imx_ldb_encoder_mode_set,
 376         .disable = imx_ldb_encoder_disable,
 377 };
 378
 379 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 380 {
 381         char clkname[16];
 382
 383         snprintf(clkname, sizeof(clkname), "di%d", chno);
 384         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 385         if (IS_ERR(ldb->clk[chno]))
 386                 return PTR_ERR(ldb->clk[chno]);
 387
 388         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 389         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 390
 391         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 392 }
 393
 394 static int imx_ldb_register(struct drm_device *drm,
 395         struct imx_ldb_channel *imx_ldb_ch)
 396 {
 397         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 398         int ret;
 399
 400         ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
 401                                        imx_ldb_ch->child);
 402         if (ret)
 403                 return ret;
 404
 405         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 406         if (ret)
 407                 return ret;
 408
 409         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 410                 ret = imx_ldb_get_clk(ldb, 1);
 411                 if (ret)
 412                         return ret;
 413         }
 414
 415         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 416                         &imx_ldb_encoder_helper_funcs);
 417         drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
 418                          DRM_MODE_ENCODER_LVDS, NULL);
 419
 420         drm_connector_helper_add(&imx_ldb_ch->connector,
 421                         &imx_ldb_connector_helper_funcs);
 422         drm_connector_init(drm, &imx_ldb_ch->connector,
 423                            &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
 424
 425         if (imx_ldb_ch->panel)
 426                 drm_panel_attach(imx_ldb_ch->panel, &imx_ldb_ch->connector);
 427
 428         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 429                         &imx_ldb_ch->encoder);
 430
 431         return 0;
 432 }
 433
 434 enum {
 435         LVDS_BIT_MAP_SPWG,
 436         LVDS_BIT_MAP_JEIDA
 437 };
 438
 439 struct imx_ldb_bit_mapping {
 440         u32 bus_format;
 441         u32 datawidth;
 442         const char * const mapping;
 443 };
 444
 445 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 446         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 447         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 448         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 449 };
 450
 451 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 452 {
 453         const char *bm;
 454         u32 datawidth = 0;
 455         int ret, i;
 456
 457         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 458         if (ret < 0)
 459                 return ret;
 460
 461         of_property_read_u32(np, "fsl,data-width", &datawidth);
 462
 463         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 464                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 465                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 466                         return imx_ldb_bit_mappings[i].bus_format;
 467         }
 468
 469         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 470
 471         return -ENOENT;
 472 }
 473
 474 static struct bus_mux imx6q_lvds_mux[2] = {
 475         {
 476                 .reg = IOMUXC_GPR3,
 477                 .shift = 6,
 478                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 479         }, {
 480                 .reg = IOMUXC_GPR3,
 481                 .shift = 8,
 482                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 483         }
 484 };
 485
 486 /*
 487  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 488  * of_match_device will walk through this list and take the first entry
 489  * matching any of its compatible values. Therefore, the more generic
 490  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 491  */
 492 static const struct of_device_id imx_ldb_dt_ids[] = {
 493         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 494         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 495         { }
 496 };
 497 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 498
 499 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 500 {
 501         struct drm_device *drm = data;
 502         struct device_node *np = dev->of_node;
 503         const struct of_device_id *of_id =
 504                         of_match_device(imx_ldb_dt_ids, dev);
 505         struct device_node *child;
 506         const u8 *edidp;
 507         struct imx_ldb *imx_ldb;
 508         int dual;
 509         int ret;
 510         int i;
 511
 512         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 513         if (!imx_ldb)
 514                 return -ENOMEM;
 515
 516         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 517         if (IS_ERR(imx_ldb->regmap)) {
 518                 dev_err(dev, "failed to get parent regmap\n");
 519                 return PTR_ERR(imx_ldb->regmap);
 520         }
 521
 522         imx_ldb->dev = dev;
 523
 524         if (of_id)
 525                 imx_ldb->lvds_mux = of_id->data;
 526
 527         dual = of_property_read_bool(np, "fsl,dual-channel");
 528         if (dual)
 529                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 530
 531         /*
 532          * There are three different possible clock mux configurations:
 533          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 534          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 535          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 536          * Map them all to di0_sel...di3_sel.
 537          */
 538         for (i = 0; i < 4; i++) {
 539                 char clkname[16];
 540
 541                 sprintf(clkname, "di%d_sel", i);
 542                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 543                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 544                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 545                         imx_ldb->clk_sel[i] = NULL;
 546                         break;
 547                 }
 548
 549                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 550         }
 551         if (i == 0)
 552                 return ret;
 553
 554         for_each_child_of_node(np, child) {
 555                 struct imx_ldb_channel *channel;
 556                 struct device_node *port;
 557
 558                 ret = of_property_read_u32(child, "reg", &i);
 559                 if (ret || i < 0 || i > 1)
 560                         return -EINVAL;
 561
 562                 if (dual && i > 0) {
 563                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 564                         continue;
 565                 }
 566
 567                 if (!of_device_is_available(child))
 568                         continue;
 569
 570                 channel = &imx_ldb->channel[i];
 571                 channel->ldb = imx_ldb;
 572                 channel->chno = i;
 573                 channel->child = child;
 574
 575                 /*
 576                  * The output port is port@4 with an external 4-port mux or
 577                  * port@2 with the internal 2-port mux.
 578                  */
 579                 port = of_graph_get_port_by_id(child, imx_ldb->lvds_mux ? 4 : 2);
 580                 if (port) {
 581                         struct device_node *endpoint, *remote;
 582
 583                         endpoint = of_get_child_by_name(port, "endpoint");
 584                         if (endpoint) {
 585                                 remote = of_graph_get_remote_port_parent(endpoint);
 586                                 if (remote)
 587                                         channel->panel = of_drm_find_panel(remote);
 588                                 else
 589                                         return -EPROBE_DEFER;
 590                                 if (!channel->panel) {
 591                                         dev_err(dev, "panel not found: %s\n",
 592                                                 remote->full_name);
 593                                         return -EPROBE_DEFER;
 594                                 }
 595                         }
 596                 }
 597
 598                 edidp = of_get_property(child, "edid", &channel->edid_len);
 599                 if (edidp) {
 600                         channel->edid = kmemdup(edidp, channel->edid_len,
 601                                                 GFP_KERNEL);
 602                 } else if (!channel->panel) {
 603                         ret = of_get_drm_display_mode(child, &channel->mode, 0);
 604                         if (!ret)
 605                                 channel->mode_valid = 1;
 606                 }
 607
 608                 channel->bus_format = of_get_bus_format(dev, child);
 609                 if (channel->bus_format == -EINVAL) {
 610                         /*
 611                          * If no bus format was specified in the device tree,
 612                          * we can still get it from the connected panel later.
 613                          */
 614                         if (channel->panel && channel->panel->funcs &&
 615                             channel->panel->funcs->get_modes)
 616                                 channel->bus_format = 0;
 617                 }
 618                 if (channel->bus_format < 0) {
 619                         dev_err(dev, "could not determine data mapping: %d\n",
 620                                 channel->bus_format);
 621                         return channel->bus_format;
 622                 }
 623
 624                 ret = imx_ldb_register(drm, channel);
 625                 if (ret)
 626                         return ret;
 627         }
 628
 629         dev_set_drvdata(dev, imx_ldb);
 630
 631         return 0;
 632 }
 633
 634 static void imx_ldb_unbind(struct device *dev, struct device *master,
 635         void *data)
 636 {
 637         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 638         int i;
 639
 640         for (i = 0; i < 2; i++) {
 641                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 642
 643                 if (!channel->connector.funcs)
 644                         continue;
 645
 646                 channel->connector.funcs->destroy(&channel->connector);
 647                 channel->encoder.funcs->destroy(&channel->encoder);
 648
 649                 kfree(channel->edid);
 650         }
 651 }
 652
 653 static const struct component_ops imx_ldb_ops = {
 654         .bind   = imx_ldb_bind,
 655         .unbind = imx_ldb_unbind,
 656 };
 657
 658 static int imx_ldb_probe(struct platform_device *pdev)
 659 {
 660         return component_add(&pdev->dev, &imx_ldb_ops);
 661 }
 662
 663 static int imx_ldb_remove(struct platform_device *pdev)
 664 {
 665         component_del(&pdev->dev, &imx_ldb_ops);
 666         return 0;
 667 }
 668
 669 static struct platform_driver imx_ldb_driver = {
 670         .probe          = imx_ldb_probe,
 671         .remove         = imx_ldb_remove,
 672         .driver         = {
 673                 .of_match_table = imx_ldb_dt_ids,
 674                 .name   = DRIVER_NAME,
 675         },
 676 };
 677
 678 module_platform_driver(imx_ldb_driver);
 679
 680 MODULE_DESCRIPTION("i.MX LVDS driver");
 681 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 682 MODULE_LICENSE("GPL");
 683 MODULE_ALIAS("platform:" DRIVER_NAME);