2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_atomic.h>
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_of.h>
25 #include <drm/drm_panel.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28 #include <linux/of_device.h>
29 #include <linux/of_graph.h>
30 #include <video/of_display_timing.h>
31 #include <video/of_videomode.h>
32 #include <linux/regmap.h>
33 #include <linux/videodev2.h>
37 #define DRIVER_NAME "imx-ldb"
39 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
40 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
41 #define LDB_CH0_MODE_EN_MASK (3 << 0)
42 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
43 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
44 #define LDB_CH1_MODE_EN_MASK (3 << 2)
45 #define LDB_SPLIT_MODE_EN (1 << 4)
46 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
47 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
48 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
49 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
50 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
51 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
52 #define LDB_BGREF_RMODE_INT (1 << 15)
56 struct imx_ldb_channel
{
58 struct drm_connector connector
;
59 struct drm_encoder encoder
;
60 struct drm_panel
*panel
;
61 struct device_node
*child
;
62 struct i2c_adapter
*ddc
;
66 struct drm_display_mode mode
;
72 static inline struct imx_ldb_channel
*con_to_imx_ldb_ch(struct drm_connector
*c
)
74 return container_of(c
, struct imx_ldb_channel
, connector
);
77 static inline struct imx_ldb_channel
*enc_to_imx_ldb_ch(struct drm_encoder
*e
)
79 return container_of(e
, struct imx_ldb_channel
, encoder
);
89 struct regmap
*regmap
;
91 struct imx_ldb_channel channel
[2];
92 struct clk
*clk
[2]; /* our own clock */
93 struct clk
*clk_sel
[4]; /* parent of display clock */
94 struct clk
*clk_parent
[4]; /* original parent of clk_sel */
95 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
97 const struct bus_mux
*lvds_mux
;
100 static enum drm_connector_status
imx_ldb_connector_detect(
101 struct drm_connector
*connector
, bool force
)
103 return connector_status_connected
;
106 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel
*imx_ldb_ch
,
109 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
110 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
112 switch (bus_format
) {
113 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
:
115 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
:
116 if (imx_ldb_ch
->chno
== 0 || dual
)
117 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
;
118 if (imx_ldb_ch
->chno
== 1 || dual
)
119 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
;
121 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
:
122 if (imx_ldb_ch
->chno
== 0 || dual
)
123 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
|
124 LDB_BIT_MAP_CH0_JEIDA
;
125 if (imx_ldb_ch
->chno
== 1 || dual
)
126 ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
|
127 LDB_BIT_MAP_CH1_JEIDA
;
132 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
134 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
137 if (imx_ldb_ch
->panel
&& imx_ldb_ch
->panel
->funcs
&&
138 imx_ldb_ch
->panel
->funcs
->get_modes
) {
139 num_modes
= imx_ldb_ch
->panel
->funcs
->get_modes(imx_ldb_ch
->panel
);
144 if (!imx_ldb_ch
->edid
&& imx_ldb_ch
->ddc
)
145 imx_ldb_ch
->edid
= drm_get_edid(connector
, imx_ldb_ch
->ddc
);
147 if (imx_ldb_ch
->edid
) {
148 drm_mode_connector_update_edid_property(connector
,
150 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
153 if (imx_ldb_ch
->mode_valid
) {
154 struct drm_display_mode
*mode
;
156 mode
= drm_mode_create(connector
->dev
);
159 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
160 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
161 drm_mode_probed_add(connector
, mode
);
168 static struct drm_encoder
*imx_ldb_connector_best_encoder(
169 struct drm_connector
*connector
)
171 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
173 return &imx_ldb_ch
->encoder
;
176 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
177 unsigned long serial_clk
, unsigned long di_clk
)
181 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
182 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
183 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
185 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
186 clk_get_rate(ldb
->clk_pll
[chno
]));
188 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
189 clk_get_rate(ldb
->clk
[chno
]),
191 clk_set_rate(ldb
->clk
[chno
], di_clk
);
193 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
194 clk_get_rate(ldb
->clk
[chno
]));
196 /* set display clock mux to LDB input clock */
197 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
200 "unable to set di%d parent clock to ldb_di%d\n", mux
,
204 static void imx_ldb_encoder_enable(struct drm_encoder
*encoder
)
206 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
207 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
208 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
209 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
211 drm_panel_prepare(imx_ldb_ch
->panel
);
214 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[0]);
215 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[1]);
217 clk_prepare_enable(ldb
->clk
[0]);
218 clk_prepare_enable(ldb
->clk
[1]);
220 clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[imx_ldb_ch
->chno
]);
223 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
224 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
225 if (mux
== 0 || ldb
->lvds_mux
)
226 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
228 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
230 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
231 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
232 if (mux
== 1 || ldb
->lvds_mux
)
233 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
235 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
239 const struct bus_mux
*lvds_mux
= NULL
;
241 if (imx_ldb_ch
== &ldb
->channel
[0])
242 lvds_mux
= &ldb
->lvds_mux
[0];
243 else if (imx_ldb_ch
== &ldb
->channel
[1])
244 lvds_mux
= &ldb
->lvds_mux
[1];
246 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
247 mux
<< lvds_mux
->shift
);
250 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
252 drm_panel_enable(imx_ldb_ch
->panel
);
256 imx_ldb_encoder_atomic_mode_set(struct drm_encoder
*encoder
,
257 struct drm_crtc_state
*crtc_state
,
258 struct drm_connector_state
*connector_state
)
260 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
261 struct drm_display_mode
*mode
= &crtc_state
->adjusted_mode
;
262 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
263 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
264 unsigned long serial_clk
;
265 unsigned long di_clk
= mode
->clock
* 1000;
266 int mux
= drm_of_encoder_active_port_id(imx_ldb_ch
->child
, encoder
);
267 u32 bus_format
= imx_ldb_ch
->bus_format
;
269 if (mode
->clock
> 170000) {
271 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
273 if (mode
->clock
> 85000 && !dual
) {
275 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
279 serial_clk
= 3500UL * mode
->clock
;
280 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
281 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
283 serial_clk
= 7000UL * mode
->clock
;
284 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
,
288 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
289 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
290 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
291 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
292 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
293 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
295 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
296 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
297 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
298 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
299 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
303 struct drm_connector
*connector
= connector_state
->connector
;
304 struct drm_display_info
*di
= &connector
->display_info
;
306 if (di
->num_bus_formats
)
307 bus_format
= di
->bus_formats
[0];
309 imx_ldb_ch_set_bus_format(imx_ldb_ch
, bus_format
);
312 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
314 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
315 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
319 * imx_ldb_encoder_disable is called by
320 * drm_helper_disable_unused_functions without
321 * the encoder being enabled before.
323 if (imx_ldb_ch
== &ldb
->channel
[0] &&
324 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
326 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
327 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
330 drm_panel_disable(imx_ldb_ch
->panel
);
332 if (imx_ldb_ch
== &ldb
->channel
[0])
333 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
334 else if (imx_ldb_ch
== &ldb
->channel
[1])
335 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
337 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
339 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
340 clk_disable_unprepare(ldb
->clk
[0]);
341 clk_disable_unprepare(ldb
->clk
[1]);
345 const struct bus_mux
*lvds_mux
= NULL
;
347 if (imx_ldb_ch
== &ldb
->channel
[0])
348 lvds_mux
= &ldb
->lvds_mux
[0];
349 else if (imx_ldb_ch
== &ldb
->channel
[1])
350 lvds_mux
= &ldb
->lvds_mux
[1];
352 regmap_read(ldb
->regmap
, lvds_mux
->reg
, &mux
);
353 mux
&= lvds_mux
->mask
;
354 mux
>>= lvds_mux
->shift
;
356 mux
= (imx_ldb_ch
== &ldb
->channel
[0]) ? 0 : 1;
359 /* set display clock mux back to original input clock */
360 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk_parent
[mux
]);
363 "unable to set di%d parent clock to original parent\n",
366 drm_panel_unprepare(imx_ldb_ch
->panel
);
369 static int imx_ldb_encoder_atomic_check(struct drm_encoder
*encoder
,
370 struct drm_crtc_state
*crtc_state
,
371 struct drm_connector_state
*conn_state
)
373 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc_state
);
374 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
375 struct drm_display_info
*di
= &conn_state
->connector
->display_info
;
376 u32 bus_format
= imx_ldb_ch
->bus_format
;
378 /* Bus format description in DT overrides connector display info. */
379 if (!bus_format
&& di
->num_bus_formats
) {
380 bus_format
= di
->bus_formats
[0];
381 imx_crtc_state
->bus_flags
= di
->bus_flags
;
383 bus_format
= imx_ldb_ch
->bus_format
;
384 imx_crtc_state
->bus_flags
= imx_ldb_ch
->bus_flags
;
386 switch (bus_format
) {
387 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
:
388 imx_crtc_state
->bus_format
= MEDIA_BUS_FMT_RGB666_1X18
;
390 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
:
391 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
:
392 imx_crtc_state
->bus_format
= MEDIA_BUS_FMT_RGB888_1X24
;
398 imx_crtc_state
->di_hsync_pin
= 2;
399 imx_crtc_state
->di_vsync_pin
= 3;
405 static const struct drm_connector_funcs imx_ldb_connector_funcs
= {
406 .dpms
= drm_atomic_helper_connector_dpms
,
407 .fill_modes
= drm_helper_probe_single_connector_modes
,
408 .detect
= imx_ldb_connector_detect
,
409 .destroy
= imx_drm_connector_destroy
,
410 .reset
= drm_atomic_helper_connector_reset
,
411 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
412 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
415 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
416 .get_modes
= imx_ldb_connector_get_modes
,
417 .best_encoder
= imx_ldb_connector_best_encoder
,
420 static const struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
421 .destroy
= imx_drm_encoder_destroy
,
424 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
425 .atomic_mode_set
= imx_ldb_encoder_atomic_mode_set
,
426 .enable
= imx_ldb_encoder_enable
,
427 .disable
= imx_ldb_encoder_disable
,
428 .atomic_check
= imx_ldb_encoder_atomic_check
,
431 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
435 snprintf(clkname
, sizeof(clkname
), "di%d", chno
);
436 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
437 if (IS_ERR(ldb
->clk
[chno
]))
438 return PTR_ERR(ldb
->clk
[chno
]);
440 snprintf(clkname
, sizeof(clkname
), "di%d_pll", chno
);
441 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
443 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
446 static int imx_ldb_register(struct drm_device
*drm
,
447 struct imx_ldb_channel
*imx_ldb_ch
)
449 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
450 struct drm_encoder
*encoder
= &imx_ldb_ch
->encoder
;
453 ret
= imx_drm_encoder_parse_of(drm
, encoder
, imx_ldb_ch
->child
);
457 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
461 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
462 ret
= imx_ldb_get_clk(ldb
, 1);
467 drm_encoder_helper_add(encoder
, &imx_ldb_encoder_helper_funcs
);
468 drm_encoder_init(drm
, encoder
, &imx_ldb_encoder_funcs
,
469 DRM_MODE_ENCODER_LVDS
, NULL
);
471 drm_connector_helper_add(&imx_ldb_ch
->connector
,
472 &imx_ldb_connector_helper_funcs
);
473 drm_connector_init(drm
, &imx_ldb_ch
->connector
,
474 &imx_ldb_connector_funcs
, DRM_MODE_CONNECTOR_LVDS
);
476 if (imx_ldb_ch
->panel
) {
477 ret
= drm_panel_attach(imx_ldb_ch
->panel
,
478 &imx_ldb_ch
->connector
);
483 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
, encoder
);
493 struct imx_ldb_bit_mapping
{
496 const char * const mapping
;
499 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings
[] = {
500 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG
, 18, "spwg" },
501 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG
, 24, "spwg" },
502 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA
, 24, "jeida" },
505 static u32
of_get_bus_format(struct device
*dev
, struct device_node
*np
)
511 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
515 of_property_read_u32(np
, "fsl,data-width", &datawidth
);
517 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++) {
518 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
].mapping
) &&
519 datawidth
== imx_ldb_bit_mappings
[i
].datawidth
)
520 return imx_ldb_bit_mappings
[i
].bus_format
;
523 dev_err(dev
, "invalid data mapping: %d-bit \"%s\"\n", datawidth
, bm
);
528 static struct bus_mux imx6q_lvds_mux
[2] = {
532 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
536 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
541 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
542 * of_match_device will walk through this list and take the first entry
543 * matching any of its compatible values. Therefore, the more generic
544 * entries (in this case fsl,imx53-ldb) need to be ordered last.
546 static const struct of_device_id imx_ldb_dt_ids
[] = {
547 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
548 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
551 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
553 static int imx_ldb_bind(struct device
*dev
, struct device
*master
, void *data
)
555 struct drm_device
*drm
= data
;
556 struct device_node
*np
= dev
->of_node
;
557 const struct of_device_id
*of_id
=
558 of_match_device(imx_ldb_dt_ids
, dev
);
559 struct device_node
*child
;
561 struct imx_ldb
*imx_ldb
;
566 imx_ldb
= devm_kzalloc(dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
570 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
571 if (IS_ERR(imx_ldb
->regmap
)) {
572 dev_err(dev
, "failed to get parent regmap\n");
573 return PTR_ERR(imx_ldb
->regmap
);
579 imx_ldb
->lvds_mux
= of_id
->data
;
581 dual
= of_property_read_bool(np
, "fsl,dual-channel");
583 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
586 * There are three different possible clock mux configurations:
587 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
588 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
589 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
590 * Map them all to di0_sel...di3_sel.
592 for (i
= 0; i
< 4; i
++) {
595 sprintf(clkname
, "di%d_sel", i
);
596 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
597 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
598 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
599 imx_ldb
->clk_sel
[i
] = NULL
;
603 imx_ldb
->clk_parent
[i
] = clk_get_parent(imx_ldb
->clk_sel
[i
]);
608 for_each_child_of_node(np
, child
) {
609 struct imx_ldb_channel
*channel
;
610 struct device_node
*ddc_node
;
611 struct device_node
*ep
;
614 ret
= of_property_read_u32(child
, "reg", &i
);
615 if (ret
|| i
< 0 || i
> 1)
619 dev_warn(dev
, "dual-channel mode, ignoring second output\n");
623 if (!of_device_is_available(child
))
626 channel
= &imx_ldb
->channel
[i
];
627 channel
->ldb
= imx_ldb
;
629 channel
->child
= child
;
632 * The output port is port@4 with an external 4-port mux or
633 * port@2 with the internal 2-port mux.
635 ep
= of_graph_get_endpoint_by_regs(child
,
636 imx_ldb
->lvds_mux
? 4 : 2,
639 struct device_node
*remote
;
641 remote
= of_graph_get_remote_port_parent(ep
);
644 channel
->panel
= of_drm_find_panel(remote
);
646 return -EPROBE_DEFER
;
648 if (!channel
->panel
) {
649 dev_err(dev
, "panel not found: %s\n",
651 return -EPROBE_DEFER
;
655 ddc_node
= of_parse_phandle(child
, "ddc-i2c-bus", 0);
657 channel
->ddc
= of_find_i2c_adapter_by_node(ddc_node
);
658 of_node_put(ddc_node
);
660 dev_warn(dev
, "failed to get ddc i2c adapter\n");
661 return -EPROBE_DEFER
;
666 /* if no DDC available, fallback to hardcoded EDID */
667 dev_dbg(dev
, "no ddc available\n");
669 edidp
= of_get_property(child
, "edid",
672 channel
->edid
= kmemdup(edidp
,
675 } else if (!channel
->panel
) {
676 /* fallback to display-timings node */
677 ret
= of_get_drm_display_mode(child
,
682 channel
->mode_valid
= 1;
686 bus_format
= of_get_bus_format(dev
, child
);
687 if (bus_format
== -EINVAL
) {
689 * If no bus format was specified in the device tree,
690 * we can still get it from the connected panel later.
692 if (channel
->panel
&& channel
->panel
->funcs
&&
693 channel
->panel
->funcs
->get_modes
)
696 if (bus_format
< 0) {
697 dev_err(dev
, "could not determine data mapping: %d\n",
701 channel
->bus_format
= bus_format
;
703 ret
= imx_ldb_register(drm
, channel
);
708 dev_set_drvdata(dev
, imx_ldb
);
713 static void imx_ldb_unbind(struct device
*dev
, struct device
*master
,
716 struct imx_ldb
*imx_ldb
= dev_get_drvdata(dev
);
719 for (i
= 0; i
< 2; i
++) {
720 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
722 if (!channel
->connector
.funcs
)
725 channel
->connector
.funcs
->destroy(&channel
->connector
);
726 channel
->encoder
.funcs
->destroy(&channel
->encoder
);
728 kfree(channel
->edid
);
729 i2c_put_adapter(channel
->ddc
);
733 static const struct component_ops imx_ldb_ops
= {
734 .bind
= imx_ldb_bind
,
735 .unbind
= imx_ldb_unbind
,
738 static int imx_ldb_probe(struct platform_device
*pdev
)
740 return component_add(&pdev
->dev
, &imx_ldb_ops
);
743 static int imx_ldb_remove(struct platform_device
*pdev
)
745 component_del(&pdev
->dev
, &imx_ldb_ops
);
749 static struct platform_driver imx_ldb_driver
= {
750 .probe
= imx_ldb_probe
,
751 .remove
= imx_ldb_remove
,
753 .of_match_table
= imx_ldb_dt_ids
,
758 module_platform_driver(imx_ldb_driver
);
760 MODULE_DESCRIPTION("i.MX LVDS driver");
761 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
762 MODULE_LICENSE("GPL");
763 MODULE_ALIAS("platform:" DRIVER_NAME
);