2 * i.MX drm driver - Television Encoder (TVEv2)
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/component.h>
19 #include <linux/module.h>
20 #include <linux/i2c.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/spinlock.h>
24 #include <linux/videodev2.h>
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_fb_helper.h>
28 #include <drm/drm_crtc_helper.h>
29 #include <video/imx-ipu-v3.h>
33 #define TVE_COM_CONF_REG 0x00
34 #define TVE_TVDAC0_CONT_REG 0x28
35 #define TVE_TVDAC1_CONT_REG 0x2c
36 #define TVE_TVDAC2_CONT_REG 0x30
37 #define TVE_CD_CONT_REG 0x34
38 #define TVE_INT_CONT_REG 0x64
39 #define TVE_STAT_REG 0x68
40 #define TVE_TST_MODE_REG 0x6c
41 #define TVE_MV_CONT_REG 0xdc
43 /* TVE_COM_CONF_REG */
44 #define TVE_SYNC_CH_2_EN BIT(22)
45 #define TVE_SYNC_CH_1_EN BIT(21)
46 #define TVE_SYNC_CH_0_EN BIT(20)
47 #define TVE_TV_OUT_MODE_MASK (0x7 << 12)
48 #define TVE_TV_OUT_DISABLE (0x0 << 12)
49 #define TVE_TV_OUT_CVBS_0 (0x1 << 12)
50 #define TVE_TV_OUT_CVBS_2 (0x2 << 12)
51 #define TVE_TV_OUT_CVBS_0_2 (0x3 << 12)
52 #define TVE_TV_OUT_SVIDEO_0_1 (0x4 << 12)
53 #define TVE_TV_OUT_SVIDEO_0_1_CVBS2_2 (0x5 << 12)
54 #define TVE_TV_OUT_YPBPR (0x6 << 12)
55 #define TVE_TV_OUT_RGB (0x7 << 12)
56 #define TVE_TV_STAND_MASK (0xf << 8)
57 #define TVE_TV_STAND_HD_1080P30 (0xc << 8)
58 #define TVE_P2I_CONV_EN BIT(7)
59 #define TVE_INP_VIDEO_FORM BIT(6)
60 #define TVE_INP_YCBCR_422 (0x0 << 6)
61 #define TVE_INP_YCBCR_444 (0x1 << 6)
62 #define TVE_DATA_SOURCE_MASK (0x3 << 4)
63 #define TVE_DATA_SOURCE_BUS1 (0x0 << 4)
64 #define TVE_DATA_SOURCE_BUS2 (0x1 << 4)
65 #define TVE_DATA_SOURCE_EXT (0x2 << 4)
66 #define TVE_DATA_SOURCE_TESTGEN (0x3 << 4)
67 #define TVE_IPU_CLK_EN_OFS 3
68 #define TVE_IPU_CLK_EN BIT(3)
69 #define TVE_DAC_SAMP_RATE_OFS 1
70 #define TVE_DAC_SAMP_RATE_WIDTH 2
71 #define TVE_DAC_SAMP_RATE_MASK (0x3 << 1)
72 #define TVE_DAC_FULL_RATE (0x0 << 1)
73 #define TVE_DAC_DIV2_RATE (0x1 << 1)
74 #define TVE_DAC_DIV4_RATE (0x2 << 1)
77 /* TVE_TVDACx_CONT_REG */
78 #define TVE_TVDAC_GAIN_MASK (0x3f << 0)
81 #define TVE_CD_CH_2_SM_EN BIT(22)
82 #define TVE_CD_CH_1_SM_EN BIT(21)
83 #define TVE_CD_CH_0_SM_EN BIT(20)
84 #define TVE_CD_CH_2_LM_EN BIT(18)
85 #define TVE_CD_CH_1_LM_EN BIT(17)
86 #define TVE_CD_CH_0_LM_EN BIT(16)
87 #define TVE_CD_CH_2_REF_LVL BIT(10)
88 #define TVE_CD_CH_1_REF_LVL BIT(9)
89 #define TVE_CD_CH_0_REF_LVL BIT(8)
90 #define TVE_CD_EN BIT(0)
92 /* TVE_INT_CONT_REG */
93 #define TVE_FRAME_END_IEN BIT(13)
94 #define TVE_CD_MON_END_IEN BIT(2)
95 #define TVE_CD_SM_IEN BIT(1)
96 #define TVE_CD_LM_IEN BIT(0)
98 /* TVE_TST_MODE_REG */
99 #define TVE_TVDAC_TEST_MODE_MASK (0x7 << 0)
107 struct drm_connector connector
;
108 struct drm_encoder encoder
;
110 spinlock_t lock
; /* register lock */
116 struct regmap
*regmap
;
117 struct regulator
*dac_reg
;
118 struct i2c_adapter
*ddc
;
120 struct clk
*di_sel_clk
;
121 struct clk_hw clk_hw_di
;
125 static inline struct imx_tve
*con_to_tve(struct drm_connector
*c
)
127 return container_of(c
, struct imx_tve
, connector
);
130 static inline struct imx_tve
*enc_to_tve(struct drm_encoder
*e
)
132 return container_of(e
, struct imx_tve
, encoder
);
135 static void tve_lock(void *__tve
)
136 __acquires(&tve
->lock
)
138 struct imx_tve
*tve
= __tve
;
140 spin_lock(&tve
->lock
);
143 static void tve_unlock(void *__tve
)
144 __releases(&tve
->lock
)
146 struct imx_tve
*tve
= __tve
;
148 spin_unlock(&tve
->lock
);
151 static void tve_enable(struct imx_tve
*tve
)
157 clk_prepare_enable(tve
->clk
);
158 ret
= regmap_update_bits(tve
->regmap
, TVE_COM_CONF_REG
,
162 /* clear interrupt status register */
163 regmap_write(tve
->regmap
, TVE_STAT_REG
, 0xffffffff);
165 /* cable detection irq disabled in VGA mode, enabled in TVOUT mode */
166 if (tve
->mode
== TVE_MODE_VGA
)
167 regmap_write(tve
->regmap
, TVE_INT_CONT_REG
, 0);
169 regmap_write(tve
->regmap
, TVE_INT_CONT_REG
,
175 static void tve_disable(struct imx_tve
*tve
)
180 tve
->enabled
= false;
181 ret
= regmap_update_bits(tve
->regmap
, TVE_COM_CONF_REG
,
183 clk_disable_unprepare(tve
->clk
);
187 static int tve_setup_tvout(struct imx_tve
*tve
)
192 static int tve_setup_vga(struct imx_tve
*tve
)
198 /* set gain to (1 + 10/128) to provide 0.7V peak-to-peak amplitude */
199 ret
= regmap_update_bits(tve
->regmap
, TVE_TVDAC0_CONT_REG
,
200 TVE_TVDAC_GAIN_MASK
, 0x0a);
204 ret
= regmap_update_bits(tve
->regmap
, TVE_TVDAC1_CONT_REG
,
205 TVE_TVDAC_GAIN_MASK
, 0x0a);
209 ret
= regmap_update_bits(tve
->regmap
, TVE_TVDAC2_CONT_REG
,
210 TVE_TVDAC_GAIN_MASK
, 0x0a);
214 /* set configuration register */
215 mask
= TVE_DATA_SOURCE_MASK
| TVE_INP_VIDEO_FORM
;
216 val
= TVE_DATA_SOURCE_BUS2
| TVE_INP_YCBCR_444
;
217 mask
|= TVE_TV_STAND_MASK
| TVE_P2I_CONV_EN
;
218 val
|= TVE_TV_STAND_HD_1080P30
| 0;
219 mask
|= TVE_TV_OUT_MODE_MASK
| TVE_SYNC_CH_0_EN
;
220 val
|= TVE_TV_OUT_RGB
| TVE_SYNC_CH_0_EN
;
221 ret
= regmap_update_bits(tve
->regmap
, TVE_COM_CONF_REG
, mask
, val
);
225 /* set test mode (as documented) */
226 return regmap_update_bits(tve
->regmap
, TVE_TST_MODE_REG
,
227 TVE_TVDAC_TEST_MODE_MASK
, 1);
230 static enum drm_connector_status
imx_tve_connector_detect(
231 struct drm_connector
*connector
, bool force
)
233 return connector_status_connected
;
236 static int imx_tve_connector_get_modes(struct drm_connector
*connector
)
238 struct imx_tve
*tve
= con_to_tve(connector
);
245 edid
= drm_get_edid(connector
, tve
->ddc
);
247 drm_mode_connector_update_edid_property(connector
, edid
);
248 ret
= drm_add_edid_modes(connector
, edid
);
255 static int imx_tve_connector_mode_valid(struct drm_connector
*connector
,
256 struct drm_display_mode
*mode
)
258 struct imx_tve
*tve
= con_to_tve(connector
);
261 /* pixel clock with 2x oversampling */
262 rate
= clk_round_rate(tve
->clk
, 2000UL * mode
->clock
) / 2000;
263 if (rate
== mode
->clock
)
266 /* pixel clock without oversampling */
267 rate
= clk_round_rate(tve
->clk
, 1000UL * mode
->clock
) / 1000;
268 if (rate
== mode
->clock
)
271 dev_warn(tve
->dev
, "ignoring mode %dx%d\n",
272 mode
->hdisplay
, mode
->vdisplay
);
277 static struct drm_encoder
*imx_tve_connector_best_encoder(
278 struct drm_connector
*connector
)
280 struct imx_tve
*tve
= con_to_tve(connector
);
282 return &tve
->encoder
;
285 static void imx_tve_encoder_mode_set(struct drm_encoder
*encoder
,
286 struct drm_display_mode
*orig_mode
,
287 struct drm_display_mode
*mode
)
289 struct imx_tve
*tve
= enc_to_tve(encoder
);
290 unsigned long rounded_rate
;
297 * we should try 4k * mode->clock first,
298 * and enable 4x oversampling for lower resolutions
300 rate
= 2000UL * mode
->clock
;
301 clk_set_rate(tve
->clk
, rate
);
302 rounded_rate
= clk_get_rate(tve
->clk
);
303 if (rounded_rate
>= rate
)
305 clk_set_rate(tve
->di_clk
, rounded_rate
/ div
);
307 ret
= clk_set_parent(tve
->di_sel_clk
, tve
->di_clk
);
309 dev_err(tve
->dev
, "failed to set di_sel parent to tve_di: %d\n",
313 regmap_update_bits(tve
->regmap
, TVE_COM_CONF_REG
,
314 TVE_IPU_CLK_EN
, TVE_IPU_CLK_EN
);
316 if (tve
->mode
== TVE_MODE_VGA
)
317 ret
= tve_setup_vga(tve
);
319 ret
= tve_setup_tvout(tve
);
321 dev_err(tve
->dev
, "failed to set configuration: %d\n", ret
);
324 static void imx_tve_encoder_enable(struct drm_encoder
*encoder
)
326 struct imx_tve
*tve
= enc_to_tve(encoder
);
331 static void imx_tve_encoder_disable(struct drm_encoder
*encoder
)
333 struct imx_tve
*tve
= enc_to_tve(encoder
);
338 static int imx_tve_atomic_check(struct drm_encoder
*encoder
,
339 struct drm_crtc_state
*crtc_state
,
340 struct drm_connector_state
*conn_state
)
342 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc_state
);
343 struct imx_tve
*tve
= enc_to_tve(encoder
);
345 imx_crtc_state
->bus_format
= MEDIA_BUS_FMT_GBR888_1X24
;
346 imx_crtc_state
->di_hsync_pin
= tve
->di_hsync_pin
;
347 imx_crtc_state
->di_vsync_pin
= tve
->di_vsync_pin
;
352 static const struct drm_connector_funcs imx_tve_connector_funcs
= {
353 .dpms
= drm_atomic_helper_connector_dpms
,
354 .fill_modes
= drm_helper_probe_single_connector_modes
,
355 .detect
= imx_tve_connector_detect
,
356 .destroy
= imx_drm_connector_destroy
,
357 .reset
= drm_atomic_helper_connector_reset
,
358 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
359 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
362 static const struct drm_connector_helper_funcs imx_tve_connector_helper_funcs
= {
363 .get_modes
= imx_tve_connector_get_modes
,
364 .best_encoder
= imx_tve_connector_best_encoder
,
365 .mode_valid
= imx_tve_connector_mode_valid
,
368 static const struct drm_encoder_funcs imx_tve_encoder_funcs
= {
369 .destroy
= imx_drm_encoder_destroy
,
372 static const struct drm_encoder_helper_funcs imx_tve_encoder_helper_funcs
= {
373 .mode_set
= imx_tve_encoder_mode_set
,
374 .enable
= imx_tve_encoder_enable
,
375 .disable
= imx_tve_encoder_disable
,
376 .atomic_check
= imx_tve_atomic_check
,
379 static irqreturn_t
imx_tve_irq_handler(int irq
, void *data
)
381 struct imx_tve
*tve
= data
;
384 regmap_read(tve
->regmap
, TVE_STAT_REG
, &val
);
386 /* clear interrupt status register */
387 regmap_write(tve
->regmap
, TVE_STAT_REG
, 0xffffffff);
392 static unsigned long clk_tve_di_recalc_rate(struct clk_hw
*hw
,
393 unsigned long parent_rate
)
395 struct imx_tve
*tve
= container_of(hw
, struct imx_tve
, clk_hw_di
);
399 ret
= regmap_read(tve
->regmap
, TVE_COM_CONF_REG
, &val
);
403 switch (val
& TVE_DAC_SAMP_RATE_MASK
) {
404 case TVE_DAC_DIV4_RATE
:
405 return parent_rate
/ 4;
406 case TVE_DAC_DIV2_RATE
:
407 return parent_rate
/ 2;
408 case TVE_DAC_FULL_RATE
:
416 static long clk_tve_di_round_rate(struct clk_hw
*hw
, unsigned long rate
,
417 unsigned long *prate
)
429 static int clk_tve_di_set_rate(struct clk_hw
*hw
, unsigned long rate
,
430 unsigned long parent_rate
)
432 struct imx_tve
*tve
= container_of(hw
, struct imx_tve
, clk_hw_di
);
437 div
= parent_rate
/ rate
;
439 val
= TVE_DAC_DIV4_RATE
;
441 val
= TVE_DAC_DIV2_RATE
;
443 val
= TVE_DAC_FULL_RATE
;
445 ret
= regmap_update_bits(tve
->regmap
, TVE_COM_CONF_REG
,
446 TVE_DAC_SAMP_RATE_MASK
, val
);
449 dev_err(tve
->dev
, "failed to set divider: %d\n", ret
);
456 static struct clk_ops clk_tve_di_ops
= {
457 .round_rate
= clk_tve_di_round_rate
,
458 .set_rate
= clk_tve_di_set_rate
,
459 .recalc_rate
= clk_tve_di_recalc_rate
,
462 static int tve_clk_init(struct imx_tve
*tve
, void __iomem
*base
)
464 const char *tve_di_parent
[1];
465 struct clk_init_data init
= {
467 .ops
= &clk_tve_di_ops
,
472 tve_di_parent
[0] = __clk_get_name(tve
->clk
);
473 init
.parent_names
= (const char **)&tve_di_parent
;
475 tve
->clk_hw_di
.init
= &init
;
476 tve
->di_clk
= clk_register(tve
->dev
, &tve
->clk_hw_di
);
477 if (IS_ERR(tve
->di_clk
)) {
478 dev_err(tve
->dev
, "failed to register TVE output clock: %ld\n",
479 PTR_ERR(tve
->di_clk
));
480 return PTR_ERR(tve
->di_clk
);
486 static int imx_tve_register(struct drm_device
*drm
, struct imx_tve
*tve
)
491 encoder_type
= tve
->mode
== TVE_MODE_VGA
?
492 DRM_MODE_ENCODER_DAC
: DRM_MODE_ENCODER_TVDAC
;
494 ret
= imx_drm_encoder_parse_of(drm
, &tve
->encoder
, tve
->dev
->of_node
);
498 drm_encoder_helper_add(&tve
->encoder
, &imx_tve_encoder_helper_funcs
);
499 drm_encoder_init(drm
, &tve
->encoder
, &imx_tve_encoder_funcs
,
502 drm_connector_helper_add(&tve
->connector
,
503 &imx_tve_connector_helper_funcs
);
504 drm_connector_init(drm
, &tve
->connector
, &imx_tve_connector_funcs
,
505 DRM_MODE_CONNECTOR_VGA
);
507 drm_mode_connector_attach_encoder(&tve
->connector
, &tve
->encoder
);
512 static bool imx_tve_readable_reg(struct device
*dev
, unsigned int reg
)
514 return (reg
% 4 == 0) && (reg
<= 0xdc);
517 static struct regmap_config tve_regmap_config
= {
522 .readable_reg
= imx_tve_readable_reg
,
525 .unlock
= tve_unlock
,
527 .max_register
= 0xdc,
530 static const char * const imx_tve_modes
[] = {
531 [TVE_MODE_TVOUT
] = "tvout",
532 [TVE_MODE_VGA
] = "vga",
535 static const int of_get_tve_mode(struct device_node
*np
)
540 ret
= of_property_read_string(np
, "fsl,tve-mode", &bm
);
544 for (i
= 0; i
< ARRAY_SIZE(imx_tve_modes
); i
++)
545 if (!strcasecmp(bm
, imx_tve_modes
[i
]))
551 static int imx_tve_bind(struct device
*dev
, struct device
*master
, void *data
)
553 struct platform_device
*pdev
= to_platform_device(dev
);
554 struct drm_device
*drm
= data
;
555 struct device_node
*np
= dev
->of_node
;
556 struct device_node
*ddc_node
;
558 struct resource
*res
;
564 tve
= devm_kzalloc(dev
, sizeof(*tve
), GFP_KERNEL
);
569 spin_lock_init(&tve
->lock
);
571 ddc_node
= of_parse_phandle(np
, "ddc-i2c-bus", 0);
573 tve
->ddc
= of_find_i2c_adapter_by_node(ddc_node
);
574 of_node_put(ddc_node
);
577 tve
->mode
= of_get_tve_mode(np
);
578 if (tve
->mode
!= TVE_MODE_VGA
) {
579 dev_err(dev
, "only VGA mode supported, currently\n");
583 if (tve
->mode
== TVE_MODE_VGA
) {
584 ret
= of_property_read_u32(np
, "fsl,hsync-pin",
588 dev_err(dev
, "failed to get hsync pin\n");
592 ret
= of_property_read_u32(np
, "fsl,vsync-pin",
596 dev_err(dev
, "failed to get vsync pin\n");
601 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
602 base
= devm_ioremap_resource(dev
, res
);
604 return PTR_ERR(base
);
606 tve_regmap_config
.lock_arg
= tve
;
607 tve
->regmap
= devm_regmap_init_mmio_clk(dev
, "tve", base
,
609 if (IS_ERR(tve
->regmap
)) {
610 dev_err(dev
, "failed to init regmap: %ld\n",
611 PTR_ERR(tve
->regmap
));
612 return PTR_ERR(tve
->regmap
);
615 irq
= platform_get_irq(pdev
, 0);
617 dev_err(dev
, "failed to get irq\n");
621 ret
= devm_request_threaded_irq(dev
, irq
, NULL
,
622 imx_tve_irq_handler
, IRQF_ONESHOT
,
625 dev_err(dev
, "failed to request irq: %d\n", ret
);
629 tve
->dac_reg
= devm_regulator_get(dev
, "dac");
630 if (!IS_ERR(tve
->dac_reg
)) {
631 ret
= regulator_set_voltage(tve
->dac_reg
, 2750000, 2750000);
634 ret
= regulator_enable(tve
->dac_reg
);
639 tve
->clk
= devm_clk_get(dev
, "tve");
640 if (IS_ERR(tve
->clk
)) {
641 dev_err(dev
, "failed to get high speed tve clock: %ld\n",
643 return PTR_ERR(tve
->clk
);
646 /* this is the IPU DI clock input selector, can be parented to tve_di */
647 tve
->di_sel_clk
= devm_clk_get(dev
, "di_sel");
648 if (IS_ERR(tve
->di_sel_clk
)) {
649 dev_err(dev
, "failed to get ipu di mux clock: %ld\n",
650 PTR_ERR(tve
->di_sel_clk
));
651 return PTR_ERR(tve
->di_sel_clk
);
654 ret
= tve_clk_init(tve
, base
);
658 ret
= regmap_read(tve
->regmap
, TVE_COM_CONF_REG
, &val
);
660 dev_err(dev
, "failed to read configuration register: %d\n",
664 if (val
!= 0x00100000) {
665 dev_err(dev
, "configuration register default value indicates this is not a TVEv2\n");
669 /* disable cable detection for VGA mode */
670 ret
= regmap_write(tve
->regmap
, TVE_CD_CONT_REG
, 0);
674 ret
= imx_tve_register(drm
, tve
);
678 dev_set_drvdata(dev
, tve
);
683 static void imx_tve_unbind(struct device
*dev
, struct device
*master
,
686 struct imx_tve
*tve
= dev_get_drvdata(dev
);
688 tve
->connector
.funcs
->destroy(&tve
->connector
);
689 tve
->encoder
.funcs
->destroy(&tve
->encoder
);
691 if (!IS_ERR(tve
->dac_reg
))
692 regulator_disable(tve
->dac_reg
);
695 static const struct component_ops imx_tve_ops
= {
696 .bind
= imx_tve_bind
,
697 .unbind
= imx_tve_unbind
,
700 static int imx_tve_probe(struct platform_device
*pdev
)
702 return component_add(&pdev
->dev
, &imx_tve_ops
);
705 static int imx_tve_remove(struct platform_device
*pdev
)
707 component_del(&pdev
->dev
, &imx_tve_ops
);
711 static const struct of_device_id imx_tve_dt_ids
[] = {
712 { .compatible
= "fsl,imx53-tve", },
715 MODULE_DEVICE_TABLE(of
, imx_tve_dt_ids
);
717 static struct platform_driver imx_tve_driver
= {
718 .probe
= imx_tve_probe
,
719 .remove
= imx_tve_remove
,
721 .of_match_table
= imx_tve_dt_ids
,
726 module_platform_driver(imx_tve_driver
);
728 MODULE_DESCRIPTION("i.MX Television Encoder driver");
729 MODULE_AUTHOR("Philipp Zabel, Pengutronix");
730 MODULE_LICENSE("GPL");
731 MODULE_ALIAS("platform:imx-tve");