2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
25 #include <linux/clk.h>
26 #include <linux/errno.h>
27 #include <drm/drm_gem_cma_helper.h>
28 #include <drm/drm_fb_cma_helper.h>
30 #include <video/imx-ipu-v3.h>
32 #include "ipuv3-plane.h"
34 #define DRIVER_DESC "i.MX IPUv3 Graphics"
39 struct imx_drm_crtc
*imx_crtc
;
41 /* plane[0] is the full plane, plane[1] is the partial plane */
42 struct ipu_plane
*plane
[2];
49 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
51 static void ipu_crtc_enable(struct drm_crtc
*crtc
)
53 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
54 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
57 ipu_dc_enable_channel(ipu_crtc
->dc
);
58 ipu_di_enable(ipu_crtc
->di
);
61 static void ipu_crtc_disable(struct drm_crtc
*crtc
)
63 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
64 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
66 ipu_dc_disable_channel(ipu_crtc
->dc
);
67 ipu_di_disable(ipu_crtc
->di
);
70 spin_lock_irq(&crtc
->dev
->event_lock
);
71 if (crtc
->state
->event
) {
72 drm_crtc_send_vblank_event(crtc
, crtc
->state
->event
);
73 crtc
->state
->event
= NULL
;
75 spin_unlock_irq(&crtc
->dev
->event_lock
);
78 static void imx_drm_crtc_reset(struct drm_crtc
*crtc
)
80 struct imx_crtc_state
*state
;
83 if (crtc
->state
->mode_blob
)
84 drm_property_unreference_blob(crtc
->state
->mode_blob
);
86 state
= to_imx_crtc_state(crtc
->state
);
87 memset(state
, 0, sizeof(*state
));
89 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
92 crtc
->state
= &state
->base
;
95 state
->base
.crtc
= crtc
;
98 static struct drm_crtc_state
*imx_drm_crtc_duplicate_state(struct drm_crtc
*crtc
)
100 struct imx_crtc_state
*state
;
102 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
106 __drm_atomic_helper_crtc_duplicate_state(crtc
, &state
->base
);
108 WARN_ON(state
->base
.crtc
!= crtc
);
109 state
->base
.crtc
= crtc
;
114 static void imx_drm_crtc_destroy_state(struct drm_crtc
*crtc
,
115 struct drm_crtc_state
*state
)
117 __drm_atomic_helper_crtc_destroy_state(state
);
118 kfree(to_imx_crtc_state(state
));
121 static const struct drm_crtc_funcs ipu_crtc_funcs
= {
122 .set_config
= drm_atomic_helper_set_config
,
123 .destroy
= drm_crtc_cleanup
,
124 .page_flip
= drm_atomic_helper_page_flip
,
125 .reset
= imx_drm_crtc_reset
,
126 .atomic_duplicate_state
= imx_drm_crtc_duplicate_state
,
127 .atomic_destroy_state
= imx_drm_crtc_destroy_state
,
130 static irqreturn_t
ipu_irq_handler(int irq
, void *dev_id
)
132 struct ipu_crtc
*ipu_crtc
= dev_id
;
134 imx_drm_handle_vblank(ipu_crtc
->imx_crtc
);
139 static bool ipu_crtc_mode_fixup(struct drm_crtc
*crtc
,
140 const struct drm_display_mode
*mode
,
141 struct drm_display_mode
*adjusted_mode
)
143 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
147 drm_display_mode_to_videomode(adjusted_mode
, &vm
);
149 ret
= ipu_di_adjust_videomode(ipu_crtc
->di
, &vm
);
153 if ((vm
.vsync_len
== 0) || (vm
.hsync_len
== 0))
156 drm_display_mode_from_videomode(&vm
, adjusted_mode
);
161 static int ipu_crtc_atomic_check(struct drm_crtc
*crtc
,
162 struct drm_crtc_state
*state
)
164 u32 primary_plane_mask
= 1 << drm_plane_index(crtc
->primary
);
166 if (state
->active
&& (primary_plane_mask
& state
->plane_mask
) == 0)
172 static void ipu_crtc_atomic_begin(struct drm_crtc
*crtc
,
173 struct drm_crtc_state
*old_crtc_state
)
175 spin_lock_irq(&crtc
->dev
->event_lock
);
176 if (crtc
->state
->event
) {
177 WARN_ON(drm_crtc_vblank_get(crtc
));
178 drm_crtc_arm_vblank_event(crtc
, crtc
->state
->event
);
179 crtc
->state
->event
= NULL
;
181 spin_unlock_irq(&crtc
->dev
->event_lock
);
184 static void ipu_crtc_mode_set_nofb(struct drm_crtc
*crtc
)
186 struct drm_device
*dev
= crtc
->dev
;
187 struct drm_encoder
*encoder
;
188 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
189 struct drm_display_mode
*mode
= &crtc
->state
->adjusted_mode
;
190 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc
->state
);
191 struct ipu_di_signal_cfg sig_cfg
= {};
192 unsigned long encoder_types
= 0;
194 dev_dbg(ipu_crtc
->dev
, "%s: mode->hdisplay: %d\n", __func__
,
196 dev_dbg(ipu_crtc
->dev
, "%s: mode->vdisplay: %d\n", __func__
,
199 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
200 if (encoder
->crtc
== crtc
)
201 encoder_types
|= BIT(encoder
->encoder_type
);
204 dev_dbg(ipu_crtc
->dev
, "%s: attached to encoder types 0x%lx\n",
205 __func__
, encoder_types
);
208 * If we have DAC or LDB, then we need the IPU DI clock to be
209 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
210 * clock from 27 MHz TVE_DI clock, but allow to divide it.
212 if (encoder_types
& (BIT(DRM_MODE_ENCODER_DAC
) |
213 BIT(DRM_MODE_ENCODER_LVDS
)))
214 sig_cfg
.clkflags
= IPU_DI_CLKMODE_SYNC
| IPU_DI_CLKMODE_EXT
;
215 else if (encoder_types
& BIT(DRM_MODE_ENCODER_TVDAC
))
216 sig_cfg
.clkflags
= IPU_DI_CLKMODE_EXT
;
218 sig_cfg
.clkflags
= 0;
220 sig_cfg
.enable_pol
= !(imx_crtc_state
->bus_flags
& DRM_BUS_FLAG_DE_LOW
);
221 /* Default to driving pixel data on negative clock edges */
222 sig_cfg
.clk_pol
= !!(imx_crtc_state
->bus_flags
&
223 DRM_BUS_FLAG_PIXDATA_POSEDGE
);
224 sig_cfg
.bus_format
= imx_crtc_state
->bus_format
;
225 sig_cfg
.v_to_h_sync
= 0;
226 sig_cfg
.hsync_pin
= imx_crtc_state
->di_hsync_pin
;
227 sig_cfg
.vsync_pin
= imx_crtc_state
->di_vsync_pin
;
229 drm_display_mode_to_videomode(mode
, &sig_cfg
.mode
);
231 ipu_dc_init_sync(ipu_crtc
->dc
, ipu_crtc
->di
,
232 mode
->flags
& DRM_MODE_FLAG_INTERLACE
,
233 imx_crtc_state
->bus_format
, mode
->hdisplay
);
234 ipu_di_init_sync_panel(ipu_crtc
->di
, &sig_cfg
);
237 static const struct drm_crtc_helper_funcs ipu_helper_funcs
= {
238 .mode_fixup
= ipu_crtc_mode_fixup
,
239 .mode_set_nofb
= ipu_crtc_mode_set_nofb
,
240 .atomic_check
= ipu_crtc_atomic_check
,
241 .atomic_begin
= ipu_crtc_atomic_begin
,
242 .disable
= ipu_crtc_disable
,
243 .enable
= ipu_crtc_enable
,
246 static int ipu_enable_vblank(struct drm_crtc
*crtc
)
248 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
250 enable_irq(ipu_crtc
->irq
);
255 static void ipu_disable_vblank(struct drm_crtc
*crtc
)
257 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
259 disable_irq_nosync(ipu_crtc
->irq
);
262 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs
= {
263 .enable_vblank
= ipu_enable_vblank
,
264 .disable_vblank
= ipu_disable_vblank
,
265 .crtc_funcs
= &ipu_crtc_funcs
,
266 .crtc_helper_funcs
= &ipu_helper_funcs
,
269 static void ipu_put_resources(struct ipu_crtc
*ipu_crtc
)
271 if (!IS_ERR_OR_NULL(ipu_crtc
->dc
))
272 ipu_dc_put(ipu_crtc
->dc
);
273 if (!IS_ERR_OR_NULL(ipu_crtc
->di
))
274 ipu_di_put(ipu_crtc
->di
);
277 static int ipu_get_resources(struct ipu_crtc
*ipu_crtc
,
278 struct ipu_client_platformdata
*pdata
)
280 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
283 ipu_crtc
->dc
= ipu_dc_get(ipu
, pdata
->dc
);
284 if (IS_ERR(ipu_crtc
->dc
)) {
285 ret
= PTR_ERR(ipu_crtc
->dc
);
289 ipu_crtc
->di
= ipu_di_get(ipu
, pdata
->di
);
290 if (IS_ERR(ipu_crtc
->di
)) {
291 ret
= PTR_ERR(ipu_crtc
->di
);
297 ipu_put_resources(ipu_crtc
);
302 static int ipu_crtc_init(struct ipu_crtc
*ipu_crtc
,
303 struct ipu_client_platformdata
*pdata
, struct drm_device
*drm
)
305 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
309 ret
= ipu_get_resources(ipu_crtc
, pdata
);
311 dev_err(ipu_crtc
->dev
, "getting resources failed with %d.\n",
317 dp
= IPU_DP_FLOW_SYNC_BG
;
318 ipu_crtc
->plane
[0] = ipu_plane_init(drm
, ipu
, pdata
->dma
[0], dp
, 0,
319 DRM_PLANE_TYPE_PRIMARY
);
320 if (IS_ERR(ipu_crtc
->plane
[0])) {
321 ret
= PTR_ERR(ipu_crtc
->plane
[0]);
322 goto err_put_resources
;
325 ret
= imx_drm_add_crtc(drm
, &ipu_crtc
->base
, &ipu_crtc
->imx_crtc
,
326 &ipu_crtc
->plane
[0]->base
, &ipu_crtc_helper_funcs
,
329 dev_err(ipu_crtc
->dev
, "adding crtc failed with %d.\n", ret
);
330 goto err_put_resources
;
333 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[0]);
335 dev_err(ipu_crtc
->dev
, "getting plane 0 resources failed with %d.\n",
337 goto err_remove_crtc
;
340 /* If this crtc is using the DP, add an overlay plane */
341 if (pdata
->dp
>= 0 && pdata
->dma
[1] > 0) {
342 ipu_crtc
->plane
[1] = ipu_plane_init(drm
, ipu
, pdata
->dma
[1],
344 drm_crtc_mask(&ipu_crtc
->base
),
345 DRM_PLANE_TYPE_OVERLAY
);
346 if (IS_ERR(ipu_crtc
->plane
[1])) {
347 ipu_crtc
->plane
[1] = NULL
;
349 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[1]);
351 dev_err(ipu_crtc
->dev
, "getting plane 1 "
352 "resources failed with %d.\n", ret
);
353 goto err_put_plane0_res
;
358 ipu_crtc
->irq
= ipu_plane_irq(ipu_crtc
->plane
[0]);
359 ret
= devm_request_irq(ipu_crtc
->dev
, ipu_crtc
->irq
, ipu_irq_handler
, 0,
360 "imx_drm", ipu_crtc
);
362 dev_err(ipu_crtc
->dev
, "irq request failed with %d.\n", ret
);
363 goto err_put_plane1_res
;
365 /* Only enable IRQ when we actually need it to trigger work. */
366 disable_irq(ipu_crtc
->irq
);
371 if (ipu_crtc
->plane
[1])
372 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
374 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
376 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
378 ipu_put_resources(ipu_crtc
);
383 static int ipu_drm_bind(struct device
*dev
, struct device
*master
, void *data
)
385 struct ipu_client_platformdata
*pdata
= dev
->platform_data
;
386 struct drm_device
*drm
= data
;
387 struct ipu_crtc
*ipu_crtc
;
390 ipu_crtc
= devm_kzalloc(dev
, sizeof(*ipu_crtc
), GFP_KERNEL
);
396 ret
= ipu_crtc_init(ipu_crtc
, pdata
, drm
);
400 dev_set_drvdata(dev
, ipu_crtc
);
405 static void ipu_drm_unbind(struct device
*dev
, struct device
*master
,
408 struct ipu_crtc
*ipu_crtc
= dev_get_drvdata(dev
);
410 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
412 ipu_put_resources(ipu_crtc
);
413 if (ipu_crtc
->plane
[1])
414 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
415 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
418 static const struct component_ops ipu_crtc_ops
= {
419 .bind
= ipu_drm_bind
,
420 .unbind
= ipu_drm_unbind
,
423 static int ipu_drm_probe(struct platform_device
*pdev
)
425 struct device
*dev
= &pdev
->dev
;
428 if (!dev
->platform_data
)
431 ret
= dma_set_coherent_mask(dev
, DMA_BIT_MASK(32));
435 return component_add(dev
, &ipu_crtc_ops
);
438 static int ipu_drm_remove(struct platform_device
*pdev
)
440 component_del(&pdev
->dev
, &ipu_crtc_ops
);
444 static struct platform_driver ipu_drm_driver
= {
446 .name
= "imx-ipuv3-crtc",
448 .probe
= ipu_drm_probe
,
449 .remove
= ipu_drm_remove
,
451 module_platform_driver(ipu_drm_driver
);
453 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
454 MODULE_DESCRIPTION(DRIVER_DESC
);
455 MODULE_LICENSE("GPL");
456 MODULE_ALIAS("platform:imx-ipuv3-crtc");