drivers/gpu/drm/imx/ipuv3-crtc.c

   1 /*
   2  * i.MX IPUv3 Graphics driver
   3  *
   4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15 #include <linux/component.h>
  16 #include <linux/module.h>
  17 #include <linux/export.h>
  18 #include <linux/device.h>
  19 #include <linux/platform_device.h>
  20 #include <drm/drmP.h>
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_crtc_helper.h>
  24 #include <linux/fb.h>
  25 #include <linux/clk.h>
  26 #include <linux/errno.h>
  27 #include <drm/drm_gem_cma_helper.h>
  28 #include <drm/drm_fb_cma_helper.h>
  29
  30 #include <video/imx-ipu-v3.h>
  31 #include "imx-drm.h"
  32 #include "ipuv3-plane.h"
  33
  34 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
  35
  36 struct ipu_crtc {
  37         struct device           *dev;
  38         struct drm_crtc         base;
  39         struct imx_drm_crtc     *imx_crtc;
  40
  41         /* plane[0] is the full plane, plane[1] is the partial plane */
  42         struct ipu_plane        *plane[2];
  43
  44         struct ipu_dc           *dc;
  45         struct ipu_di           *di;
  46         int                     irq;
  47 };
  48
  49 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
  50
  51 static void ipu_crtc_enable(struct ipu_crtc *ipu_crtc)
  52 {
  53         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  54
  55         ipu_dc_enable(ipu);
  56         ipu_dc_enable_channel(ipu_crtc->dc);
  57         ipu_di_enable(ipu_crtc->di);
  58 }
  59
  60 static void ipu_crtc_disable(struct ipu_crtc *ipu_crtc)
  61 {
  62         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
  63         struct drm_crtc *crtc = &ipu_crtc->base;
  64
  65         ipu_dc_disable_channel(ipu_crtc->dc);
  66         ipu_di_disable(ipu_crtc->di);
  67         ipu_dc_disable(ipu);
  68
  69         spin_lock_irq(&crtc->dev->event_lock);
  70         if (crtc->state->event) {
  71                 drm_crtc_send_vblank_event(crtc, crtc->state->event);
  72                 crtc->state->event = NULL;
  73         }
  74         spin_unlock_irq(&crtc->dev->event_lock);
  75 }
  76
  77 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
  78 {
  79         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
  80
  81         dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
  82
  83         switch (mode) {
  84         case DRM_MODE_DPMS_ON:
  85                 ipu_crtc_enable(ipu_crtc);
  86                 break;
  87         case DRM_MODE_DPMS_STANDBY:
  88         case DRM_MODE_DPMS_SUSPEND:
  89         case DRM_MODE_DPMS_OFF:
  90                 ipu_crtc_disable(ipu_crtc);
  91                 break;
  92         }
  93 }
  94
  95 static const struct drm_crtc_funcs ipu_crtc_funcs = {
  96         .set_config = drm_atomic_helper_set_config,
  97         .destroy = drm_crtc_cleanup,
  98         .page_flip = drm_atomic_helper_page_flip,
  99         .reset = drm_atomic_helper_crtc_reset,
 100         .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
 101         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 102 };
 103
 104 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
 105 {
 106         struct ipu_crtc *ipu_crtc = dev_id;
 107
 108         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
 109
 110         return IRQ_HANDLED;
 111 }
 112
 113 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
 114                                   const struct drm_display_mode *mode,
 115                                   struct drm_display_mode *adjusted_mode)
 116 {
 117         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 118         struct videomode vm;
 119         int ret;
 120
 121         drm_display_mode_to_videomode(adjusted_mode, &vm);
 122
 123         ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
 124         if (ret)
 125                 return false;
 126
 127         if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
 128                 return false;
 129
 130         drm_display_mode_from_videomode(&vm, adjusted_mode);
 131
 132         return true;
 133 }
 134
 135 static void ipu_crtc_prepare(struct drm_crtc *crtc)
 136 {
 137         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 138
 139         ipu_crtc_disable(ipu_crtc);
 140 }
 141
 142 static void ipu_crtc_commit(struct drm_crtc *crtc)
 143 {
 144         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 145
 146         ipu_crtc_enable(ipu_crtc);
 147 }
 148
 149 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
 150                                  struct drm_crtc_state *state)
 151 {
 152         u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
 153
 154         if (state->active && (primary_plane_mask & state->plane_mask) == 0)
 155                 return -EINVAL;
 156
 157         return 0;
 158 }
 159
 160 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
 161                                   struct drm_crtc_state *old_crtc_state)
 162 {
 163         spin_lock_irq(&crtc->dev->event_lock);
 164         if (crtc->state->event) {
 165                 WARN_ON(drm_crtc_vblank_get(crtc));
 166                 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
 167                 crtc->state->event = NULL;
 168         }
 169         spin_unlock_irq(&crtc->dev->event_lock);
 170 }
 171
 172 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
 173 {
 174         struct drm_device *dev = crtc->dev;
 175         struct drm_encoder *encoder;
 176         struct imx_drm_encoder *imx_encoder = NULL;
 177         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 178         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
 179         struct ipu_di_signal_cfg sig_cfg = {};
 180         unsigned long encoder_types = 0;
 181
 182         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
 183                         mode->hdisplay);
 184         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
 185                         mode->vdisplay);
 186
 187         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 188                 if (encoder->crtc == crtc) {
 189                         encoder_types |= BIT(encoder->encoder_type);
 190                         imx_encoder = enc_to_imx_enc(encoder);
 191                 }
 192         }
 193
 194         dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
 195                 __func__, encoder_types);
 196
 197         /*
 198          * If we have DAC or LDB, then we need the IPU DI clock to be
 199          * the same as the LDB DI clock. For TVDAC, derive the IPU DI
 200          * clock from 27 MHz TVE_DI clock, but allow to divide it.
 201          */
 202         if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
 203                              BIT(DRM_MODE_ENCODER_LVDS)))
 204                 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
 205         else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
 206                 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
 207         else
 208                 sig_cfg.clkflags = 0;
 209
 210         sig_cfg.enable_pol = !(imx_encoder->bus_flags & DRM_BUS_FLAG_DE_LOW);
 211         /* Default to driving pixel data on negative clock edges */
 212         sig_cfg.clk_pol = !!(imx_encoder->bus_flags &
 213                              DRM_BUS_FLAG_PIXDATA_POSEDGE);
 214         sig_cfg.bus_format = imx_encoder->bus_format;
 215         sig_cfg.v_to_h_sync = 0;
 216         sig_cfg.hsync_pin = imx_encoder->di_hsync_pin;
 217         sig_cfg.vsync_pin = imx_encoder->di_vsync_pin;
 218
 219         drm_display_mode_to_videomode(mode, &sig_cfg.mode);
 220
 221         ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
 222                          mode->flags & DRM_MODE_FLAG_INTERLACE,
 223                          imx_encoder->bus_format, mode->hdisplay);
 224         ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
 225 }
 226
 227 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
 228         .dpms = ipu_crtc_dpms,
 229         .mode_fixup = ipu_crtc_mode_fixup,
 230         .mode_set_nofb = ipu_crtc_mode_set_nofb,
 231         .prepare = ipu_crtc_prepare,
 232         .commit = ipu_crtc_commit,
 233         .atomic_check = ipu_crtc_atomic_check,
 234         .atomic_begin = ipu_crtc_atomic_begin,
 235 };
 236
 237 static int ipu_enable_vblank(struct drm_crtc *crtc)
 238 {
 239         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 240
 241         enable_irq(ipu_crtc->irq);
 242
 243         return 0;
 244 }
 245
 246 static void ipu_disable_vblank(struct drm_crtc *crtc)
 247 {
 248         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 249
 250         disable_irq_nosync(ipu_crtc->irq);
 251 }
 252
 253 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
 254         .enable_vblank = ipu_enable_vblank,
 255         .disable_vblank = ipu_disable_vblank,
 256         .crtc_funcs = &ipu_crtc_funcs,
 257         .crtc_helper_funcs = &ipu_helper_funcs,
 258 };
 259
 260 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
 261 {
 262         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
 263                 ipu_dc_put(ipu_crtc->dc);
 264         if (!IS_ERR_OR_NULL(ipu_crtc->di))
 265                 ipu_di_put(ipu_crtc->di);
 266 }
 267
 268 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
 269                 struct ipu_client_platformdata *pdata)
 270 {
 271         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 272         int ret;
 273
 274         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
 275         if (IS_ERR(ipu_crtc->dc)) {
 276                 ret = PTR_ERR(ipu_crtc->dc);
 277                 goto err_out;
 278         }
 279
 280         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
 281         if (IS_ERR(ipu_crtc->di)) {
 282                 ret = PTR_ERR(ipu_crtc->di);
 283                 goto err_out;
 284         }
 285
 286         return 0;
 287 err_out:
 288         ipu_put_resources(ipu_crtc);
 289
 290         return ret;
 291 }
 292
 293 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
 294         struct ipu_client_platformdata *pdata, struct drm_device *drm)
 295 {
 296         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
 297         int dp = -EINVAL;
 298         int ret;
 299
 300         ret = ipu_get_resources(ipu_crtc, pdata);
 301         if (ret) {
 302                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
 303                                 ret);
 304                 return ret;
 305         }
 306
 307         if (pdata->dp >= 0)
 308                 dp = IPU_DP_FLOW_SYNC_BG;
 309         ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
 310                                             DRM_PLANE_TYPE_PRIMARY);
 311         if (IS_ERR(ipu_crtc->plane[0])) {
 312                 ret = PTR_ERR(ipu_crtc->plane[0]);
 313                 goto err_put_resources;
 314         }
 315
 316         ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
 317                         &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
 318                         pdata->of_node);
 319         if (ret) {
 320                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
 321                 goto err_put_resources;
 322         }
 323
 324         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
 325         if (ret) {
 326                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
 327                         ret);
 328                 goto err_remove_crtc;
 329         }
 330
 331         /* If this crtc is using the DP, add an overlay plane */
 332         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
 333                 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
 334                                                 IPU_DP_FLOW_SYNC_FG,
 335                                                 drm_crtc_mask(&ipu_crtc->base),
 336                                                 DRM_PLANE_TYPE_OVERLAY);
 337                 if (IS_ERR(ipu_crtc->plane[1])) {
 338                         ipu_crtc->plane[1] = NULL;
 339                 } else {
 340                         ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
 341                         if (ret) {
 342                                 dev_err(ipu_crtc->dev, "getting plane 1 "
 343                                         "resources failed with %d.\n", ret);
 344                                 goto err_put_plane0_res;
 345                         }
 346                 }
 347         }
 348
 349         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
 350         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
 351                         "imx_drm", ipu_crtc);
 352         if (ret < 0) {
 353                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
 354                 goto err_put_plane1_res;
 355         }
 356         /* Only enable IRQ when we actually need it to trigger work. */
 357         disable_irq(ipu_crtc->irq);
 358
 359         return 0;
 360
 361 err_put_plane1_res:
 362         if (ipu_crtc->plane[1])
 363                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 364 err_put_plane0_res:
 365         ipu_plane_put_resources(ipu_crtc->plane[0]);
 366 err_remove_crtc:
 367         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 368 err_put_resources:
 369         ipu_put_resources(ipu_crtc);
 370
 371         return ret;
 372 }
 373
 374 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
 375 {
 376         struct ipu_client_platformdata *pdata = dev->platform_data;
 377         struct drm_device *drm = data;
 378         struct ipu_crtc *ipu_crtc;
 379         int ret;
 380
 381         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
 382         if (!ipu_crtc)
 383                 return -ENOMEM;
 384
 385         ipu_crtc->dev = dev;
 386
 387         ret = ipu_crtc_init(ipu_crtc, pdata, drm);
 388         if (ret)
 389                 return ret;
 390
 391         dev_set_drvdata(dev, ipu_crtc);
 392
 393         return 0;
 394 }
 395
 396 static void ipu_drm_unbind(struct device *dev, struct device *master,
 397         void *data)
 398 {
 399         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
 400
 401         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
 402
 403         ipu_put_resources(ipu_crtc);
 404         if (ipu_crtc->plane[1])
 405                 ipu_plane_put_resources(ipu_crtc->plane[1]);
 406         ipu_plane_put_resources(ipu_crtc->plane[0]);
 407 }
 408
 409 static const struct component_ops ipu_crtc_ops = {
 410         .bind = ipu_drm_bind,
 411         .unbind = ipu_drm_unbind,
 412 };
 413
 414 static int ipu_drm_probe(struct platform_device *pdev)
 415 {
 416         struct device *dev = &pdev->dev;
 417         int ret;
 418
 419         if (!dev->platform_data)
 420                 return -EINVAL;
 421
 422         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
 423         if (ret)
 424                 return ret;
 425
 426         return component_add(dev, &ipu_crtc_ops);
 427 }
 428
 429 static int ipu_drm_remove(struct platform_device *pdev)
 430 {
 431         component_del(&pdev->dev, &ipu_crtc_ops);
 432         return 0;
 433 }
 434
 435 static struct platform_driver ipu_drm_driver = {
 436         .driver = {
 437                 .name = "imx-ipuv3-crtc",
 438         },
 439         .probe = ipu_drm_probe,
 440         .remove = ipu_drm_remove,
 441 };
 442 module_platform_driver(ipu_drm_driver);
 443
 444 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 445 MODULE_DESCRIPTION(DRIVER_DESC);
 446 MODULE_LICENSE("GPL");
 447 MODULE_ALIAS("platform:imx-ipuv3-crtc");