2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
25 #include <linux/clk.h>
26 #include <linux/errno.h>
27 #include <drm/drm_gem_cma_helper.h>
28 #include <drm/drm_fb_cma_helper.h>
30 #include <video/imx-ipu-v3.h>
32 #include "ipuv3-plane.h"
34 #define DRIVER_DESC "i.MX IPUv3 Graphics"
39 struct imx_drm_crtc
*imx_crtc
;
41 /* plane[0] is the full plane, plane[1] is the partial plane */
42 struct ipu_plane
*plane
[2];
49 static inline struct ipu_crtc
*to_ipu_crtc(struct drm_crtc
*crtc
)
51 return container_of(crtc
, struct ipu_crtc
, base
);
54 static void ipu_crtc_enable(struct drm_crtc
*crtc
)
56 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
57 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
60 ipu_dc_enable_channel(ipu_crtc
->dc
);
61 ipu_di_enable(ipu_crtc
->di
);
64 static void ipu_crtc_disable(struct drm_crtc
*crtc
)
66 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
67 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
69 ipu_dc_disable_channel(ipu_crtc
->dc
);
70 ipu_di_disable(ipu_crtc
->di
);
73 spin_lock_irq(&crtc
->dev
->event_lock
);
74 if (crtc
->state
->event
) {
75 drm_crtc_send_vblank_event(crtc
, crtc
->state
->event
);
76 crtc
->state
->event
= NULL
;
78 spin_unlock_irq(&crtc
->dev
->event_lock
);
80 drm_crtc_vblank_off(crtc
);
83 static void imx_drm_crtc_reset(struct drm_crtc
*crtc
)
85 struct imx_crtc_state
*state
;
88 if (crtc
->state
->mode_blob
)
89 drm_property_unreference_blob(crtc
->state
->mode_blob
);
91 state
= to_imx_crtc_state(crtc
->state
);
92 memset(state
, 0, sizeof(*state
));
94 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
97 crtc
->state
= &state
->base
;
100 state
->base
.crtc
= crtc
;
103 static struct drm_crtc_state
*imx_drm_crtc_duplicate_state(struct drm_crtc
*crtc
)
105 struct imx_crtc_state
*state
;
107 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
111 __drm_atomic_helper_crtc_duplicate_state(crtc
, &state
->base
);
113 WARN_ON(state
->base
.crtc
!= crtc
);
114 state
->base
.crtc
= crtc
;
119 static void imx_drm_crtc_destroy_state(struct drm_crtc
*crtc
,
120 struct drm_crtc_state
*state
)
122 __drm_atomic_helper_crtc_destroy_state(state
);
123 kfree(to_imx_crtc_state(state
));
126 static const struct drm_crtc_funcs ipu_crtc_funcs
= {
127 .set_config
= drm_atomic_helper_set_config
,
128 .destroy
= drm_crtc_cleanup
,
129 .page_flip
= drm_atomic_helper_page_flip
,
130 .reset
= imx_drm_crtc_reset
,
131 .atomic_duplicate_state
= imx_drm_crtc_duplicate_state
,
132 .atomic_destroy_state
= imx_drm_crtc_destroy_state
,
135 static irqreturn_t
ipu_irq_handler(int irq
, void *dev_id
)
137 struct ipu_crtc
*ipu_crtc
= dev_id
;
139 imx_drm_handle_vblank(ipu_crtc
->imx_crtc
);
144 static bool ipu_crtc_mode_fixup(struct drm_crtc
*crtc
,
145 const struct drm_display_mode
*mode
,
146 struct drm_display_mode
*adjusted_mode
)
148 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
152 drm_display_mode_to_videomode(adjusted_mode
, &vm
);
154 ret
= ipu_di_adjust_videomode(ipu_crtc
->di
, &vm
);
158 if ((vm
.vsync_len
== 0) || (vm
.hsync_len
== 0))
161 drm_display_mode_from_videomode(&vm
, adjusted_mode
);
166 static int ipu_crtc_atomic_check(struct drm_crtc
*crtc
,
167 struct drm_crtc_state
*state
)
169 u32 primary_plane_mask
= 1 << drm_plane_index(crtc
->primary
);
171 if (state
->active
&& (primary_plane_mask
& state
->plane_mask
) == 0)
177 static void ipu_crtc_atomic_begin(struct drm_crtc
*crtc
,
178 struct drm_crtc_state
*old_crtc_state
)
180 drm_crtc_vblank_on(crtc
);
182 spin_lock_irq(&crtc
->dev
->event_lock
);
183 if (crtc
->state
->event
) {
184 WARN_ON(drm_crtc_vblank_get(crtc
));
185 drm_crtc_arm_vblank_event(crtc
, crtc
->state
->event
);
186 crtc
->state
->event
= NULL
;
188 spin_unlock_irq(&crtc
->dev
->event_lock
);
191 static void ipu_crtc_mode_set_nofb(struct drm_crtc
*crtc
)
193 struct drm_device
*dev
= crtc
->dev
;
194 struct drm_encoder
*encoder
;
195 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
196 struct drm_display_mode
*mode
= &crtc
->state
->adjusted_mode
;
197 struct imx_crtc_state
*imx_crtc_state
= to_imx_crtc_state(crtc
->state
);
198 struct ipu_di_signal_cfg sig_cfg
= {};
199 unsigned long encoder_types
= 0;
201 dev_dbg(ipu_crtc
->dev
, "%s: mode->hdisplay: %d\n", __func__
,
203 dev_dbg(ipu_crtc
->dev
, "%s: mode->vdisplay: %d\n", __func__
,
206 list_for_each_entry(encoder
, &dev
->mode_config
.encoder_list
, head
) {
207 if (encoder
->crtc
== crtc
)
208 encoder_types
|= BIT(encoder
->encoder_type
);
211 dev_dbg(ipu_crtc
->dev
, "%s: attached to encoder types 0x%lx\n",
212 __func__
, encoder_types
);
215 * If we have DAC or LDB, then we need the IPU DI clock to be
216 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
217 * clock from 27 MHz TVE_DI clock, but allow to divide it.
219 if (encoder_types
& (BIT(DRM_MODE_ENCODER_DAC
) |
220 BIT(DRM_MODE_ENCODER_LVDS
)))
221 sig_cfg
.clkflags
= IPU_DI_CLKMODE_SYNC
| IPU_DI_CLKMODE_EXT
;
222 else if (encoder_types
& BIT(DRM_MODE_ENCODER_TVDAC
))
223 sig_cfg
.clkflags
= IPU_DI_CLKMODE_EXT
;
225 sig_cfg
.clkflags
= 0;
227 sig_cfg
.enable_pol
= !(imx_crtc_state
->bus_flags
& DRM_BUS_FLAG_DE_LOW
);
228 /* Default to driving pixel data on negative clock edges */
229 sig_cfg
.clk_pol
= !!(imx_crtc_state
->bus_flags
&
230 DRM_BUS_FLAG_PIXDATA_POSEDGE
);
231 sig_cfg
.bus_format
= imx_crtc_state
->bus_format
;
232 sig_cfg
.v_to_h_sync
= 0;
233 sig_cfg
.hsync_pin
= imx_crtc_state
->di_hsync_pin
;
234 sig_cfg
.vsync_pin
= imx_crtc_state
->di_vsync_pin
;
236 drm_display_mode_to_videomode(mode
, &sig_cfg
.mode
);
238 ipu_dc_init_sync(ipu_crtc
->dc
, ipu_crtc
->di
,
239 mode
->flags
& DRM_MODE_FLAG_INTERLACE
,
240 imx_crtc_state
->bus_format
, mode
->hdisplay
);
241 ipu_di_init_sync_panel(ipu_crtc
->di
, &sig_cfg
);
244 static const struct drm_crtc_helper_funcs ipu_helper_funcs
= {
245 .mode_fixup
= ipu_crtc_mode_fixup
,
246 .mode_set_nofb
= ipu_crtc_mode_set_nofb
,
247 .atomic_check
= ipu_crtc_atomic_check
,
248 .atomic_begin
= ipu_crtc_atomic_begin
,
249 .disable
= ipu_crtc_disable
,
250 .enable
= ipu_crtc_enable
,
253 static int ipu_enable_vblank(struct drm_crtc
*crtc
)
255 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
257 enable_irq(ipu_crtc
->irq
);
262 static void ipu_disable_vblank(struct drm_crtc
*crtc
)
264 struct ipu_crtc
*ipu_crtc
= to_ipu_crtc(crtc
);
266 disable_irq_nosync(ipu_crtc
->irq
);
269 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs
= {
270 .enable_vblank
= ipu_enable_vblank
,
271 .disable_vblank
= ipu_disable_vblank
,
272 .crtc_funcs
= &ipu_crtc_funcs
,
273 .crtc_helper_funcs
= &ipu_helper_funcs
,
276 static void ipu_put_resources(struct ipu_crtc
*ipu_crtc
)
278 if (!IS_ERR_OR_NULL(ipu_crtc
->dc
))
279 ipu_dc_put(ipu_crtc
->dc
);
280 if (!IS_ERR_OR_NULL(ipu_crtc
->di
))
281 ipu_di_put(ipu_crtc
->di
);
284 static int ipu_get_resources(struct ipu_crtc
*ipu_crtc
,
285 struct ipu_client_platformdata
*pdata
)
287 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
290 ipu_crtc
->dc
= ipu_dc_get(ipu
, pdata
->dc
);
291 if (IS_ERR(ipu_crtc
->dc
)) {
292 ret
= PTR_ERR(ipu_crtc
->dc
);
296 ipu_crtc
->di
= ipu_di_get(ipu
, pdata
->di
);
297 if (IS_ERR(ipu_crtc
->di
)) {
298 ret
= PTR_ERR(ipu_crtc
->di
);
304 ipu_put_resources(ipu_crtc
);
309 static int ipu_crtc_init(struct ipu_crtc
*ipu_crtc
,
310 struct ipu_client_platformdata
*pdata
, struct drm_device
*drm
)
312 struct ipu_soc
*ipu
= dev_get_drvdata(ipu_crtc
->dev
->parent
);
316 ret
= ipu_get_resources(ipu_crtc
, pdata
);
318 dev_err(ipu_crtc
->dev
, "getting resources failed with %d.\n",
324 dp
= IPU_DP_FLOW_SYNC_BG
;
325 ipu_crtc
->plane
[0] = ipu_plane_init(drm
, ipu
, pdata
->dma
[0], dp
, 0,
326 DRM_PLANE_TYPE_PRIMARY
);
327 if (IS_ERR(ipu_crtc
->plane
[0])) {
328 ret
= PTR_ERR(ipu_crtc
->plane
[0]);
329 goto err_put_resources
;
332 ret
= imx_drm_add_crtc(drm
, &ipu_crtc
->base
, &ipu_crtc
->imx_crtc
,
333 &ipu_crtc
->plane
[0]->base
, &ipu_crtc_helper_funcs
,
336 dev_err(ipu_crtc
->dev
, "adding crtc failed with %d.\n", ret
);
337 goto err_put_resources
;
340 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[0]);
342 dev_err(ipu_crtc
->dev
, "getting plane 0 resources failed with %d.\n",
344 goto err_remove_crtc
;
347 /* If this crtc is using the DP, add an overlay plane */
348 if (pdata
->dp
>= 0 && pdata
->dma
[1] > 0) {
349 ipu_crtc
->plane
[1] = ipu_plane_init(drm
, ipu
, pdata
->dma
[1],
351 drm_crtc_mask(&ipu_crtc
->base
),
352 DRM_PLANE_TYPE_OVERLAY
);
353 if (IS_ERR(ipu_crtc
->plane
[1])) {
354 ipu_crtc
->plane
[1] = NULL
;
356 ret
= ipu_plane_get_resources(ipu_crtc
->plane
[1]);
358 dev_err(ipu_crtc
->dev
, "getting plane 1 "
359 "resources failed with %d.\n", ret
);
360 goto err_put_plane0_res
;
365 ipu_crtc
->irq
= ipu_plane_irq(ipu_crtc
->plane
[0]);
366 ret
= devm_request_irq(ipu_crtc
->dev
, ipu_crtc
->irq
, ipu_irq_handler
, 0,
367 "imx_drm", ipu_crtc
);
369 dev_err(ipu_crtc
->dev
, "irq request failed with %d.\n", ret
);
370 goto err_put_plane1_res
;
372 /* Only enable IRQ when we actually need it to trigger work. */
373 disable_irq(ipu_crtc
->irq
);
378 if (ipu_crtc
->plane
[1])
379 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
381 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
383 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
385 ipu_put_resources(ipu_crtc
);
390 static int ipu_drm_bind(struct device
*dev
, struct device
*master
, void *data
)
392 struct ipu_client_platformdata
*pdata
= dev
->platform_data
;
393 struct drm_device
*drm
= data
;
394 struct ipu_crtc
*ipu_crtc
;
397 ipu_crtc
= devm_kzalloc(dev
, sizeof(*ipu_crtc
), GFP_KERNEL
);
403 ret
= ipu_crtc_init(ipu_crtc
, pdata
, drm
);
407 dev_set_drvdata(dev
, ipu_crtc
);
412 static void ipu_drm_unbind(struct device
*dev
, struct device
*master
,
415 struct ipu_crtc
*ipu_crtc
= dev_get_drvdata(dev
);
417 imx_drm_remove_crtc(ipu_crtc
->imx_crtc
);
419 ipu_put_resources(ipu_crtc
);
420 if (ipu_crtc
->plane
[1])
421 ipu_plane_put_resources(ipu_crtc
->plane
[1]);
422 ipu_plane_put_resources(ipu_crtc
->plane
[0]);
425 static const struct component_ops ipu_crtc_ops
= {
426 .bind
= ipu_drm_bind
,
427 .unbind
= ipu_drm_unbind
,
430 static int ipu_drm_probe(struct platform_device
*pdev
)
432 struct device
*dev
= &pdev
->dev
;
435 if (!dev
->platform_data
)
438 ret
= dma_set_coherent_mask(dev
, DMA_BIT_MASK(32));
442 return component_add(dev
, &ipu_crtc_ops
);
445 static int ipu_drm_remove(struct platform_device
*pdev
)
447 component_del(&pdev
->dev
, &ipu_crtc_ops
);
451 static struct platform_driver ipu_drm_driver
= {
453 .name
= "imx-ipuv3-crtc",
455 .probe
= ipu_drm_probe
,
456 .remove
= ipu_drm_remove
,
458 module_platform_driver(ipu_drm_driver
);
460 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
461 MODULE_DESCRIPTION(DRIVER_DESC
);
462 MODULE_LICENSE("GPL");
463 MODULE_ALIAS("platform:imx-ipuv3-crtc");