drm/i915/cmdparser: Check for SKIP descriptors first
[deliverable/linux.git] / drivers / gpu / drm / imx / ipuv3-crtc.c
1 /*
2 * i.MX IPUv3 Graphics driver
3 *
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15 #include <linux/component.h>
16 #include <linux/module.h>
17 #include <linux/export.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
20 #include <drm/drmP.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <linux/clk.h>
25 #include <linux/errno.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_fb_cma_helper.h>
28
29 #include <video/imx-ipu-v3.h>
30 #include "imx-drm.h"
31 #include "ipuv3-plane.h"
32
33 #define DRIVER_DESC "i.MX IPUv3 Graphics"
34
35 struct ipu_crtc {
36 struct device *dev;
37 struct drm_crtc base;
38 struct imx_drm_crtc *imx_crtc;
39
40 /* plane[0] is the full plane, plane[1] is the partial plane */
41 struct ipu_plane *plane[2];
42
43 struct ipu_dc *dc;
44 struct ipu_di *di;
45 int irq;
46 };
47
48 static inline struct ipu_crtc *to_ipu_crtc(struct drm_crtc *crtc)
49 {
50 return container_of(crtc, struct ipu_crtc, base);
51 }
52
53 static void ipu_crtc_enable(struct drm_crtc *crtc)
54 {
55 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
56 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
57
58 ipu_dc_enable(ipu);
59 ipu_dc_enable_channel(ipu_crtc->dc);
60 ipu_di_enable(ipu_crtc->di);
61 }
62
63 static void ipu_crtc_disable(struct drm_crtc *crtc)
64 {
65 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
66 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
67
68 ipu_dc_disable_channel(ipu_crtc->dc);
69 ipu_di_disable(ipu_crtc->di);
70 ipu_dc_disable(ipu);
71
72 spin_lock_irq(&crtc->dev->event_lock);
73 if (crtc->state->event) {
74 drm_crtc_send_vblank_event(crtc, crtc->state->event);
75 crtc->state->event = NULL;
76 }
77 spin_unlock_irq(&crtc->dev->event_lock);
78 }
79
80 static void imx_drm_crtc_reset(struct drm_crtc *crtc)
81 {
82 struct imx_crtc_state *state;
83
84 if (crtc->state) {
85 if (crtc->state->mode_blob)
86 drm_property_unreference_blob(crtc->state->mode_blob);
87
88 state = to_imx_crtc_state(crtc->state);
89 memset(state, 0, sizeof(*state));
90 } else {
91 state = kzalloc(sizeof(*state), GFP_KERNEL);
92 if (!state)
93 return;
94 crtc->state = &state->base;
95 }
96
97 state->base.crtc = crtc;
98 }
99
100 static struct drm_crtc_state *imx_drm_crtc_duplicate_state(struct drm_crtc *crtc)
101 {
102 struct imx_crtc_state *state;
103
104 state = kzalloc(sizeof(*state), GFP_KERNEL);
105 if (!state)
106 return NULL;
107
108 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
109
110 WARN_ON(state->base.crtc != crtc);
111 state->base.crtc = crtc;
112
113 return &state->base;
114 }
115
116 static void imx_drm_crtc_destroy_state(struct drm_crtc *crtc,
117 struct drm_crtc_state *state)
118 {
119 __drm_atomic_helper_crtc_destroy_state(state);
120 kfree(to_imx_crtc_state(state));
121 }
122
123 static const struct drm_crtc_funcs ipu_crtc_funcs = {
124 .set_config = drm_atomic_helper_set_config,
125 .destroy = drm_crtc_cleanup,
126 .page_flip = drm_atomic_helper_page_flip,
127 .reset = imx_drm_crtc_reset,
128 .atomic_duplicate_state = imx_drm_crtc_duplicate_state,
129 .atomic_destroy_state = imx_drm_crtc_destroy_state,
130 };
131
132 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
133 {
134 struct ipu_crtc *ipu_crtc = dev_id;
135
136 drm_crtc_handle_vblank(&ipu_crtc->base);
137
138 return IRQ_HANDLED;
139 }
140
141 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
142 const struct drm_display_mode *mode,
143 struct drm_display_mode *adjusted_mode)
144 {
145 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
146 struct videomode vm;
147 int ret;
148
149 drm_display_mode_to_videomode(adjusted_mode, &vm);
150
151 ret = ipu_di_adjust_videomode(ipu_crtc->di, &vm);
152 if (ret)
153 return false;
154
155 if ((vm.vsync_len == 0) || (vm.hsync_len == 0))
156 return false;
157
158 drm_display_mode_from_videomode(&vm, adjusted_mode);
159
160 return true;
161 }
162
163 static int ipu_crtc_atomic_check(struct drm_crtc *crtc,
164 struct drm_crtc_state *state)
165 {
166 u32 primary_plane_mask = 1 << drm_plane_index(crtc->primary);
167
168 if (state->active && (primary_plane_mask & state->plane_mask) == 0)
169 return -EINVAL;
170
171 return 0;
172 }
173
174 static void ipu_crtc_atomic_begin(struct drm_crtc *crtc,
175 struct drm_crtc_state *old_crtc_state)
176 {
177 spin_lock_irq(&crtc->dev->event_lock);
178 if (crtc->state->event) {
179 WARN_ON(drm_crtc_vblank_get(crtc));
180 drm_crtc_arm_vblank_event(crtc, crtc->state->event);
181 crtc->state->event = NULL;
182 }
183 spin_unlock_irq(&crtc->dev->event_lock);
184 }
185
186 static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc)
187 {
188 struct drm_device *dev = crtc->dev;
189 struct drm_encoder *encoder;
190 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
191 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
192 struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc->state);
193 struct ipu_di_signal_cfg sig_cfg = {};
194 unsigned long encoder_types = 0;
195
196 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
197 mode->hdisplay);
198 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
199 mode->vdisplay);
200
201 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
202 if (encoder->crtc == crtc)
203 encoder_types |= BIT(encoder->encoder_type);
204 }
205
206 dev_dbg(ipu_crtc->dev, "%s: attached to encoder types 0x%lx\n",
207 __func__, encoder_types);
208
209 /*
210 * If we have DAC or LDB, then we need the IPU DI clock to be
211 * the same as the LDB DI clock. For TVDAC, derive the IPU DI
212 * clock from 27 MHz TVE_DI clock, but allow to divide it.
213 */
214 if (encoder_types & (BIT(DRM_MODE_ENCODER_DAC) |
215 BIT(DRM_MODE_ENCODER_LVDS)))
216 sig_cfg.clkflags = IPU_DI_CLKMODE_SYNC | IPU_DI_CLKMODE_EXT;
217 else if (encoder_types & BIT(DRM_MODE_ENCODER_TVDAC))
218 sig_cfg.clkflags = IPU_DI_CLKMODE_EXT;
219 else
220 sig_cfg.clkflags = 0;
221
222 sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
223 /* Default to driving pixel data on negative clock edges */
224 sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
225 DRM_BUS_FLAG_PIXDATA_POSEDGE);
226 sig_cfg.bus_format = imx_crtc_state->bus_format;
227 sig_cfg.v_to_h_sync = 0;
228 sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
229 sig_cfg.vsync_pin = imx_crtc_state->di_vsync_pin;
230
231 drm_display_mode_to_videomode(mode, &sig_cfg.mode);
232
233 ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di,
234 mode->flags & DRM_MODE_FLAG_INTERLACE,
235 imx_crtc_state->bus_format, mode->hdisplay);
236 ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
237 }
238
239 static const struct drm_crtc_helper_funcs ipu_helper_funcs = {
240 .mode_fixup = ipu_crtc_mode_fixup,
241 .mode_set_nofb = ipu_crtc_mode_set_nofb,
242 .atomic_check = ipu_crtc_atomic_check,
243 .atomic_begin = ipu_crtc_atomic_begin,
244 .disable = ipu_crtc_disable,
245 .enable = ipu_crtc_enable,
246 };
247
248 static int ipu_enable_vblank(struct drm_crtc *crtc)
249 {
250 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
251
252 enable_irq(ipu_crtc->irq);
253
254 return 0;
255 }
256
257 static void ipu_disable_vblank(struct drm_crtc *crtc)
258 {
259 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
260
261 disable_irq_nosync(ipu_crtc->irq);
262 }
263
264 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
265 .enable_vblank = ipu_enable_vblank,
266 .disable_vblank = ipu_disable_vblank,
267 .crtc_funcs = &ipu_crtc_funcs,
268 .crtc_helper_funcs = &ipu_helper_funcs,
269 };
270
271 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
272 {
273 if (!IS_ERR_OR_NULL(ipu_crtc->dc))
274 ipu_dc_put(ipu_crtc->dc);
275 if (!IS_ERR_OR_NULL(ipu_crtc->di))
276 ipu_di_put(ipu_crtc->di);
277 }
278
279 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
280 struct ipu_client_platformdata *pdata)
281 {
282 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
283 int ret;
284
285 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
286 if (IS_ERR(ipu_crtc->dc)) {
287 ret = PTR_ERR(ipu_crtc->dc);
288 goto err_out;
289 }
290
291 ipu_crtc->di = ipu_di_get(ipu, pdata->di);
292 if (IS_ERR(ipu_crtc->di)) {
293 ret = PTR_ERR(ipu_crtc->di);
294 goto err_out;
295 }
296
297 return 0;
298 err_out:
299 ipu_put_resources(ipu_crtc);
300
301 return ret;
302 }
303
304 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
305 struct ipu_client_platformdata *pdata, struct drm_device *drm)
306 {
307 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
308 int dp = -EINVAL;
309 int ret;
310
311 ret = ipu_get_resources(ipu_crtc, pdata);
312 if (ret) {
313 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
314 ret);
315 return ret;
316 }
317
318 if (pdata->dp >= 0)
319 dp = IPU_DP_FLOW_SYNC_BG;
320 ipu_crtc->plane[0] = ipu_plane_init(drm, ipu, pdata->dma[0], dp, 0,
321 DRM_PLANE_TYPE_PRIMARY);
322 if (IS_ERR(ipu_crtc->plane[0])) {
323 ret = PTR_ERR(ipu_crtc->plane[0]);
324 goto err_put_resources;
325 }
326
327 ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
328 &ipu_crtc->plane[0]->base, &ipu_crtc_helper_funcs,
329 pdata->of_node);
330 if (ret) {
331 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
332 goto err_put_resources;
333 }
334
335 ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
336 if (ret) {
337 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
338 ret);
339 goto err_remove_crtc;
340 }
341
342 /* If this crtc is using the DP, add an overlay plane */
343 if (pdata->dp >= 0 && pdata->dma[1] > 0) {
344 ipu_crtc->plane[1] = ipu_plane_init(drm, ipu, pdata->dma[1],
345 IPU_DP_FLOW_SYNC_FG,
346 drm_crtc_mask(&ipu_crtc->base),
347 DRM_PLANE_TYPE_OVERLAY);
348 if (IS_ERR(ipu_crtc->plane[1])) {
349 ipu_crtc->plane[1] = NULL;
350 } else {
351 ret = ipu_plane_get_resources(ipu_crtc->plane[1]);
352 if (ret) {
353 dev_err(ipu_crtc->dev, "getting plane 1 "
354 "resources failed with %d.\n", ret);
355 goto err_put_plane0_res;
356 }
357 }
358 }
359
360 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
361 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
362 "imx_drm", ipu_crtc);
363 if (ret < 0) {
364 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
365 goto err_put_plane1_res;
366 }
367 /* Only enable IRQ when we actually need it to trigger work. */
368 disable_irq(ipu_crtc->irq);
369
370 return 0;
371
372 err_put_plane1_res:
373 if (ipu_crtc->plane[1])
374 ipu_plane_put_resources(ipu_crtc->plane[1]);
375 err_put_plane0_res:
376 ipu_plane_put_resources(ipu_crtc->plane[0]);
377 err_remove_crtc:
378 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
379 err_put_resources:
380 ipu_put_resources(ipu_crtc);
381
382 return ret;
383 }
384
385 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
386 {
387 struct ipu_client_platformdata *pdata = dev->platform_data;
388 struct drm_device *drm = data;
389 struct ipu_crtc *ipu_crtc;
390 int ret;
391
392 ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
393 if (!ipu_crtc)
394 return -ENOMEM;
395
396 ipu_crtc->dev = dev;
397
398 ret = ipu_crtc_init(ipu_crtc, pdata, drm);
399 if (ret)
400 return ret;
401
402 dev_set_drvdata(dev, ipu_crtc);
403
404 return 0;
405 }
406
407 static void ipu_drm_unbind(struct device *dev, struct device *master,
408 void *data)
409 {
410 struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
411
412 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
413
414 ipu_put_resources(ipu_crtc);
415 if (ipu_crtc->plane[1])
416 ipu_plane_put_resources(ipu_crtc->plane[1]);
417 ipu_plane_put_resources(ipu_crtc->plane[0]);
418 }
419
420 static const struct component_ops ipu_crtc_ops = {
421 .bind = ipu_drm_bind,
422 .unbind = ipu_drm_unbind,
423 };
424
425 static int ipu_drm_probe(struct platform_device *pdev)
426 {
427 struct device *dev = &pdev->dev;
428 int ret;
429
430 if (!dev->platform_data)
431 return -EINVAL;
432
433 ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
434 if (ret)
435 return ret;
436
437 return component_add(dev, &ipu_crtc_ops);
438 }
439
440 static int ipu_drm_remove(struct platform_device *pdev)
441 {
442 component_del(&pdev->dev, &ipu_crtc_ops);
443 return 0;
444 }
445
446 static struct platform_driver ipu_drm_driver = {
447 .driver = {
448 .name = "imx-ipuv3-crtc",
449 },
450 .probe = ipu_drm_probe,
451 .remove = ipu_drm_remove,
452 };
453 module_platform_driver(ipu_drm_driver);
454
455 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
456 MODULE_DESCRIPTION(DRIVER_DESC);
457 MODULE_LICENSE("GPL");
458 MODULE_ALIAS("platform:imx-ipuv3-crtc");
This page took 0.060557 seconds and 5 git commands to generate.